1. S3C24XX CPU 内部有4KB的 internal RAM空间供引导,jlink只要把引导程序放入0x00000000位置, 则ARM CPU在引导时则执行在0x00000000位置上的引导代码。
2. 引导代码执行完 CPU/DRAM/CLOCK/UART初始化后,就可以把跑在RAM空间的UBOOT代码下载对应位置进行引导,则会有对应得到控制台console shell, 用户则可以通过console shell 输入命令后即可操作 串口/tftp/ 和 nandflash 了。
一般从 UBOOT/arch/arm/xxx/start.S 超出对应的部分即可。
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.text
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.globl _start
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/*
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* the actual start code
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*/
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_start:
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/*
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* set the cpu to SVC32 mode
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*/
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mrs r0, cpsr
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bic r0, r0, #0x1f
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orr r0, r0, #0xd3
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msr cpsr, r0
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/*
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* disable WatchDog
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*/
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mov r0, #0x53000000 @ ldr r0, =pWTCON
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mov r1, #0
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str r1, [r0] @ disable WTCON
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/*
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* mask all IRQs by setting all bits in the INTMR - default
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*/
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mov r1, #0xffffffff
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ldr r0, =0x4a000008 @ldr r0, =INTMSK
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str r1, [r0]
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System_Clock_Init:
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/* Clock asynchronous mode */
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mrc p15, 0, r1, c1, c0, 0
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orr r1, r1, #0xc0000000
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mcr p15, 0, r1, c1, c0, 0
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ldr r0, =0x4c000000
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/* LOCKTIME configure */
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ldr r1, =0xffffff
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str r1, [r0, #0x0] @LOCKTIME
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/* CAMDIVN configure */
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ldr r1, =0x0
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str r1, [r0, #0x18] @CAMDIVN
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/*
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* default FCLK is 120 MHz !
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* FCLK:HCLK:PCLK = 1:4:8
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*/
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ldr r1, =0x05
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str r1, [r0, #0x14] @CLKDIVN 1:4:8
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/* UPLL setup */ @ USB clock to 48MHz
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ldr r1, =((56 << 12) | (2 << 4) | (2))
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str r1, [r0, #0x08]
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nop
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nop
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nop
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nop
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nop
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nop
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nop
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nop
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/* MPLL setup */ @ Main clock to 405MHz
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ldr r1, =((127 << 12) | (2 << 4) | (1))
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str r1, [r0, #0x04]
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cpu_init_crit:
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/*
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* flush v4 I/D caches
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*/
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mov r0, #0
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mcr p15, 0, r0, c7, c7, 0 /* flush v3/v4 cache */
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mcr p15, 0, r0, c8, c7, 0 /* flush v4 TLB */
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/*
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* disable MMU stuff and caches
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*/
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mrc p15, 0, r0, c1, c0, 0
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bic r0, r0, #0x00002300 @ clear bits 13, 9:8 (--V- --RS)
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bic r0, r0, #0x00000087 @ clear bits 7, 2:0 (B--- -CAM)
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orr r0, r0, #0x00000002 @ set bit 2 (A) Align
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orr r0, r0, #0x00001000 @ set bit 12 (I) I-Cache
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mcr p15, 0, r0, c1, c0, 0
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Memory_Initial:
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adrl r0, mem_cfg_val
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mov r1, #0x48000000
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add r3, r1, #52
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1: ldr r4, [r0], #4
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str r4, [r1], #4
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cmp r1, r3
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bne 1b
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mov r2, #0x8000000
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loop:
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subs r2, r2, #1
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bne loop @ dead loop
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.align 4
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mem_cfg_val:
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.long 0x01001000 @BWSCON
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.long 0x00 @BANKCON0
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.long 0x00 @BANKCON1
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.long 0x00 @BANKCON2
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.long 0x1FC0 @BANKCON3
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.long 0x00 @BANKCON4
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.long 0x00 @BANKCON5
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.long 0x00018005 @BANKCON6
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.long 0x00 @BANKCON7
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.long 0x009c04f5 @ HCLK=100MHz
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.long 0x000000b0
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.long 0x00000030 @Bank Size
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.long 0x00000000 @MRSR
其中主要的部分为 把部分 lowlevel_init.S 中对 MPLL/CLKDIVN 和 DRAM的配置部分提前拿到这里。
即初始化的部分为 保证 CPU/RAM能用, clock能跑起来就OK了。
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objs := init.o
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all: $(objs)
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arm-elf-ld -Ttext 0x0000000 -o init_elf $^
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arm-elf-objcopy -O binary -S init_elf init.bin
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arm-elf-objdump -D -m arm init_elf > init.dis
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%.o:%.c
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arm-elf-gcc -Wall -g -c -o $@ $<
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%.o:%.S
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arm-elf-gcc -Wall -g -c -o $@ $<
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clean:
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rm -f init.bin init_elf init.dis *.o
jlink的使用:
jlink.bat =>
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"D:\SEGGER\V408l\JLink.exe" jlink_script.txt
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@echo "OK"
jlink_script.txt =>
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speed 1200
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h
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loadbin init.bin 0
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setpc 0
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g
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sleep 100
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h
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loadbin u-boot.ram.bin 0x31F80000
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setpc 0x31F80000
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g
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q
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