Chinaunix首页 | 论坛 | 博客
  • 博客访问: 6456887
  • 博文数量: 579
  • 博客积分: 1548
  • 博客等级: 上尉
  • 技术积分: 16635
  • 用 户 组: 普通用户
  • 注册时间: 2012-12-12 15:29
个人简介

http://www.csdn.net/ http://www.arm.com/zh/ https://www.kernel.org/ http://www.linuxpk.com/ http://www.51develop.net/ http://linux.chinaitlab.com/ http://www.embeddedlinux.org.cn http://bbs.pediy.com/

文章分类

全部博文(579)

文章存档

2018年(18)

2015年(91)

2014年(159)

2013年(231)

2012年(80)

分类: C/C++

2015-10-21 09:31:47

原文地址:IAR的stm32f10x_vector.c文件的定义 作者:

点击(此处)折叠或打开

  1. /******************** (C) COPYRIGHT 2008 STMicroelectronics ********************
  2. * File Name : stm32f10x_vector.c
  3. * Author : MCD Application Team
  4. * Version : V2.0.3
  5. * Date : 09/22/2008
  6. * Description : STM32F10x vector table for EWARM5.x toolchain.
  7. * This module performs:
  8. * - Set the initial SP
  9. * - Set the initial PC == __iar_program_start,
  10. * - Set the vector table entries with the exceptions ISR address,
  11. * - Configure external SRAM mounted on STM3210E-EVAL board
  12. * to be used as data memory (optional, to be enabled by user)
  13. * After Reset the Cortex-M3 processor is in Thread mode,
  14. * priority is Privileged, and the Stack is set to Main.
  15. ********************************************************************************
  16. * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
  17. * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME.
  18. * AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT,
  19. * INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE
  20. * CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING
  21. * INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
  22. *******************************************************************************/
  23. /* Includes ------------------------------------------------------------------*/
  24. #include "stm32f10x_lib.h"
  25. #include "stm32f10x_it.h"
  26. /* Private typedef -----------------------------------------------------------*/
  27. typedef void( *intfunc )( void );
  28. typedef union { intfunc __fun; void * __ptr; } intvec_elem;
  29. /* Private define ------------------------------------------------------------*/
  30. /* Uncomment the following line if you need to use external SRAM mounted on
  31. STM3210E-EVAL board as data memory */
  32. /* #define DATA_IN_ExtSRAM */
  33. /* Private macro -------------------------------------------------------------*/
  34. /* Private variables ---------------------------------------------------------*/
  35. /* Private function prototypes -----------------------------------------------*/
  36. /* Private functions ---------------------------------------------------------*/
  37. #pragma language=extended
  38. #pragma segment="CSTACK"
  39. void __iar_program_start( void );
  40. #pragma location = ".intvec"
  41. /* STM32F10x Vector Table entries */
  42. const intvec_elem __vector_table[] =
  43. {
  44. { .__ptr = __sfe( "CSTACK" ) },
  45. __iar_program_start,
  46. NMIException,
  47. HardFaultException,
  48. MemManageException,
  49. BusFaultException,
  50. UsageFaultException,
  51. 0, 0, 0, 0, /* Reserved */
  52. SVCHandler,
  53. DebugMonitor,
  54. 0, /* Reserved */
  55. PendSVC,
  56. SysTickHandler,
  57. WWDG_IRQHandler,
  58. PVD_IRQHandler,
  59. TAMPER_IRQHandler,
  60. RTC_IRQHandler,
  61. FLASH_IRQHandler,
  62. RCC_IRQHandler,
  63. EXTI0_IRQHandler,
  64. EXTI1_IRQHandler,
  65. EXTI2_IRQHandler,
  66. EXTI3_IRQHandler,
  67. EXTI4_IRQHandler,
  68. DMA1_Channel1_IRQHandler,
  69. DMA1_Channel2_IRQHandler,
  70. DMA1_Channel3_IRQHandler,
  71. DMA1_Channel4_IRQHandler,
  72. DMA1_Channel5_IRQHandler,
  73. DMA1_Channel6_IRQHandler,
  74. DMA1_Channel7_IRQHandler,
  75. ADC1_2_IRQHandler,
  76. USB_HP_CAN_TX_IRQHandler,
  77. USB_LP_CAN_RX0_IRQHandler,
  78. CAN_RX1_IRQHandler,
  79. CAN_SCE_IRQHandler,
  80. EXTI9_5_IRQHandler,
  81. TIM1_BRK_IRQHandler,
  82. TIM1_UP_IRQHandler,
  83. TIM1_TRG_COM_IRQHandler,
  84. TIM1_CC_IRQHandler,
  85. TIM2_IRQHandler,
  86. TIM3_IRQHandler,
  87. TIM4_IRQHandler,
  88. I2C1_EV_IRQHandler,
  89. I2C1_ER_IRQHandler,
  90. I2C2_EV_IRQHandler,
  91. I2C2_ER_IRQHandler,
  92. SPI1_IRQHandler,
  93. SPI2_IRQHandler,
  94. USART1_IRQHandler,
  95. USART2_IRQHandler,
  96. USART3_IRQHandler,
  97. EXTI15_10_IRQHandler,
  98. RTCAlarm_IRQHandler,
  99. USBWakeUp_IRQHandler,
  100. TIM8_BRK_IRQHandler,
  101. TIM8_UP_IRQHandler,
  102. TIM8_TRG_COM_IRQHandler,
  103. TIM8_CC_IRQHandler,
  104. ADC3_IRQHandler,
  105. FSMC_IRQHandler,
  106. SDIO_IRQHandler,
  107. TIM5_IRQHandler,
  108. SPI3_IRQHandler,
  109. UART4_IRQHandler,
  110. UART5_IRQHandler,
  111. TIM6_IRQHandler,
  112. TIM7_IRQHandler,
  113. DMA2_Channel1_IRQHandler,
  114. DMA2_Channel2_IRQHandler,
  115. DMA2_Channel3_IRQHandler,
  116. DMA2_Channel4_5_IRQHandler,
  117. };
  118. #ifdef DATA_IN_ExtSRAM
  119. #pragma language=extended
  120. __interwork int __low_level_init(void);
  121. #pragma location="ICODE"
  122. __interwork int __low_level_init(void)
  123. {
  124. /* FSMC Bank1 NOR/SRAM3 is used for the STM3210E-EVAL, if another Bank is
  125. required, then adjust the Register Addresses*/
  126. /* Enable FSMC clock */
  127. *(vu32 *)0x40021014 = 0x00000114;
  128. /* Enable GPIOD, GPIOE, GPIOF and GPIOG clocks */
  129. *(vu32 *)0x40021018 = 0x000001E0;
  130. /* --------------- SRAM Data lines, NOE and NWE configuration ---------------*/
  131. /*---------------- SRAM Address lines configuration -------------------------*/
  132. /*---------------- NOE and NWE configuration --------------------------------*/
  133. /*---------------- NE3 configuration ----------------------------------------*/
  134. /*---------------- NBL0, NBL1 configuration ---------------------------------*/
  135. *(vu32 *)0x40011400 = 0x44BB44BB;
  136. *(vu32 *)0x40011404 = 0xBBBBBBBB;
  137. *(vu32 *)0x40011800 = 0xB44444BB;
  138. *(vu32 *)0x40011804 = 0xBBBBBBBB;
  139. *(vu32 *)0x40011C00 = 0x44BBBBBB;
  140. *(vu32 *)0x40011C04 = 0xBBBB4444;
  141. *(vu32 *)0x40012000 = 0x44BBBBBB;
  142. *(vu32 *)0x40012004 = 0x44444B44;
  143. /*---------------- FSMC Configuration ---------------------------------------*/
  144. /*---------------- Enable FSMC Bank1_SRAM Bank ------------------------------*/
  145. *(vu32 *)0xA0000010 = 0x00001011;
  146. *(vu32 *)0xA0000014 = 0x00000200;
  147. return (1);
  148. }
  149. #endif /*DATA_IN_ExtSRAM*/
  150. /******************* (C) COPYRIGHT 2008 STMicroelectronics *****END OF FILE****/
typedef void( *intfunc )( void );     
定义一个新类型,这个类型是一个函数指针,指针指向的函数类型是void  (void)型, 
符合标准C 
typedef union { intfunc __fun; void * __ptr; } intvec_elem;   
定义一个新类型,这个类型是一个联合体,联合体有两个元素,一个元素类型是intfunc,一个元素类型是void * 
符合标准C 
#pragma language=extended     
#pragma segment="CSTACK"  
void __iar_program_start( void );        
申明外部函数,extern可以用,也可以不用 
符合标准C 
#pragma location = ".intvec"     // 下面的变量存放在段 .intvec 
//IAR扩展 
/* STM32F10x Vector Table entries */  
const intvec_elem __vector_table[] =  
{  
  { .__ptr = __sfe( "CSTACK" ) },  
// { .__ptr = 常量 },     
// 数组元素是联合体,联合体有两个元素,对联合体元素__ptr赋初值 
//符合标准C 
//__sfe( "CSTACK" ) 是段CSTACK的尾地址,更准确是段CSTACK下一个段的首地址(记忆中应该是这样)。 
//IAR扩展 
 __iar_program_start,                 
//数组元素是联合体,联合体有两个元素,对联合体第一个元素__fun赋初值 
//完整的写法是  { .__fun= __iar_program_start }, 
//这里简写成__iar_program_start,是否符合标准C,有待考证 
  .....  
  }  

补充: 
对联合体第一个元素赋初值,可以简写。 

{ .__fun= __iar_program_start },  
//__fun是联合体第一个元素,可直接简写成__iar_program_start. 
//符合标准C 
__sfe是IAR的“段操作符”segment operator。表示取某个段的后一个字节的地址。

比如"CSTACK"定义为0x20001000~0x20001fff。那__sfe( "CSTACK" ) 就得到0x20002000这个值,刚好用来初始化msp堆栈指针。

注意使用segment operator前,需要先定义段名如下:

#pragma segment="CSTACK"

阅读(5170) | 评论(0) | 转发(0) |
给主人留下些什么吧!~~