操作系统:ubuntu10.04
前言:
在上一章节中,详细分析了uboot中的顶级makefile,了解了uboot的编译流程,在本章节中,将要详细分析的是uboot 的执行流程。
而uboot的第一条执行,是在 start.S 的。
一,start.S的详细分析。
点击(此处)折叠或打开
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/*
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* armboot - Startup Code for ARM920 CPU-core
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*
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* Copyright (c) 2001 Marius Gr鰃er
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* Copyright (c) 2002 Alex Z黳ke
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* Copyright (c) 2002 Gary Jennejohn
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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-
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#include <config.h> /* ./include/config.h */
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#include <version.h> /* ./include/version.h */
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-
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/*
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*************************************************************************
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*
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* Jump vector table as in table 3.1 in [1]
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*
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*************************************************************************
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*/
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-
/*
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global声明一个符号可被其他文档引用,相当于声明了一个全局变量,.globl和.global相同。
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详情请看:http://blog.chinaunix.net/uid-28458801-id-3554759.html
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_start就是整个start.S的最开始,即整个uboot的代码的开始。
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_start后面加上一个冎号’:’,表示其是一个标号Label,类似亍C诧言goto后面的标号。
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而同时,_start的值,也就是返个代码的位置了,此处即为代码的最开始,相对的0的位置。
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b reset :表示跳转到 reset 执行,并且不返回
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ldr: LDR伪指令-----大范围的地址读取
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详情请看:1,http://blog.chinaunix.net/uid-28458801-id-3753775.html
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2,http://blog.chinaunix.net/uid-28458801-id-3753657.html
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.word .word expr {,expr}… 分配一段字内存单元,幵用expr初始化字内存单元(32bit)
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以_undefined_instruction为例,就是,此处分配了一个word=32bit=4字节
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的地址空间,里面存放的值是undefined_instruction。
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而此处_undefined_instruction也就是该地址空间的地址了。用C诧言来表达就是:
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_undefined_instruction = &undefined_instruction。
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在后面的代码,我们可以看到,undefined_instruction也是一个标号,即一个地址值,对应着
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就是在发生“未定义指令”的时候,系统所要去执行的代码。
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所以:
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ldr pc, 标号1
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。。。
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标号1:.word 标号2
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标号2:
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。。。(具体要执行的代码)
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的意思就是,将地址为标号1中内容载入到pc,而地址为标号1中的内容,正好装的是标号2。
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用C诧言表达其实很简单:
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PC = *(标号1) = 标号2
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对PC赋值,即是实现代码跳转,所以整个返段汇编代码的意思就是:
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跳转到标号2的位置,执行对应的代码。
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.balignl 16,0xdeadbeef 意思就是,接下来的代码,都要16字节对齐,不足之处,用0xdeadbeef填充。
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*/
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.globl _start
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_start: b reset
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ldr pc, _undefined_instruction
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ldr pc, _software_interrupt
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ldr pc, _prefetch_abort
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ldr pc, _data_abort
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ldr pc, _not_used
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ldr pc, _irq
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ldr pc, _fiq
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_undefined_instruction: .word undefined_instruction
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_software_interrupt: .word software_interrupt
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_prefetch_abort: .word prefetch_abort
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_data_abort: .word data_abort
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_not_used: .word not_used
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_irq: .word irq
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_fiq: .word fiq
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.balignl 16,0xdeadbeef
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-
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/*
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*************************************************************************
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*
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* Startup Code (reset vector)
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*
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* do important init only if we don't start from memory!
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* relocate armboot to ram
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* setup stack
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* jump to second stage
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*
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*************************************************************************
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*/
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/*
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_TEXT_BASE是一个标号地址,此地址中是一个word类型的变量,变量名是TEXT_BASE,代码的基地址.
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TEXT_BASE 定义在 \board\xx\config.mk,假设为 TEXT_BASE = 0x33D00000
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*(_armboot_start) = _start
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*/
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_TEXT_BASE:
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.word TEXT_BASE
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.globl _armboot_start
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_armboot_start:
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.word _start
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/*
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* These are defined in the board-specific linker script.
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*/
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/*
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_bss_start和_bss_end都叧是两个标号,对应着此处的地址。
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而两个地址里面分别存放的值是__bss_start和_end,这两个的值,定义在 \board\xx\u-boot.lds 中。
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而关亍_bss_start和_bss_end定义为.glogl即全局变量,是因为uboot的其他源码中要用到这两个变量。
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FREE_RAM_END和FREE_RAM_SIZE,PreLoadedONRAM,IRQ_STACK_START,FIQ_STACK_START,之所以也是声明为全局变量,
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是因为uboot的源码中会用到这些变量。
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*/
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.globl _bss_start
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_bss_start:
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.word __bss_start
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.globl _bss_end
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_bss_end:
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.word _end
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.globl FREE_RAM_END
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FREE_RAM_END:
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.word 0x0badc0de
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.globl FREE_RAM_SIZE
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FREE_RAM_SIZE:
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.word 0x0badc0de
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.globl PreLoadedONRAM
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PreLoadedONRAM:
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.word 0
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#ifdef CONFIG_USE_IRQ
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/* IRQ stack memory (calculated at run-time) */
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.globl IRQ_STACK_START
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IRQ_STACK_START:
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.word 0x0badc0de
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/* IRQ stack memory (calculated at run-time) */
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.globl FIQ_STACK_START
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FIQ_STACK_START:
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.word 0x0badc0de
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#endif
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-
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/*
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* the actual reset code
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*/
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/*
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对 mrs 和msr 有疑问的请看:http://blog.chinaunix.net/uid-28458801-id-4083956.html
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*/
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reset:
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/*
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* set the cpu to SVC32 mode.设置cpu为 SVC模式。
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* 如果对arm的个模式有疑问的请看:1,http://blog.chinaunix.net/uid-28458801-id-3788554.html
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* 2,http://blog.chinaunix.net/uid-28458801-id-3494646.html
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*/
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mrs r0,cpsr /* 传送CPSR的内容到R0 */
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bic r0,r0,#0x1f /* 清除r0的bit[4:0]位 */
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orr r0,r0,#0xd3 /* 把r0的bit[7:6]和bit[4]和bit[2:0]置为1 */
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msr cpsr,r0 /* 将r0的值赋给CPSR */
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/* turn off the watchdog */
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#if defined(CONFIG_S3C2400)
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# define pWTCON 0x15300000
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# define INTMSK 0x14400008 /* Interupt-Controller base addresses */
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# define CLKDIVN 0x14800014 /* clock divisor register */
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#elif defined(CONFIG_S3C2410)
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# define pWTCON 0x53000000
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# define INTMOD 0X4A000004
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# define INTMSK 0x4A000008 /* Interupt-Controller base addresses */
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# define INTSUBMSK 0x4A00001C
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# define CLKDIVN 0x4C000014 /* clock divisor register */
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#endif
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-
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/*
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以上是看门狗的相关寄存器的地址。
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对 ldr伪指令 有疑惑的请看:http://blog.chinaunix.net/uid-28458801-id-4084264.html
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先是用r0寄存器存pWTCON的值,然后r1=0,再将r1中的0写入到pWTCON寄存器中,其实就是
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*((int *)pWTCON) = 0;
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*/
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#if defined(CONFIG_S3C2400) || defined(CONFIG_S3C2410)
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ldr r0, =pWTCON /* 宏pWTCON的值赋值给r0寄存器 */
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mov r1, #0x0
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str r1, [r0]
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/*
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* mask all IRQs by setting all bits in the INTMR - default
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* 关闭所有中断。
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* INTMSK寄存器设置为0xffffffff
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*/
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mov r1, #0xffffffff
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ldr r0, =INTMSK
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str r1, [r0]
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/* 将INTSUBMSK寄存器的值设置为0x3ff。*/
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# if defined(CONFIG_S3C2410)
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ldr r1, =0x3ff
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ldr r0, =INTSUBMSK
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str r1, [r0]
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# endif
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#if 0 /* 不编译*/
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/* FCLK:HCLK:PCLK = 1:2:4 */
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/* default FCLK is 120 MHz ! */
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ldr r0, =CLKDIVN
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mov r1, #3
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str r1, [r0]
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#endif
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#endif /* CONFIG_S3C2400 || CONFIG_S3C2410 */
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/*
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* we do sys-critical inits only at reboot,
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* not when booting from ram!
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*/
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/*
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ADR伪指令--- 小范围的地址读取
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*/
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#ifndef CONFIG_SKIP_LOWLEVEL_INIT
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adr r0, _start /* r0 <- current position of code ,将_start的地址赋值给r0 */
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ldr r1, _TEXT_BASE /* test if we run from flash or RAM*/
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cmp r0, r1 /* don't reloc during debug , 比较r0和r1是否相等 */
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blne cpu_init_crit /* 如果r0和r1不相等,则执行 cpu_init_crit*/
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#endif
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/* Set up the stack
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CFG_MALLOC_LEN,CFG_GBL_DATA_SIZE 定义在\include\configs\xx.h
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#define CFG_MALLOC_LEN (CFG_ENV_SIZE + 128*1024)
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#define CFG_GBL_DATA_SIZE 128 /* size in bytes reserved for initial data */
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#define CFG_ENV_SIZE 0x20000 /* Total Size of Environment Sector */
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#define CONFIG_STACKSIZE_IRQ (4*1024) /* IRQ stack */
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#define CONFIG_STACKSIZE_FIQ (4*1024) /* FIQ stack */
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*/
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stack_setup:
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ldr r0, _TEXT_BASE /* upper 128 KiB: relocated uboot ,地址为_TEXT_BASE的内存中的内容给r0 */
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sub r0, r0, #CFG_MALLOC_LEN /* malloc area ,256 kb */
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sub r0, r0, #CFG_GBL_DATA_SIZE /* bdinfo ,128 byte */
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/* cpu/arm920t/cpu.c 中的 cpu_init 中真正的为 IRQ,FIQ模式划分了栈*/
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#ifdef CONFIG_USE_IRQ
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sub r0, r0, #(CONFIG_STACKSIZE_IRQ+CONFIG_STACKSIZE_FIQ) /* 4kb + 4kb*/
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#endif
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sub sp, r0, #12 /* leave 3 words for abort-stack ,12 byte */
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#ifndef CONFIG_SKIP_LOWLEVEL_INIT
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bl clock_init /* 初始化系统时钟*/
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#endif
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#ifndef CONFIG_SKIP_RELOCATE_UBOOT
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relocate: /* relocate U-Boot to RAM */
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adr r0, _start /* r0 <- current position of code */
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ldr r1, _TEXT_BASE /* test if we run from flash or RAM */
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cmp r0, r1 /* don't reloc during debug */
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beq clear_bss
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ldr r2, _armboot_start /* _start */
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ldr r3, _bss_start
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sub r2, r3, r2 /* r2 <- size of armboot */
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#if 1
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bl CopyCode2Ram /* r0: source, r1: dest, r2: size */
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#else
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add r2, r0, r2 /* r2 <- source end address */
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copy_loop:
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ldmia {r3-r10} /* copy from source address [r0] */
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stmia {r3-r10} /* copy to target address [r1] */
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cmp r0, r2 /* until source end addreee [r2] */
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ble copy_loop
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#endif
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#endif /* CONFIG_SKIP_RELOCATE_UBOOT */
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/* 清除 bss 段*/
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clear_bss:
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ldr r0, _bss_start /* find start of bss segment */
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ldr r1, _bss_end /* stop here */
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mov r2, #0x00000000 /* clear */
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clbss_l:str r2, [r0] /* clear loop... */
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add r0, r0, #4
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cmp r0, r1
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ble clbss_l
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SetLoadFlag:
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/* Set a global flag, PreLoadedONRAM */
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adr r0, _start /* r0 <- current position of code */
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ldr r1, _TEXT_BASE /* test if we run from flash or RAM */
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cmp r0, r1 /* don't reloc during debug */
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ldr r2, =PreLoadedONRAM
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mov r3, #1
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streq r3, [r2]
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#if 0 /* 不编译*/
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/* try doing this stuff after the relocation */
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ldr r0, =pWTCON
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mov r1, #0x0
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str r1, [r0]
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/*
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* mask all IRQs by setting all bits in the INTMR - default
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*/
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mov r1, #0xffffffff
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ldr r0, =INTMR
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str r1, [r0]
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/* FCLK:HCLK:PCLK = 1:2:4 */
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/* default FCLK is 120 MHz ! */
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ldr r0, =CLKDIVN
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mov r1, #3
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str r1, [r0]
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/* END stuff after relocation */
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#endif
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ldr pc, _start_armboot
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_start_armboot: .word start_armboot /* 进入c函数阶段 ./lib_arm/board.c */
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-
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/*
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*************************************************************************
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*
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* CPU_init_critical registers
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*
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* setup important registers
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* setup memory timing
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*
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*************************************************************************
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*/
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-
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#ifndef CONFIG_SKIP_LOWLEVEL_INIT
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cpu_init_crit:
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/*
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* flush v4 I/D caches
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*/
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mov r0, #0
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mcr p15, 0, r0, c7, c7, 0 /* flush v3/v4 cache */
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mcr p15, 0, r0, c8, c7, 0 /* flush v4 TLB */
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/*
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* disable MMU stuff and caches
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*/
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mrc p15, 0, r0, c1, c0, 0
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bic r0, r0, #0x00002300 @ clear bits 13, 9:8 (--V- --RS)
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bic r0, r0, #0x00000087 @ clear bits 7, 2:0 (B--- -CAM)
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orr r0, r0, #0x00000002 @ set bit 2 (A) Align
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orr r0, r0, #0x00001000 @ set bit 12 (I) I-Cache
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mcr p15, 0, r0, c1, c0, 0
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/*
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* before relocating, we have to setup RAM timing
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* because memory timing is board-dependend, you will
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* find a lowlevel_init.S in your board directory.
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*/
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mov ip, lr
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bl lowlevel_init /* 设置存储控制器,使得外接的sdram可用*/
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mov lr, ip
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mov pc, lr
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#endif /* CONFIG_SKIP_LOWLEVEL_INIT */
-
-
/*
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*************************************************************************
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*
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* Interrupt handling
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*
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*************************************************************************
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*/
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-
@
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@ IRQ stack frame.
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@
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#define S_FRAME_SIZE 72
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-
#define S_OLD_R0 68
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#define S_PSR 64
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#define S_PC 60
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#define S_LR 56
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#define S_SP 52
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#define S_IP 48
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#define S_FP 44
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#define S_R10 40
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#define S_R9 36
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#define S_R8 32
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#define S_R7 28
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#define S_R6 24
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#define S_R5 20
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#define S_R4 16
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#define S_R3 12
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#define S_R2 8
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#define S_R1 4
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#define S_R0 0
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-
#define MODE_SVC 0x13
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#define I_BIT 0x80
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-
/*
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* use bad_save_user_regs for abort/prefetch/undef/swi ...
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* use irq_save_user_regs / irq_restore_user_regs for IRQ/FIQ handling
-
*/
-
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.macro bad_save_user_regs
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sub sp, sp, #S_FRAME_SIZE
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stmia sp, {r0 - r12} @ Calling r0-r12
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ldr r2, _armboot_start
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sub r2, r2, #(CONFIG_STACKSIZE+CFG_MALLOC_LEN)
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sub r2, r2, #(CFG_GBL_DATA_SIZE+8) @ set base 2 words into abort stack
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ldmia r2, {r2 - r3} @ get pc, cpsr
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add r0, sp, #S_FRAME_SIZE @ restore sp_SVC
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add r5, sp, #S_SP
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mov r1, lr
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stmia r5, {r0 - r3} @ save sp_SVC, lr_SVC, pc, cpsr
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mov r0, sp
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.endm
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.macro irq_save_user_regs
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sub sp, sp, #S_FRAME_SIZE
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stmia sp, {r0 - r12} @ Calling r0-r12
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add r8, sp, #S_PC
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stmdb r8, {sp, lr}^ @ Calling SP, LR
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str lr, [r8, #0] @ Save calling PC
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mrs r6, spsr
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str r6, [r8, #4] @ Save CPSR
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str r0, [r8, #8] @ Save OLD_R0
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mov r0, sp
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.endm
-
-
.macro irq_restore_user_regs
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ldmia sp, {r0 - lr}^ @ Calling r0 - lr
-
mov r0, r0
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ldr lr, [sp, #S_PC] @ Get PC
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add sp, sp, #S_FRAME_SIZE
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subs pc, lr, #4 @ return & move spsr_svc into cpsr
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.endm
-
-
.macro get_bad_stack
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ldr r13, _armboot_start @ setup our mode stack
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sub r13, r13, #(CONFIG_STACKSIZE+CFG_MALLOC_LEN)
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sub r13, r13, #(CFG_GBL_DATA_SIZE+8) @ reserved a couple spots in abort stack
-
-
str lr, [r13] @ save caller lr / spsr
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mrs lr, spsr
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str lr, [r13, #4]
-
-
mov r13, #MODE_SVC @ prepare SVC-Mode
-
@ msr spsr_c, r13
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msr spsr, r13
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mov lr, pc
-
movs pc, lr
-
.endm
-
-
.macro get_irq_stack @ setup IRQ stack
-
ldr sp, IRQ_STACK_START
-
.endm
-
-
.macro get_fiq_stack @ setup FIQ stack
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ldr sp, FIQ_STACK_START
-
.endm
-
-
/*
-
* exception handlers
-
*/
-
.align 5
-
undefined_instruction:
-
get_bad_stack
-
bad_save_user_regs
-
bl do_undefined_instruction
-
-
.align 5
-
software_interrupt:
-
get_bad_stack
-
bad_save_user_regs
-
bl do_software_interrupt
-
-
.align 5
-
prefetch_abort:
-
get_bad_stack
-
bad_save_user_regs
-
bl do_prefetch_abort
-
-
.align 5
-
data_abort:
-
get_bad_stack
-
bad_save_user_regs
-
bl do_data_abort
-
-
.align 5
-
not_used:
-
get_bad_stack
-
bad_save_user_regs
-
bl do_not_used
-
-
@ thisway.diy, 2006.06.24
-
.globl Launch
-
.align 4
-
Launch:
-
mov r7, r0
-
@ diable interrupt
-
@ disable watch dog timer
-
mov r1, #0x53000000
-
mov r2, #0x0
-
str r2, [r1]
-
-
ldr r1,=INTMSK
-
ldr r2,=0xffffffff @ all interrupt disable
-
str r2,[r1]
-
-
ldr r1,=INTSUBMSK
-
ldr r2,=0x7ff @ all sub interrupt disable
-
str r2,[r1]
-
-
ldr r1, = INTMOD
-
mov r2, #0x0 @ set all interrupt as IRQ (not FIQ)
-
str r2, [r1]
-
-
@
-
mov ip, #0
-
mcr p15, 0, ip, c13, c0, 0 @ /* zero PID */
-
mcr p15, 0, ip, c7, c7, 0 @ /* invalidate I,D caches */
-
mcr p15, 0, ip, c7, c10, 4 @ /* drain write buffer */
-
mcr p15, 0, ip, c8, c7, 0 @ /* invalidate I,D TLBs */
-
mrc p15, 0, ip, c1, c0, 0 @ /* get control register */
-
bic ip, ip, #0x0001 @ /* disable MMU */
-
mcr p15, 0, ip, c1, c0, 0 @ /* write control register */
-
-
@ MMU_EnableICache
-
@mrc p15,0,r1,c1,c0,0
-
@orr r1,r1,#(1<<12)
-
@mcr p15,0,r1,c1,c0,0
-
-
@ clear SDRAM: the end of free mem(has wince on it now) to the end of SDRAM
-
ldr r3, FREE_RAM_END
-
ldr r4, =PHYS_SDRAM_1+PHYS_SDRAM_1_SIZE @ must clear all the memory unused to zero
-
mov r5, #0
-
-
ldr r1, _armboot_start
-
ldr r2, =On_Steppingstone
-
sub r2, r2, r1
-
mov pc, r2
-
On_Steppingstone:
-
2: stmia {r5}
-
cmp r3, r4
-
bne 2b
-
-
@ set sp = 0 on sys mode
-
mov sp, #0
-
-
@ add by thisway.diy 2006.06.26, switch to SVC mode
-
msr cpsr_c, #0xdf @ set the I-bit = 1, diable the IRQ interrupt
-
msr cpsr_c, #0xd3 @ set the I-bit = 1, diable the IRQ interrupt
-
ldr sp, =0x31ff5800
-
-
nop
-
nop
-
nop
-
nop
-
-
mov pc, r7 @ Jump to PhysicalAddress
-
nop
-
mov pc, lr
-
-
#ifdef CONFIG_USE_IRQ
-
-
.align 5
-
irq:
-
/* add by to use IRQ for USB and DMA */
-
sub lr, lr, #4 @ the return address
-
ldr sp, IRQ_STACK_START @ the stack for irq
-
stmdb { r0-r12,lr } @ save registers
-
-
ldr lr, =int_return @ set the return addr
-
ldr pc, =IRQ_Handle @ call the isr
-
int_return:
-
ldmia { r0-r12,pc }^ @ return from interrupt
-
-
.align 5
-
fiq:
-
get_fiq_stack
-
/* someone ought to write a more effiction fiq_save_user_regs */
-
irq_save_user_regs
-
bl do_fiq
-
irq_restore_user_regs
-
-
#else
-
-
.align 5
-
irq:
-
get_bad_stack
-
bad_save_user_regs
-
bl do_irq
-
-
.align 5
-
fiq:
-
get_bad_stack
-
bad_save_user_regs
-
bl do_fiq
-
-
#endif
最后得到的内存分别如下:
二,my_uboot的实现思路
根据以上分析,总结了my_uboot的实现思路:
(1)设置 CPU 模式
(2)关闭看门狗
(3)关闭中断
(4)设置堆栈 sp 指针
(5)清除 bss 段
(6)异常中断处理
(7)跳转到 start_armboot 函数中执行。
(1)设置 CPU 模式
总的来说,就是将 CPU 设置为 SVC 模式。
(2)关闭看门狗
就是去设置对应的寄存器,将看门狗关闭。
(3)关闭中断
关闭中断,也是去设置对应的寄存器,即可。
(4)设置堆栈 sp 指针
设置堆栈以便 C 程序执行。
(5)清除 bss 段
此处很简单,就是将对应 bss 段,都设置为,0,即清零。
其对应的地址空间,就是那些未初始化的全局变量的地址。
(6)异常中断处理
异常中断处理,就是实现对应的常见的那些处理中断的部分内容。
说白了就是实现一个个中断凼数。 uboot在初始化的时候,主要目的叧是为了初始化系统,及引
导系统,所以,此处的中断处理部分的代码,往往相对比较简单,丌是很复杂
(7)跳转到 start_armboot 函数中执行
前面的6个操作都是汇编语言实现的,开发难度高,移植性低,因此在实现uboot的真正的引导linux内核的实现,还是由C语言来实现。
在此,初步的思路是:1,初始化。2,串口,以便调试。3,实现linux内核的引导。
三,疑问
在这实现中,有个很重要的疑问:通过什么方式来烧写uboot,linux内核,文件系统程序。
初步设想:通过 SEGGER的 J-Flash ARM 程序,把编译好的需要的3个文件烧写到Flash中对于的位置。
如果这个设想不通过,则需要在my_uboot中添加uboot的一下命令的实现。
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