关于codewarrior编译器的一些知识之 可变长度编码

The Variable Length Encoding (VLE) instruction set architecture is an extension to the instruction set specified in Freescale Semiconductor's Book E Implementation Standard (EIS) for Power Architecture processors. This instruction set adds a few identically operating counterparts to the regular EIS instruction set. But where regular EIS instructions occupy 32 bits and must be aligned to 32-bit boundaries, VLE instructions are either 16 or 32 bits long and can be aligned to 16-bit boundaries. This extra flexibility in instruction encoding and alignment allows the compiler and linker to greatly compress the size of runtime object code with only a small penalty in execution performance.

 

The VLE (Variable Length Encoding) instruction set is an extension to the instruction set specified in the Freescale Book E Implementation Standard (EIS). Not all Power Architecture processors have VLE capability. Refer to the manufacturer's documentation for the processor you are targeting. For information on the Book E and VLE programming models, see EREF: A Programmer's Reference Manual for Freescale Book E Processors, published by Freescale Semiconductor.

 

Table 22.10 shows how to control VLE (Variable Length Encoding) code generation.

Table 22.10 Controlling VLE code generation 

 

To control this option from here...	use this setting
CodeWarrior IDE	Zen in the Processor pop-up menu of the EPPC Processor settings panel, thenGenerate VLE Instructions in e500/Zen Options
C/C++ source code	__declspec(vle_on) __declspec(vle_off)
command line	-vle

 

Assembling VLE Instructions

The mnemonics for VLE (Variable Length Encoding) instructions begin with "se_" or "e_". The compiler's inline assembler recognizes these mnemonics when the compiler is configured to generate VLE object code.

Only a subset of EIS instructions have equivalent VLE instructions. To save you time and effort, the inline assembler can convert regular EIS instructions to equivalent VLE instructions automatically. In other words, the inline assembler can generate VLE object code from inline assembly statements that use only regular mnemonics. Table 22.11 shows how to control VLE code generation for inline assembly statements.

Table 22.11 Controlling VLE inline assembly 

 

To control this option from here...	use this setting
CodeWarrior IDE	Zen in the Processor pop-up menu of the EPPC Processor settings panel, thenTranslate PPC Asm to VLE ASM in e500/Zen Options
command line	-ppc_asm_to_vle

 

The stand-alone assembler also recognizes and generates VLE instructions. Table 22.12 shows how to control VLE code generation with the standalone assembler.

Table 22.12 Controlling VLE code generation for the standalone assembler 

 

To control this option from here...	use this setting
CodeWarrior IDE	Zen in the Processor pop-up menu of the EPPC Processor settings panel, thenGenerate VLE Instructions in e500/Zen Options
command line	-vle

 

To specify that a section containing executable code should be executed in the processor's VLE mode, use the text_vle identifier with the .section directive. Listing 22.7 shows examples.

Listing 22.7 Examples of specifying VLE sections in standalone assembly

.section .text_vle # Section name is .text_vle
.section .text,text_vle # Section name is .text
.section .littletext,text_vle # Section name is .littletext

Unlike the inline assembler, the standalone assembler does not offer the option to convert regular instruction mnemonics to VLE instructions. To perform this conversion automatically, copy and paste standalone assembly source code into a C or C++ source file, shown in Listing 22.8.

Listing 22.8 Using automatic VLE instruction conversion

extern asm void my_func(void)
{
    nofralloc /* No stack frame. */
    /* Paste standalone assembly source code here. */
}

	Linking VLE Object Code



	A processor capable of executing VLE (Variable Length Encoding) instructions must use separate memory pages for VLE and regular instructions. The compiler and linker ensure this separation by placing executable code that uses VLE instructions and regular instructions in separate object code sections.



	To maintain this separation in your own linker command file, specify output sections for VLE and regular instructions. Listing 22.9 shows an example. This linker control file specifies that output sections named .init_vle and .text_vle should only contain object code that the compiler has tagged with VLECODE.



	Listing 22.9 Separating VLE and regular object code in the linker's output file


.init : { } > code
.init_vle (VLECODE) : {
    *(.init)
    *(.init_vle)
} > code

.text : { } > code
.text_vle (VLECODE) : {
*(.text)
*(.text_vle)
} > code

 

	To save memory space, the linker compresses VLE object code by shortening the gaps between functions. A VLE function must meet these criteria to be re-aligned:


	 
	

		

			The VLE function is referred to only by other VLE functions.
		
	
 
	

		The linker will not re-align a function if it is referred to by a non-VLE function.
	
 
	

		

			The VLE function's alignment is 4 bytes.
		
	
 
	

		The linker will not re-align a function if the compiler's function alignment settings specify an explicit alignment value.
	
 
	

		

			The object code was generated by the CodeWarrior compiler.