6410下经典天马3.5寸屏初始化程序

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#include "s3cfb.h"

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#define S3CFB_SPI_CH  0

#define S3CFB_HFP   18 /* front porch */
#define S3CFB_HSW   52 /* hsync width */
#define S3CFB_HBP   18 /* back porch */

#define S3CFB_VFP   10 /* front porch */
#define S3CFB_VSW   3 /* vsync width */
#define S3CFB_VBP   10 /* back porch */

#define S3CFB_HRES  320 /* horizon pixel  x resolition */
#define S3CFB_VRES  240 /* line cnt       y resolution */

#define S3CFB_HRES_VIRTUAL 320 /* horizon pixel  x resolition */
#define S3CFB_VRES_VIRTUAL 480 /* line cnt       y resolution */

#define S3CFB_HRES_OSD  320 /* horizon pixel  x resolition */
#define S3CFB_VRES_OSD  240 /* line cnt       y resolution */

#define S3CFB_VFRAME_FREQ     60 /* frame rate freq */

#define S3CFB_PIXEL_CLOCK (S3CFB_VFRAME_FREQ * (S3CFB_HFP + S3CFB_HSW + S3CFB_HBP + S3CFB_HRES) * (S3CFB_VFP + S3CFB_VSW + S3CFB_VBP + S3CFB_VRES))

static void s3cfb_set_fimd_info(void)
{
// s3cfb_fimd.vidcon1 = S3C_VIDCON1_IHSYNC_NORMAL | S3C_VIDCON1_IVSYNC_NORMAL | S3C_VIDCON1_IVDEN_NORMAL;
 s3cfb_fimd.vidcon1 = S3C_VIDCON1_IHSYNC_INVERT | S3C_VIDCON1_IVSYNC_INVERT | S3C_VIDCON1_IVDEN_NORMAL;
 s3cfb_fimd.vidtcon0 = S3C_VIDTCON0_VBPD(S3CFB_VBP - 1) | S3C_VIDTCON0_VFPD(S3CFB_VFP - 1) | S3C_VIDTCON0_VSPW(S3CFB_VSW - 1);
 s3cfb_fimd.vidtcon1 = S3C_VIDTCON1_HBPD(S3CFB_HBP - 1) | S3C_VIDTCON1_HFPD(S3CFB_HFP - 1) | S3C_VIDTCON1_HSPW(S3CFB_HSW - 1);
 s3cfb_fimd.vidtcon2 = S3C_VIDTCON2_LINEVAL(S3CFB_VRES - 1) | S3C_VIDTCON2_HOZVAL(S3CFB_HRES - 1);

 s3cfb_fimd.vidosd0a = S3C_VIDOSDxA_OSD_LTX_F(0) | S3C_VIDOSDxA_OSD_LTY_F(0);
 s3cfb_fimd.vidosd0b = S3C_VIDOSDxB_OSD_RBX_F(S3CFB_HRES - 1) | S3C_VIDOSDxB_OSD_RBY_F(S3CFB_VRES - 1);

 s3cfb_fimd.vidosd1a = S3C_VIDOSDxA_OSD_LTX_F(0) | S3C_VIDOSDxA_OSD_LTY_F(0);
 s3cfb_fimd.vidosd1b = S3C_VIDOSDxB_OSD_RBX_F(S3CFB_HRES_OSD - 1) | S3C_VIDOSDxB_OSD_RBY_F(S3CFB_VRES_OSD - 1);

 s3cfb_fimd.width = S3CFB_HRES;
 s3cfb_fimd.height = S3CFB_VRES;
 s3cfb_fimd.xres = S3CFB_HRES;
 s3cfb_fimd.yres = S3CFB_VRES;

#if defined(CONFIG_FB_S3C_EXT_VIRTUAL_SCREEN)
 s3cfb_fimd.xres_virtual = S3CFB_HRES_VIRTUAL;
 s3cfb_fimd.yres_virtual = S3CFB_VRES_VIRTUAL;
#else
 s3cfb_fimd.xres_virtual = S3CFB_HRES;
 s3cfb_fimd.yres_virtual = S3CFB_VRES;
#endif

 s3cfb_fimd.osd_width = S3CFB_HRES_OSD;
 s3cfb_fimd.osd_height = S3CFB_VRES_OSD;
 s3cfb_fimd.osd_xres = S3CFB_HRES_OSD;
 s3cfb_fimd.osd_yres = S3CFB_VRES_OSD;

 s3cfb_fimd.osd_xres_virtual = S3CFB_HRES_OSD;
 s3cfb_fimd.osd_yres_virtual = S3CFB_VRES_OSD;

 s3cfb_fimd.pixclock = S3CFB_PIXEL_CLOCK;

 s3cfb_fimd.hsync_len = S3CFB_HSW;
 s3cfb_fimd.vsync_len = S3CFB_VSW;
 s3cfb_fimd.left_margin = S3CFB_HFP;
 s3cfb_fimd.upper_margin = S3CFB_VFP;
 s3cfb_fimd.right_margin = S3CFB_HBP;
 s3cfb_fimd.lower_margin = S3CFB_VBP;
}

#define S3CFB_SPI_CLK(x) (S3C64XX_GPC(1 + (x * 4)))
#define S3CFB_SPI_MOSI(x) (S3C64XX_GPC(2 + (x * 4)))
#define S3CFB_SPI_CS(x)  (S3C64XX_GPC(3 + (x * 4)))

inline void s3cfb1_spi_lcd_dclk(int ch, int value)
{
 gpio_set_value(S3CFB_SPI_CLK(ch), value);
}

inline void s3cfb1_spi_lcd_dseri(int ch, int value)
{
 gpio_set_value(S3CFB_SPI_MOSI(ch), value);
}

inline void s3cfb1_spi_lcd_den(int ch, int value)
{
 gpio_set_value(S3CFB_SPI_CS(ch), value);
}

inline void s3cfb1_spi_set_lcd_data(int ch)
{
 s3c_gpio_cfgpin(S3CFB_SPI_CLK(ch),S3C_GPIO_OUTPUT);
 s3c_gpio_cfgpin(S3CFB_SPI_MOSI(ch),S3C_GPIO_OUTPUT);
 s3c_gpio_cfgpin(S3CFB_SPI_CS(ch),S3C_GPIO_OUTPUT);

 s3c_gpio_setpull(S3CFB_SPI_CLK(ch),S3C_GPIO_PULL_NONE);
 s3c_gpio_setpull(S3CFB_SPI_MOSI(ch),S3C_GPIO_PULL_NONE);
 s3c_gpio_setpull(S3CFB_SPI_CS(ch),S3C_GPIO_PULL_NONE);
}

#define LCD_nCS_H s3cfb_spi_lcd_den(S3CFB_SPI_CH, 1)
#define LCD_nCS_L s3cfb_spi_lcd_den(S3CFB_SPI_CH, 0)
#define LCD_SCL_H s3cfb_spi_lcd_dclk(S3CFB_SPI_CH, 1)
#define LCD_SCL_L s3cfb_spi_lcd_dclk(S3CFB_SPI_CH, 0)
#define LCD_SDI_H s3cfb_spi_lcd_dseri(S3CFB_SPI_CH, 1)
#define LCD_SDI_L s3cfb_spi_lcd_dseri(S3CFB_SPI_CH, 0)

static  void  spi_write_reg(unsigned int reg, unsigned int val)  
{     
 unsigned char no;  
 unsigned short value;  
 unsigned char a=0;  
 unsigned char b=0;  

 a=reg;   
 b=val;   
 LCD_nCS_H;  
 LCD_SCL_L; 
 udelay(5);   
 LCD_SDI_L; 
 LCD_nCS_L; 
 udelay(5);
 value=(a & 0x3F)<<10;
     value|=(0x0200)|b;
 for(no=0;no<16;no++){    
  LCD_SCL_L; 
  udelay(5); 
  if(value&0x8000)     
   LCD_SDI_H;      
  else        
   LCD_SDI_L;   
  udelay(5);   
  LCD_SCL_H;  
  value=(value<<1); 
 }     
 LCD_nCS_H;   
 udelay(5);    
}

static void s3cfb1_init_ldi(void)
{
 LCD_nCS_H;
     LCD_SCL_H;
     LCD_SDI_H;  
   udelay(5);
 LCD_nCS_L;
     LCD_SCL_L;
     LCD_SDI_L; 
 udelay(5);                         

 spi_write_reg(0x00, 0x07); 
 spi_write_reg(0x01, 0x00); 
 spi_write_reg(0x02, 0x03); 
 spi_write_reg(0x03, 0xcc);
 spi_write_reg(0x04, 0x46); 
 spi_write_reg(0x05, 0x0d); 
 spi_write_reg(0x06, 0x00); 
 spi_write_reg(0x07, 0x00);
 spi_write_reg(0x08, 0x08);
 spi_write_reg(0x09, 0x40);
 spi_write_reg(0x0a, 0x88); 
 spi_write_reg(0x0b, 0x88); 
 spi_write_reg(0x0c, 0x30);
 spi_write_reg(0x0d, 0x20); 
    
 spi_write_reg(0x0e, 0x6a);    
 spi_write_reg(0x0f, 0xa4); 
 spi_write_reg(0x10, 0x04); 
 spi_write_reg(0x11, 0x24); 
 spi_write_reg(0x12, 0x24); 
 spi_write_reg(0x1e, 0x00);
 spi_write_reg(0x20, 0x00);

 LCD_nCS_H;
 LCD_SCL_H;
 LCD_SDI_H;   
}

void s3cfb_init_hw_35(void)
{
 printk(KERN_INFO "LCD TYPE :: L35T32 will be initialized\n");

 s3cfb_set_fimd_info();
 s3cfb_set_gpio();
 s3cfb_spi_set_lcd_data(S3CFB_SPI_CH);
 s3cfb1_init_ldi();
}