1 copy sepfb.c sepfb.h to /driver/video/sep0718fb.c sep0718.h
2 modify /driver/video/kconfig
add
config FB_SEP0718
tristate "SEP0718 320*240 24bit LCD support"
depends on (FB = y) && ARM && ARCH_SEP0718
select FB_CFB_FILLRECT
select FB_CFB_COPYAREA
select FB_CFB_IMAGEBLIT
3 modify /driver/video/Makefile
add
obj-$(CONFIG_FB_SEP0718) += sep0718fb.o
4 modify /arch/arm/mach-sep0718/0718.c
add
/*****************************************************************
LCD Controller
*******************************************************************/
static struct sep4020fb_mach_info __initdata ub4020_lcd_cfg =
{
.regs = {
.sep_size = YMAX | XMAX,
.sep_pcr = BPIX | YUV_Mode | PIXPOL | FLMPOL | LPPOL | CLKPOL | OEPOL | END_SEL | ACD_SEL | ACD | PCD,
.sep_hcr = H_WIDTH|H_WAIT_1|H_WAIT_2,
.sep_vcr = V_WIDTH|PASS_FRAME_WAIT|V_WAIT_1|V_WAIT_2,
.sep_pwmr = SCR|CC_EN|PW,
.sep_dmacr = BL|HM|TM,
},
.width = LCDWIDTH,
.height = LCDHEIGHT,
.xres = {
.min = LCDWIDTH,
.max = LCDWIDTH,
.defval = LCDWIDTH,
},
.yres = {
.min = LCDHEIGHT,
.max = LCDHEIGHT,
.defval = LCDHEIGHT,
},
.bpp = {
.min = 24,
.max = 24,
.defval = 24,
},
};
static struct resource sep_lcd_resource[] = {
[0] = {
.start = LCDC_BASE_V,
.end = LCDC_BASE_V + SZ_4K - 1,
.flags = IORESOURCE_MEM,
},
[1] = {
.start = INTSRC_LCDC,
.end = INTSRC_LCDC,
.flags = IORESOURCE_IRQ,
}
};
static u64 sep_device_lcd_dmamask = 0xffffffffUL;
struct platform_device sep_device_lcd = {
.name = "sep0718-lcd",
.id = -1,
.num_resources = ARRAY_SIZE(sep_lcd_resource),
.resource = sep_lcd_resource,
.dev = {
.dma_mask = &sep_device_lcd_dmamask,
.coherent_dma_mask = 0xffffffffUL
}
};
void __init sep4020_fb_set_platdata(struct sep4020fb_mach_info *pd)
{
struct sep4020fb_mach_info *npd;
npd = kmalloc(sizeof(*npd), GFP_KERNEL);
if (npd)
{
memcpy(npd, pd, sizeof(*npd));
sep_device_lcd.dev.platform_data = npd;
platform_device_register(&sep_device_lcd);
}
else
{
printk(KERN_ERR "no memory for LCD platform data\n");
}
}
5 modify /driver/video/sepfb.c to sep0718.fb
line544 .name = "sep0718-lcd",
change all LCDC_LCDISREN_V to LCDC_INT_EN_V
change all LCDC_LCDISR_V to LCDC_LCDISR_V
del line 137 fbi->regs.sep_pcr |= (PBSIZE);
还有若干修改，主要将16bbp修改为24bbp，RGB都为8bit
6 modify /arch/arm/mach-sep0718/include/mach/fb-320*240.h
#define LCDWIDTH 320
#define LCDHEIGHT 240
//Macro for SIZE register setting
#define XMAX ((LCDWIDTH/16) << 20)
#define YMAX (LCDHEIGHT)
//Macro for PCR register setting
#define BPIX (6 << 24)
#define YUV_Mode (0 << 20) //it must be careful that this value is only 0 or 1
#define PIXPOL (0 << 19) //像素极性—设置像素的极性,高有效
#define FLMPOL (1 << 18) //首行标志极性—设置首行标志的极性,低有效.
#define LPPOL (1 << 17) //行脉冲极性—设置行脉冲信号的极性,低有效.
#define CLKPOL (1 << 16) //LCD 移位时钟极性—设置LCD 移位时钟的有效沿的极性,下降延有效. 1025 修正为1
#define OEPOL (1 << 15) //输出使能极性—设置输出使能信号的极性,高有效.
#define END_SEL (0 << 14) //印第安格式选择,小印第安.
#define ACD_SEL (0 << 13) //ACD时钟源选择—选择晶向变换计数器的时钟,使用FLM 作为ACD 计数时钟
#define ACD (0 << 6 ) //被动模式.
#define PCD (8)
//Macro for HCR regiter setting //水平配置寄存器.
#define H_WIDTH (1 << 26)
#define H_WAIT_1 (19 << 8)
#define H_WAIT_2 (63)
//Macro for VCR register setting //垂直配置寄存器.
#define V_WIDTH (2 << 26)
#define PASS_FRAME_WAIT (10 <<16)
#define V_WAIT_1 (3 << 8)
#define V_WAIT_2 (15)
//Macro for PWMR register setting
#define SCR (1 << 9) //时钟源选择.行脉冲.
#define CC_EN (0 << 8) //对比度控制使能,关.
#define PW (255) //输出脉冲数目,
//Macro for DMACR register setting
#define BL (1 << 31) //固定长度.
#define HM (7 << 16)
#define TM (7)
7 make menuconfig
│ │ <*> Support for frame buffer devices ---> │ │
│ │ [ ] Backlight & LCD device support ---> │ │
│ │ Display device support ---> │ │
│ │ Console display driver support ---> │ │
│ │ [*] Bootup logo --->
*** Frame buffer hardware drivers *** │ │
│ │ <*> SEP0718 320*240 24bit LCD support
│ │ <*> Framebuffer Console support │ │
│ │ [ ] Map the console to the primary display device (NEW) │ │
│ │ [ ] Framebuffer Console Rotation (NEW) │ │
│ │ [*] Select compiled-in fonts │ │
│ │ [*] VGA 8x8 font
8 make
9 调了一整天lcd的时序，总是无法显示任何内容，最后发现启动时要拉高lcd的复位口线，晕
// Set the LCDC RESET# High
*(volatile unsigned long*)GPIO_PORTC_DIR_V = 0x0;
*(volatile unsigned long*)GPIO_PORTC_SEL_V = 0x80;
*(volatile unsigned long*)GPIO_PORTC_DATA_V = 0x80;
