分类： 嵌入式
2010-09-28 13:03:57
建立自己的开发板
在SMDK2410上移植, 交叉编译器：arm-linux-gcc—3.4.5
解压U-BOOT-1.1.6，进入U-BOOT目录，在board目录下，新建自己的开发板目录TX24x0，把smdk2410目录下的所有文件拷到TX24x0，把smdk2410.c改为 TX24X0.c。修改该目录下的Makefile，把smdk2410.o改为TX24x0.o。
COBJS := TX24X0.o flash.o
在include/configs目录下创建板子的配置头文件，把smdk2410.h改名为TX24x0.h，
修改顶层Makefile：
在smdk2410_config : unconfig
@$(MKCONFIG) $(@:_config=) arm arm920t smdk2410 NULL s3c24x0
加上
TX24x0_config : unconfig
@$(MKCONFIG) $(@:_config=) arm arm920t TX24X0 NULL s3c24x0
各项的意思如下:
arm: CPU的架构(ARCH)
arm920t: CPU的类型(CPU)，其对应于cpu/arm920t子目录。
TX24X0: 开发板的型号(BOARD)，对应于board/ TX24X0目录。
NULL: 开发者/或经销商(vender)。
s3c24x0: 片上系统(SOC)。
在第128行：
ifeq ($(ARCH),arm)
CROSS_COMPILE = arm-linux-
指定交叉编译器，这里也可以写绝对路径
修改SDRAM配置，在board/ TX24X0/lowlevel_init.S中，检查
#define B6_BWSCON (DW32) 位宽为32
把B1_BWSCON 改为（DW16） B5_BWSCON 改为（DW8）
根据HCLK设置SDRAM 的刷新参数，主要是REFCNT寄存器，开发板HCLK为100M
将 #define REFCNT 0x1113 改为 #define REFCNT 0x4f4
测试能否编译成功：
执行make TX24X0_config
出现make: execvp: …………/mkconfig: 权限不够
查看mkconfig的权限，发现没有可执行权限，用chmod 764 mkconfig加上权限
然后再make，成功后可出现 Configuring for TX24X0 board.....
增加对S3C2440的支持
2440的时钟计算公式、NAND操作和2410不太一样。
对于2440开发板，将FCLK设为400MHz，分频比为FCLK：HCLK：PCLK=1：4：8。
修改board/ TX24X0/ TX24X0.c中的board_init函数
/* S3C2440: Mpll,Upll = (2*m * Fin) / (p * 2^s)
* m = M (the value for divider M)+ 8, p = P (the value for divider P) + 2
*/
#define S3C2440_MPLL_400MHZ ((0x7f<<12)|(0x02<<4)|(0x01))
#define S3C2440_UPLL_48MHZ ((0x38<<12)|(0x02<<4)|(0x02))
#define S3C2440_CLKDIV 0x05 /* FCLK:HCLK:PCLK = 1:4:8 */
/* S3C2410: Mpll,Upll = (m * Fin) / (p * 2^s)
* m = M (the value for divider M)+ 8, p = P (the value for divider P) + 2
*/
#define S3C2410_MPLL_200MHZ ((0x5c<<12)|(0x04<<4)|(0x00))
#define S3C2410_UPLL_48MHZ ((0x28<<12)|(0x01<<4)|(0x02))
#define S3C2410_CLKDIV 0x03 /* FCLK:HCLK:PCLK = 1:2:4 */
int board_init (void)
{
S3C24X0_CLOCK_POWER * const clk_power = S3C24X0_GetBase_CLOCK_POWER();
S3C24X0_GPIO * const gpio = S3C24X0_GetBase_GPIO();
/* set up the I/O ports */
gpio->GPACON = 0x007FFFFF;
gpio->GPBCON = 0x00044555;
gpio->GPBUP = 0x000007FF;
gpio->GPCCON = 0xAAAAAAAA;
gpio->GPCUP = 0x0000FFFF;
gpio->GPDCON = 0xAAAAAAAA;
gpio->GPDUP = 0x0000FFFF;
gpio->GPECON = 0xAAAAAAAA;
gpio->GPEUP = 0x0000FFFF;
gpio->GPFCON = 0x000055AA;
gpio->GPFUP = 0x000000FF;
gpio->GPGCON = 0xFF95FFBA;
gpio->GPGUP = 0x0000FFFF;
gpio->GPHCON = 0x002AFAAA;
gpio->GPHUP = 0x000007FF;
/*support both of S3C2410 and S3C2440*/
if ((gpio->GSTATUS1 == 0x32410000) || (gpio->GSTATUS1 == 0x32410002))
{
/*FCLK:HCLK:PCLK = 1:2:4*/
clk_power->CLKDIVN = S3C2410_CLKDIV;
/* change to asynchronous bus mod */
__asm__( "mrc p15, 0, r1, c1, c0, 0\n" /* read ctrl register */
"orr r1, r1, #0xc0000000\n" /* Asynchronous */
"mcr p15, 0, r1, c1, c0, 0\n" /* write ctrl register */
:::"r1"
);
/* to reduce PLL lock time, adjust the LOCKTIME register */
clk_power->LOCKTIME = 0xFFFFFF;
/* configure MPLL */
clk_power->MPLLCON = S3C2410_MPLL_200MHZ;
/* some delay between MPLL and UPLL */
delay (4000);
/* configure UPLL */
clk_power->UPLLCON = S3C2410_UPLL_48MHZ;
/* some delay between MPLL and UPLL */
delay (8000);
/* arch number of SMDK2410-Board */
gd->bd->bi_arch_number = MACH_TYPE_SMDK2410;
}
else
{
/* FCLK:HCLK:PCLK = 1:4:8 */
clk_power->CLKDIVN = S3C2440_CLKDIV;
/* change to asynchronous bus mod */
__asm__( "mrc p15, 0, r1, c1, c0, 0\n" /* read ctrl register */
"orr r1, r1, #0xc0000000\n" /* Asynchronous */
"mcr p15, 0, r1, c1, c0, 0\n" /* write ctrl register */
:::"r1"
);
/* to reduce PLL lock time, adjust the LOCKTIME register */
clk_power->LOCKTIME = 0xFFFFFF;
/* configure MPLL */
clk_power->MPLLCON = S3C2440_MPLL_400MHZ;
/* some delay between MPLL and UPLL */
delay (4000);
/* configure UPLL */
clk_power->UPLLCON = S3C2440_UPLL_48MHZ;
/* some delay between MPLL and UPLL */
delay (8000);
/* arch number of SMDK2440-Board */
gd->bd->bi_arch_number = MACH_TYPE_S3C2440;
}
/* adress of boot parameters */
gd->bd->bi_boot_params = 0x30000100;
icache_enable();
dcache_enable();
return 0;
}
在cpu/arm920t/s3c24X0/speed.c中修改：
在程序开头增加一行DECLARE_GLOBAL_DATA_PTR;，这样才可以使用gd变量
修改get_PLLCLK函数：
static ulong get_PLLCLK(int pllreg)
{
S3C24X0_CLOCK_POWER * const clk_power = S3C24X0_GetBase_CLOCK_POWER();
ulong r, m, p, s;
if (pllreg == MPLL)
r = clk_power->MPLLCON;
else if (pllreg == UPLL)
r = clk_power->UPLLCON;
else
hang();
m = ((r & 0xFF000) >> 12) + 8;
p = ((r & 0x003F0) >> 4) + 2;
s = r & 0x3;
/* support both of S3C2410 and S3C2440 */
if (gd->bd->bi_arch_number == MACH_TYPE_SMDK2410)
return((CONFIG_SYS_CLK_FREQ * m) / (p << s));
else
return((CONFIG_SYS_CLK_FREQ * m * 2) / (p << s)); /* S3C2440 */
}
修改get_HCLK, get_PCLK:
/* for s3c2440 */
#define S3C2440_CLKDIVN_PDIVN (1<<0)
#define S3C2440_CLKDIVN_HDIVN_MASK (3<<1)
#define S3C2440_CLKDIVN_HDIVN_1 (0<<1)
#define S3C2440_CLKDIVN_HDIVN_2 (1<<1)
#define S3C2440_CLKDIVN_HDIVN_4_8 (2<<1)
#define S3C2440_CLKDIVN_HDIVN_3_6 (3<<1)
#define S3C2440_CLKDIVN_UCLK (1<<3)
#define S3C2440_CAMDIVN_CAMCLK_MASK (0xf<<0)
#define S3C2440_CAMDIVN_CAMCLK_SEL (1<<4)
#define S3C2440_CAMDIVN_HCLK3_HALF (1<<8)
#define S3C2440_CAMDIVN_HCLK4_HALF (1<<9)
#define S3C2440_CAMDIVN_DVSEN (1<<12)
/* return HCLK frequency */
ulong get_HCLK(void)
{
S3C24X0_CLOCK_POWER * const clk_power = S3C24X0_GetBase_CLOCK_POWER();
unsigned long clkdiv;
unsigned long camdiv;
int hdiv = 1;
/* support both of S3C2410 and S3C2440 */
if (gd->bd->bi_arch_number == MACH_TYPE_SMDK2410)
return((clk_power->CLKDIVN & 0x2) ? get_FCLK()/2 : get_FCLK());
else
{
clkdiv = clk_power->CLKDIVN;
camdiv = clk_power->CAMDIVN;
/* work out clock scalings */
switch (clkdiv & S3C2440_CLKDIVN_HDIVN_MASK) {
case S3C2440_CLKDIVN_HDIVN_1:
hdiv = 1;
break;
case S3C2440_CLKDIVN_HDIVN_2:
hdiv = 2;
break;
case S3C2440_CLKDIVN_HDIVN_4_8:
hdiv = (camdiv & S3C2440_CAMDIVN_HCLK4_HALF) ? 8 : 4;
break;
case S3C2440_CLKDIVN_HDIVN_3_6:
hdiv = (camdiv & S3C2440_CAMDIVN_HCLK3_HALF) ? 6 : 3;
break;
}
return get_FCLK() / hdiv;
}
}
/* return PCLK frequency */
ulong get_PCLK(void)
{
S3C24X0_CLOCK_POWER * const clk_power = S3C24X0_GetBase_CLOCK_POWER();
unsigned long clkdiv;
unsigned long camdiv;
int hdiv = 1;
/* support both of S3C2410 and S3C2440 */
if (gd->bd->bi_arch_number == MACH_TYPE_SMDK2410)
return((clk_power->CLKDIVN & 0x1) ? get_HCLK()/2 : get_HCLK());
else
{
clkdiv = clk_power->CLKDIVN;
camdiv = clk_power->CAMDIVN;
/* work out clock scalings */
switch (clkdiv & S3C2440_CLKDIVN_HDIVN_MASK) {
case S3C2440_CLKDIVN_HDIVN_1:
hdiv = 1;
break;
case S3C2440_CLKDIVN_HDIVN_2:
hdiv = 2;
break;
case S3C2440_CLKDIVN_HDIVN_4_8:
hdiv = (camdiv & S3C2440_CAMDIVN_HCLK4_HALF) ? 8 : 4;
break;
case S3C2440_CLKDIVN_HDIVN_3_6:
hdiv = (camdiv & S3C2440_CAMDIVN_HCLK3_HALF) ? 6 : 3;
break;
}
return get_FCLK() / hdiv / ((clkdiv & S3C2440_CLKDIVN_PDIVN)? 2:1);
}
}
执行
# make TX24X0_config
# make all
生成u-boot.bin，烧入NOR Flash中运行在make all时会出现错误：没有CAMDIVN这个要在include/s3c24x0.h中定义，在129行S3C24X0_CLOCK_POWER结构体中增加：S3C24X0_REG32 CAMDIVN; /* for s3c2440*/
至此，对S3C2440 的支持（时钟配置部分）就算做好了，为了方便调试，
可以利用开发板自带的u-boot 将u-boot.bin 文件烧到内存中运行，此时还要修改一些设置：
一个是cpu/arm920t 中的start.s，在160 行左右将cpu 初始化子程序屏蔽：
#ifndef CONFIG_SKIP_LOWLEVEL_INIT
@bl cpu_init_crit
#endif
然后修改/board/TANG2440/config.mk 中TEXT_BASE 值为0x33000000
TEXT_BASE = 0x33000000
最后使用uboot 命令
tftp 0x33000000 u-boot.bin
go 0x33000000
将u-boot.bin 装入内存并运行。
配置Nor Flash
但是，现在还无法通过U-Boot 命令烧写NOR Flash。本开发板中的NOR Flash
型号为AM29LV800，而配置文件include/configs/TX24x0.h 中的默认型号为
AM29LV400。因为本开发板Flash 为2MB，所以还要修改一些配置
在include/configs/TX24x0.h中修改如下：
/*-----------------------------------------------------------------------
* FLASH and environment organization
*/
#if 0
#define CONFIG_AMD_LV400 1 /* uncomment this if you have a LV400 flash */
#endif
#define CONFIG_AMD_LV800 1 /* uncomment this if you have a LV800 flash */
#define CFG_MAX_FLASH_BANKS 1 /* max number of memory banks */
#ifdef CONFIG_AMD_LV800
#define PHYS_FLASH_SIZE 0x00200000 /* 2MB */
#define CFG_MAX_FLASH_SECT (19) /* max number of sectors on one chip */
#define CFG_ENV_ADDR (CFG_FLASH_BASE + 0x1F0000) /* addr of environment
*/
#endif
#ifdef CONFIG_AMD_LV400
#define PHYS_FLASH_SIZE 0x00080000 /* 512KB */
#define CFG_MAX_FLASH_SECT (11) /* max number of sectors on one
chip */
#define CFG_ENV_ADDR (CFG_FLASH_BASE + 0x070000) /* addr
of environment */
#endif
/* timeout values are in ticks */
#define CFG_FLASH_ERASE_TOUT (5*CFG_HZ) /* Timeout for Flash
Erase */
#define CFG_FLASH_WRITE_TOUT (5*CFG_HZ) /* Timeout for Flash
Write */
#define CFG_ENV_IS_IN_FLASH 1
#define CFG_ENV_SIZE 0x20000 /* Total Size of Environment
Sector */
本例中NOR Flash 的操作函数在board/TX24x0/flash.c 中实现，它支持
AM29LV400 和AM29LV800。
增加支持NAND Flash读写
任务：移植nand-flash 驱动，让u-boot 可以操作读写nand flash
首先在配置文件include/configs/TX2440.h的宏CONFIG_COMMANDS中增加CFG_CMD_NAND (大概在82行)
编译，出现nand.c的错误和警告
解决：在include/configs/TX2440.h的最后面增加3个宏:
/*NAND flash settings*/
#define CFG_NAND_BASE 0 //无实际意义：基地址，在board_nand_init中重新定义
#define CFG_MAX_NAND_DEVICE 1 //NAND Flash设备数目为1
#define NAND_MAX_CHIPS 1 //每个NAND设备由1个NADN芯片组成
修改配置文件后再编译，只有一个错误了“board_nand_init”函数未定义
board_nand_init需要自己编写，在cpu/arm920t/s3c24x0下新建nand_flash.c
编写之前，需要针对S3C2440 NAND Flash定义一些数据结构和函数
在include/s3c24x0.h中增加S3C2440_NAND数据结构（168行）
/* NAND FLASH (see S3C2440 manual chapter 6) */
typedef struct {
S3C24X0_REG32 NFCONF;
S3C24X0_REG32 NFCONT;
S3C24X0_REG32 NFCMD;
S3C24X0_REG32 NFADDR;
S3C24X0_REG32 NFDATA;
S3C24X0_REG32 NFMECCD0;
S3C24X0_REG32 NFMECCD1;
S3C24X0_REG32 NFSECCD;
S3C24X0_REG32 NFSTAT;
S3C24X0_REG32 NFESTAT0;
S3C24X0_REG32 NFESTAT1;
S3C24X0_REG32 NFMECC0;
S3C24X0_REG32 NFMECC1;
S3C24X0_REG32 NFSECC;
S3C24X0_REG32 NFSBLK;
S3C24X0_REG32 NFEBLK;
} /*__attribute__((__packed__))*/ S3C2440_NAND;
在include/s3c2410.h中仿照S3C2410_GetBase_NAND函数（96行）
定义2440的函数：
static inline S3C2440_NAND * const S3C2440_GetBase_NAND(void)
{
return (S3C2440_NAND * const)S3C2410_NAND_BASE;
}
在cpu/arm920t/s3c24x0/nand_flash.c中添加代码，是从Linux-2.6.13中/drivers/mtd/nand/s3c2410.c中移植过来的，代码如下
/*
* Nand flash interface of s3c2410/s3c2440
* Changed from drivers/mtd/nand/s3c2410.c of kernel 2.6.13
*/
#include
#if (CONFIG_COMMANDS & CFG_CMD_NAND) && !defined(CFG_NAND_LEGACY)
#include
#include
DECLARE_GLOBAL_DATA_PTR;
#define S3C2410_NFSTAT_READY (1<<0)
#define S3C2410_NFCONF_nFCE (1<<11)
#define S3C2440_NFSTAT_READY (1<<0)
#define S3C2440_NFCONT_nFCE (1<<1)
/* select chip, for s3c2410 */
static void s3c2410_nand_select_chip(struct mtd_info *mtd, int chip)
{
S3C2410_NAND * const s3c2410nand = S3C2410_GetBase_NAND();
if (chip == -1) {
s3c2410nand->NFCONF |= S3C2410_NFCONF_nFCE;
} else {
s3c2410nand->NFCONF &= ~S3C2410_NFCONF_nFCE;
}
}
/* command and control functions, for s3c2410
*
* Note, these all use tglx's method of changing the IO_ADDR_W field
* to make the code simpler, and use the nand layer's code to issue the
* command and address sequences via the proper IO ports.
*
*/
static void s3c2410_nand_hwcontrol(struct mtd_info *mtd, int cmd)
{
S3C2410_NAND * const s3c2410nand = S3C2410_GetBase_NAND();
struct nand_chip *chip = mtd->priv;
switch (cmd) {
case NAND_CTL_SETNCE:
case NAND_CTL_CLRNCE:
printf("%s: called for NCE\n", __FUNCTION__);
break;
case NAND_CTL_SETCLE:
chip->IO_ADDR_W = (void *)&s3c2410nand->NFCMD;
break;
case NAND_CTL_SETALE:
chip->IO_ADDR_W = (void *)&s3c2410nand->NFADDR;
break;
/* NAND_CTL_CLRCLE: */
/* NAND_CTL_CLRALE: */
default:
chip->IO_ADDR_W = (void *)&s3c2410nand->NFDATA;
break;
}
}
/* s3c2410_nand_devready()
*
* returns 0 if the nand is busy, 1 if it is ready
*/
static int s3c2410_nand_devready(struct mtd_info *mtd)
{
S3C2410_NAND * const s3c2410nand = S3C2410_GetBase_NAND();
return (s3c2410nand->NFSTAT & S3C2410_NFSTAT_READY);
}
/* select chip, for s3c2440 */
static void s3c2440_nand_select_chip(struct mtd_info *mtd, int chip)
{
S3C2440_NAND * const s3c2440nand = S3C2440_GetBase_NAND();
if (chip == -1) {
s3c2440nand->NFCONT |= S3C2440_NFCONT_nFCE;
} else {
s3c2440nand->NFCONT &= ~S3C2440_NFCONT_nFCE;
}
}
/* command and control functions */
static void s3c2440_nand_hwcontrol(struct mtd_info *mtd, int cmd)
{
S3C2440_NAND * const s3c2440nand = S3C2440_GetBase_NAND();
struct nand_chip *chip = mtd->priv;
switch (cmd) {
case NAND_CTL_SETNCE:
case NAND_CTL_CLRNCE:
printf("%s: called for NCE\n", __FUNCTION__);
break;
case NAND_CTL_SETCLE:
chip->IO_ADDR_W = (void *)&s3c2440nand->NFCMD;
break;
case NAND_CTL_SETALE:
chip->IO_ADDR_W = (void *)&s3c2440nand->NFADDR;
break;
/* NAND_CTL_CLRCLE: */
/* NAND_CTL_CLRALE: */
default:
chip->IO_ADDR_W = (void *)&s3c2440nand->NFDATA;
break;
}
}
/* s3c2440_nand_devready()
*
* returns 0 if the nand is busy, 1 if it is ready
*/
static int s3c2440_nand_devready(struct mtd_info *mtd)
{
S3C2440_NAND * const s3c2440nand = S3C2440_GetBase_NAND();
return (s3c2440nand->NFSTAT & S3C2440_NFSTAT_READY);
}
/*
* Nand flash hardware initialization:
* Set the timing, enable NAND flash controller
*/
static void s3c24x0_nand_inithw(void)
{
S3C2410_NAND * const s3c2410nand = S3C2410_GetBase_NAND();
S3C2440_NAND * const s3c2440nand = S3C2440_GetBase_NAND();
#define TACLS 0
#define TWRPH0 4
#define TWRPH1 2
if (gd->bd->bi_arch_number == MACH_TYPE_SMDK2410)
{
/* Enable NAND flash controller, Initialize ECC, enable chip select, Set flash memory timing */
s3c2410nand->NFCONF = (1<<15)|(1<<12)|(1<<11)|(TACLS<<8)|(TWRPH0<<4)|(TWRPH1<<0);
}
else
{
/* Set flash memory timing */
s3c2440nand->NFCONF = (TACLS<<12)|(TWRPH0<<8)|(TWRPH1<<4);
/* Initialize ECC, enable chip select, NAND flash controller enable */
s3c2440nand->NFCONT = (1<<4)|(0<<1)|(1<<0);
}
}
/*
* Called by drivers/nand/nand.c, initialize the interface of nand flash
*/
void board_nand_init(struct nand_chip *chip)
{
S3C2410_NAND * const s3c2410nand = S3C2410_GetBase_NAND();
S3C2440_NAND * const s3c2440nand = S3C2440_GetBase_NAND();
s3c24x0_nand_inithw();
if (gd->bd->bi_arch_number == MACH_TYPE_SMDK2410) {
chip->IO_ADDR_R = (void *)&s3c2410nand->NFDATA;
chip->IO_ADDR_W = (void *)&s3c2410nand->NFDATA;
chip->hwcontrol = s3c2410_nand_hwcontrol;
chip->dev_ready = s3c2410_nand_devready;
chip->select_chip = s3c2410_nand_select_chip;
chip->options = 0;
} else {
chip->IO_ADDR_R = (void *)&s3c2440nand->NFDATA;
chip->IO_ADDR_W = (void *)&s3c2440nand->NFDATA;
chip->hwcontrol = s3c2440_nand_hwcontrol;
chip->dev_ready = s3c2440_nand_devready;
chip->select_chip = s3c2440_nand_select_chip;
chip->options = 0;
}
chip->eccmode = NAND_ECC_SOFT;
}
#endif
修改cpu/arm920t/s3c24x0/Makefile：
COBJS = 加上一项nand_flash.o
最后
make clean
make all
编译成功后加载到0x33000000RAM 中运行会有NAND 信息，
Uboot中支持小页nand flash 大页nand flash驱动:
 |
|
支持网卡DM9000
u-boot 自带网卡驱动，所以只要做些设置即可在driver下，有网卡驱动DM9000x.c 和 DM9000x.hDM9000接在BANK4，位宽16
在include/configs/TX2440.h中设置网卡基地址：
在56行处，屏蔽CS8900的定义加上：
#define CONFIG_ETHADDR 10:23:45:67:89:AB
#define CONFIG_DRIVER_DM9000 1
#define CONFIG_DM9000_BASE 0x20000300
#define DM9000_IO CONFIG_DM9000_BASE
#define DM9000_DATA (CONFIG_DM9000_BASE + 4)
#define CONFIG_DM9000_USE_16BIT
#define CONFIG_ETHADDR 10:23:45:67:89:AB
#define CONFIG_NETMASK 255.255.255.0
#define CONFIG_IPADDR 192.168.0.10
#define CONFIG_SERVERIP 192.168.0.6
driver/Makefile 里修改:
COBJS = dm9000x.o
make clean
make
加载到内存中运行
加载到内存中运行
SMDK2410 # tftp 0x30000000 zImage
dm9000 i/o: 0x20000300, id: 0x90000a46
MAC: 00:80:00:80:00:80
could not establish link
TFTP from server 192.168.0.5; our IP address is 192.168.0.10
Filename 'zImage'.
Load address: 0x30000000
Loading:
#################################################################
done
Bytes transferred = 1924480 (1d5d80 hex)
在蓝色出会出现十秒的停顿，然后报could not establish link 错误，不过不影响使用，这是因为在网卡驱动中drivers/net/dm9000.c,有一段程序试图连接网卡的MII接口，而实际上MII 接口并未使用，所以有十秒的等待时间，且报错，将此段程序注释掉即可。且发现网卡物理地址MAC 不对，这是因为在显示MAC 之前没有
获取envaddr 这个环境变量。
修改drivers/net/dm9000.c
303 行
将
for (i = 0; i < 6; i++)
((u16 *) bd->bi_enetaddr)[i] = read_srom_word(i);
改为：
//start
char *tmp = getenv("ethaddr");
char *end;
for (i = 0; i < 6; i++)
{
bd->bi_enetaddr[i] = tmp ? simple_strtoul(tmp, &end, 16) : 0;
if(tmp)
tmp = (*end) ? end+1 : end;
}
//end
321 行
#if 0
i = 0;
while (!(phy_read(1) & 0x20)) { /* autonegation complete bit */
udelay(1000);
i++;
if (i == 10000) {
printf("could not establish link\n");
return 0;
}
}
/* see what we've got */
lnk = phy_read(17) >> 12;
printf("operating at ");
switch (lnk) {
case 1:
printf("10M half duplex ");
break;
case 2:
printf("10M full duplex ");
break;
case 4:
printf("100M half duplex ");
break;
case 8:
printf("100M full duplex ");
break;
default:
printf("unknown: %d ", lnk);
break;
}
printf("mode\n");
#endif
最后
make clean
make
加载.bin 文件到内存中并运行
SMDK2410 # tftp 0x30000000 ubootdm.r
dm9000 i/o: 0x20000300, id: 0x90000a46
MAC: 10:23:45:67:89:AB
TFTP from server 192.168.0.5; our IP address is 192.168.0.10
Filename 'ubootdm.r'.
Load address: 0x30000000
Loading: T ##########################
done
Bytes transferred = 132404 (20534 hex)
发现没有的could not establish link 错误，且MAC 显示正常。
加上ping命令
在include/configs/TX24x0.h中
#define CONFIG_COMMANDS \
(CONFIG_CMD_DFL | \
CFG_CMD_CACHE | \
CFG_CMD_NAND | \
CFG_CMD_PING | \
/*CFG_CMD_EEPROM |*/ \
/*CFG_CMD_I2C |*/ \
/*CFG_CMD_USB |*/ \
CFG_CMD_REGINFO | \
CFG_CMD_DATE | \
CFG_CMD_ELF)
最后
make clean
make
加载.bin 文件到内存中并运行
SMDK2410 # tftp 0x30000000 ubootdm.r
dm9000 i/o: 0x20000300, id: 0x90000a46
MAC: 10:23:45:67:89:AB
TFTP from server 192.168.0.5; our IP address is 192.168.0.10
Filename 'ubootdm.r'.
Load address: 0x30000000
Loading: T ##########################
done
Bytes transferred = 132404 (20534 hex)
设置Linux启动参数
在77行处，加两个宏定义：
/* for tag(s) to transfer message to kernel*/
#define CONFIG_SETUP_MEMORY_TAGS 1
#define CONFIG_CMDLINE_TAG 1
在#include
/*自启动前延时3秒*/
#define CONFIG_BOOTDELAY 3
/*默认的命令行参数*/
#define CONFIG_BOOTARGS "noinitrd root=/dev/mtdblock2 init=/linuxrc console=ttySAC0"
/*自动启动命令*/
#define CONFIG_BOOTCOMMAND "nboot 0x32000000 0 0x50000; bootm 0x32000000"
这个是uboot的命令提示符，可修改
#define CFG_PROMPT "TX24x0 >" /* Monitor Command Prompt */
