分类： 嵌入式
2010-08-11 17:25:49
第5步 修改nand和支持网口芯片DM9000的驱动
1、对cpu\arm920t\s3c24x0里的nand.c进行如下修改：
#include
#if
0
#define DEBUGN printf
#else
#define DEBUGN(x, args ...)
{}
#endif
#if
defined(CONFIG_CMD_NAND)
#if !defined(CFG_NAND_LEGACY)
#include
#include
#define
__REGb(x) (*(volatile unsigned char *)(x))
#define __REGi(x)
(*(volatile unsigned int *)(x))
#define NF_BASE 0x4e000000
#if
defined(CONFIG_S3C2410)
#define
NFCONF __REGi(NF_BASE + 0x0)
#define NFCMD __REGb(NF_BASE +
0x4)
#define NFADDR __REGb(NF_BASE + 0x8)
#define NFDATA
__REGb(NF_BASE + 0xc)
#define NFSTAT __REGb(NF_BASE +
0x10)
#define NFECC0 __REGb(NF_BASE + 0x14)
#define NFECC1
__REGb(NF_BASE + 0x15)
#define NFECC2 __REGb(NF_BASE + 0x16)
#define
S3C2410_NFCONF_EN (1<<15)
#define
S3C2410_NFCONF_512BYTE (1<<14)
#define S3C2410_NFCONF_4STEP
(1<<13)
#define S3C2410_NFCONF_INITECC (1<<12)
#define
S3C2410_NFCONF_nFCE (1<<11)
#define
S3C2410_NFCONF_TACLS(x) ((x)<<8)
#define
S3C2410_NFCONF_TWRPH0(x) ((x)<<4)
#define
S3C2410_NFCONF_TWRPH1(x) ((x)<<0)
#elif defined(CONFIG_S3C2440)
#define
NFCONF __REGi(NF_BASE + 0x0)
#define NFCONT __REGi(NF_BASE +
0x4)
#define NFCMD __REGb(NF_BASE + 0x8)
#define NFADDR
__REGb(NF_BASE + 0xc)
#define NFDATA __REGb(NF_BASE +
0x10)
#define NFMECCD0 __REGi(NF_BASE + 0x14)
#define NFMECCD1
__REGi(NF_BASE + 0x18)
#define NFSECCD __REGi(NF_BASE +
0x1C)
#define NFSTAT __REGb(NF_BASE + 0x20)
#define NFSTAT0
__REGi(NF_BASE + 0x24)
#define NFSTAT1 __REGi(NF_BASE +
0x28)
#define NFMECC0 __REGi(NF_BASE + 0x2C)
#define NFMECC1
__REGi(NF_BASE + 0x30)
#define NFSECC __REGi(NF_BASE +
0x34)
#define NFSBLK __REGi(NF_BASE + 0x38)
#define NFEBLK
__REGi(NF_BASE + 0x3c)
#define
S3C2440_NFCONT_nCE (1<<1)
#define S3C2440_ADDR_NALE
0x0c
#define S3C2440_ADDR_NCLE 0x08
#endif
static void s3c2410_hwcontrol(struct mtd_info
*mtd, int cmd)
{
struct nand_chip *chip = mtd->priv;
DEBUGN("hwcontrol(): 0x%02x: ", cmd);
#if defined(CONFIG_S3C2410)
switch (cmd) {
case
NAND_CTL_SETNCE:
NFCONF &=
~S3C2410_NFCONF_nFCE;
DEBUGN("NFCONF=0x%08x\n",
NFCONF);
break;
case NAND_CTL_CLRNCE:
NFCONF |=
S3C2410_NFCONF_nFCE;
DEBUGN("NFCONF=0x%08x\n",
NFCONF);
break;
case NAND_CTL_SETALE:
chip->IO_ADDR_W =
NF_BASE + 0x8;
DEBUGN("SETALE\n");
break;
case
NAND_CTL_SETCLE:
chip->IO_ADDR_W = NF_BASE +
0x4;
DEBUGN("SETCLE\n");
break;
default:
chip->IO_ADDR_W
= NF_BASE + 0xc;
break;
}
#elif
defined(CONFIG_S3C2440)
switch (cmd) {
case
NAND_CTL_SETNCE:
NFCONF &=
~S3C2440_NFCONT_nCE;
DEBUGN("NFCONF=0x%08x\n",
NFCONF);
break;
case NAND_CTL_CLRNCE:
NFCONF |=
S3C2440_NFCONT_nCE;
DEBUGN("NFCONF=0x%08x\n",
NFCONF);
break;
case NAND_CTL_SETALE:
chip->IO_ADDR_W =
NF_BASE + S3C2440_ADDR_NALE;
DEBUGN("SETALE\n");
break;
case
NAND_CTL_SETCLE:
chip->IO_ADDR_W = NF_BASE +
S3C2440_ADDR_NCLE;
DEBUGN("SETCLE\n");
break;
default:
chip->IO_ADDR_W
= NF_BASE + 0x10; //注意是0x10
break;
}
#endif
return;
}
int
board_nand_init(struct nand_chip *nand)
{
u_int32_t
cfg;
u_int8_t tacls, twrph0, twrph1;
S3C24X0_CLOCK_POWER *
const clk_power = S3C24X0_GetBase_CLOCK_POWER();
DEBUGN("board_nand_init()\n");
clk_power->CLKCON |= (1 << 4);
#if defined(CONFIG_S3C2410)
/*
initialize hardware */
twrph0 = 3; twrph1 = 0; tacls = 0;
cfg
= S3C2410_NFCONF_EN;
cfg |= S3C2410_NFCONF_TACLS(tacls - 1);
cfg
|= S3C2410_NFCONF_TWRPH0(twrph0 - 1);
cfg |=
S3C2410_NFCONF_TWRPH1(twrph1 - 1);
NFCONF = cfg;
/*
initialize nand_chip data structure */
nand->IO_ADDR_R =
nand->IO_ADDR_W = 0x4e00000c;
/*
read_buf and write_buf are default */
/* read_byte and write_byte
are default */
/*
hwcontrol always must be implemented */
nand->hwcontrol =
s3c2410_hwcontrol;
nand->dev_ready = s3c2410_dev_ready;
#ifdef
CONFIG_S3C2410_NAND_HWECC
nand->enable_hwecc =
s3c2410_nand_enable_hwecc;
nand->calculate_ecc =
s3c2410_nand_calculate_ecc;
nand->correct_data =
s3c2410_nand_correct_data;
nand->eccmode =
NAND_ECC_HW3_512;
#else
//nand->eccmode = NAND_ECC_SOFT;
nand->eccmode
= NAND_ECC_NONE; /*这个ECC先去掉，否则你使用nand
write命令和nand
read会boot
不起内核*/
#endif
#ifdef
CONFIG_S3C2410_NAND_BBT
nand->options =
NAND_USE_FLASH_BBT;
#else
nand->options = 0;
#endif
#elif
defined(CONFIG_S3C2440)
twrph0 = 6; twrph1 = 2; tacls = 0;
cfg
= (tacls<<12)|(twrph0<<8)|(twrph1<<4);
NFCONF =
cfg;
cfg = (1<<6)|(1<<4)|(0<<1)|(1<<0);
NFCONT
= cfg;
/*
initialize nand_chip data structure */
nand->IO_ADDR_R =
nand->IO_ADDR_W = (void *)0x4e000010;
/*
read_buf and write_buf are default */
/* read_byte and write_byte
are default */
/*
hwcontrol always must be implemented */
nand->hwcontrol =
s3c2410_hwcontrol;
nand->dev_ready =
s3c2410_dev_ready;
#ifdef
CONFIG_S3C2440_NAND_HWECC
nand->enable_hwecc
= s3c2410_nand_enable_hwecc;
nand->calculate_ecc =
s3c2410_nand_calculate_ecc;
nand->correct_data =
s3c2410_nand_correct_data;
nand->eccmode =
NAND_ECC_HW3_512;
#else
//nand->eccmode
= NAND_ECC_SOFT;
nand->eccmode
= NAND_ECC_NONE; /*这个ECC先去掉，否则你使用nand
write命令和nand
read会boot
不起内核*/
#endif
#ifdef
CONFIG_S3C2440_NAND_BBT
nand->options =
NAND_USE_FLASH_BBT;
#else
nand->options = 0;
#endif
#endif
DEBUGN("end of nand_init\n");
return
0;
}
#else
#error
"U-Boot legacy NAND support not available for
S3C2410"
#endif
#endif
2、对include\configs\mini2440.h进行如下修改：
增加
#define CONFIG_CMD_NAND /* NAND support*/
#define
CFG_ENV_IS_IN_NAND 1 /* */
#define CFG_ENV_OFFSET 0X40000
/*
u-boot:0x00000--0x40000,param:0x40000--0x60000,kernel:0x60000--0x260000
128K block*/
#define CFG_ENV_SIZE 0x10000/* Total Size of
Environment Sector */
//#define
CONFIG_SETUP_MEMORY_TAGS 1
//#define CONFIG_CMDLINE_TAG 1
/*nand
flash define*/
#if defined(CONFIG_CMD_NAND)
#define
CFG_MAX_NAND_DEVICE 1 //just one nand flash chip on board
#define
CFG_NAND_BASE 0x4e000000 //nand flash base address
#define
SECTORSIZE 2048
/* one page size*/
#define NAND_SECTOR_SIZE
SECTORSIZE
#define NAND_BLOCK_MASK (SECTORSIZE - 1)
#endif
3、增加对网口芯片的支持：
同在include/configs/mini2440.h里，修改Hardware drivers的定义：
/*
*
Hardware drivers
*/
//#define CONFIG_DRIVER_CS8900 1 /* we have a
CS8900 on-board */
//#define CS8900_BASE 0x19000300
//#define
CS8900_BUS16 1 /* the Linux driver does accesses as shorts */
#define
CONFIG_DRIVER_DM9000 1
#define CONFIG_DM9000_BASE
0x20000300
#define DM9000_IO CONFIG_DM9000_BASE
#define
DM9000_DATA (CONFIG_DM9000_BASE+4)
#define CONFIG_DM9000_USE_16BIT
并确保#define CONFIG_CMD_NET /* bootp, tftpboot, rarpboot*/打开，设置相关TFTP操作的定义，如下：
#define
CONFIG_BOOTDELAY 3
#define CONFIG_ETHADDR
08:00:3e:26:0a:5b
#define CONFIG_NETMASK 255.255.255.0
#define
CONFIG_IPADDR 192.168.1.250
#define CONFIG_SERVERIP
192.168.1.100
#define CONFIG_BOOTFILE "zImage.img"
#define
CONFIG_BOOTCOMMAND "tftp 0x30008000 0x60000 0x21733c\; bootm 30008000"
//我把内核放在nandflash偏移为60000的位置
2、修改lib_arm/board.c
添加：
#ifdef CONFIG_DRIVER_DM9000
extern int eth_init(bd_t * bd);
#endif
#ifdef CONFIG_DRIVER_DM9000
eth_init(gd->bd);
#endif
参考：http://blog.csdn.net/linyaoyi/archive/2009/04/03/4004052.aspx
