IBM本轮招聘主要针对有一定工作经验的求职者。感兴趣的同学请将简历发送至
Position: IBM ASIC Design Engineer
Location : Beijing/Shanghai
=============Job Scopes & Responsibilities============
IBM ASIC/back-end design engineer is resposible for physical implementation of very large
scale CMOS SoC/ASIC design from netlist handover to GDS tapeout, based on IBM 65nm, 45nm,
32nm and beyond technology with IBM/industry leading EDA tools. The work scope includes
one or more of following areas:
- Supporting customer on IBM IP core usage, IO selection and netlist
preparation/synthesis.
- Working with customer to define physical implementation strategies including logic
partition, design planning, etc.
- Top level insertion and netlist processing, including IO assignment/insertion, JTAG
structure building, scan chain & BIST insertion, etc.
- DFT verification and formal verification
- Timing assertions/constraints specification and verification, STA analysis and design
timing closure;
- Physical design, floorplanning, I/O planning, physical synthesis, clock tree
generation and tuning, place &route;
- Physical verification and reliability verification;
- ASIC package design, image(power bus) creating and verification
- On chip and package power bus analysis, chip and system cominbational SI/PI analysis.
- Design signoff
- Coordinating with other IBM function teams to support the related problem solving
during SoC/ASIC design execution.
The candidate would also have future extended responsibility participating in the design
planning and sizing for the advanced ASIC/SoC chips, and development, deployment and other
application engineering support of the design methodology.
=============Job Requirements============
1. CS/EE related background in digital chip design areas
2. Proficient with relevant EDA tools/flows such as Synopsys, Cadence and Mentor, etc.
Experience in IBM ASIC tools/flow will be a significant plus.
3. Good grasp of Verilog/VHDL, and Perl/TCL scripts in Linux/Unix environment. C/C
programming will be a plus.
4. Solid knowledge and experience in one or more of the following areas:
- Design floorplanning and partitioning
- Logic synthesis, design for test, and I/O assignment
- High level clock design, clocking and routing optimization
- Timing/Signal integrity analysis and closure
- Physical synthesis, place and route, physical design optimization
- Physical extraction, verification and reliability verification
- Package/system design, SI/PI analysis
- Multiple layer(4 ) PCB layout, Cadence layout/SI tool and Hspice
- ASIC design release/signoff
5. Logic design and verification background will be a plus
6. EDA tools/flows application engineering background will be a plus
7. Relevant domain knowledge in telecommunication and/or digital media products will be
a significant plus
8. Good communication skill in both English and Mandarin.
9. Strong teamwork sense, and self-motivation is required.
10. Strong technical leadership will be important consideration for senior positions.
（上海职位）
IBM Circuit IP Development Engineer
Job Scopes & Responsibilities:
IBM Circuit IP Development Engineer is working on cutting-edge Mixed-Signal Circuit IP
Development (e.g. Advanced Memory Array, High-Speed I/O Links, etc...) on IBM 32nm, 22nm
and beyond semiconductor technologies for IBM System and OEM ASIC clients. The
candidate will be closely working with worldwide IP development community and responsible
for/participate in:
* Circuit IP topology definition and architecture.
* Circuit IP module design, analysis, and verification.
* Circuit IP layout partitioning, floorplanning, optimization, and checking.
* Circuit IP testing, correlation, characterization, and measurement.
* Circuit IP design specification, documentation, and reporting.
* Communication with other function teams to support the related problem solving during
the custom circuit design.
Job Requirements:
1. EE or related background in circuit IP design areas.
2. Industry experience (1-2 years as entry level, more is preferable) in related Circuit IP
design areas.
3. Solid knowledge in high-performance Mixed-Signal Circuit IP design, verification, testing
on Bulk CMOS or SOI or BiCMOS or SiGe technologies.
4. Solid knowledge in deep submicron or nanometer CMOS device, process and technology.
5. Solid knowledge in relevant EDA tools and environment, such as Cadence, Synopsys or
Mentor Graphics, etc.
6. Solid knowledge in one or more of the following design areas, will be a plus:
* High-Speed Memory Array
* High-Speed Interface
* High-Speed SerDes
* Advanced Processor
7. Good English/communication skill and willingness to work within a global team.
8. Good learning competency, self-motivation, and be able to work on diverse areas in a
flexible environment.
9. Strong technical leadership will be important consideration for senior positions.
Position: IBM Logic Development Engineer
Location : Beijing/Shanghai
=============Job Scopes & Responsibilities============
IBM Logic development engineer is responsible for Logic IP, Embedded CPU and advanced SoC chip verification and design based on IBM 65nm, 45nm 32nm and beyond technology. Logic Development Engineers need to communicate and collaborate with IBM worldwide team to solve problems for customer. The candidate will be responsible for one or more of following areas:
- SoC/ASIC chip verification;
- Design and verification for digital IP, macro, and function blocks.
- SoC/ASIC architecture design and implementation;
- Embedded processor design;
=============Job Requirements============
1. CS/EE or related background in digital chip design areas
2. Experience in Logic and SoC Chip Design/Verification;
3. Proficient with Verilog/VHDL, Perl/Tcl scripts in Linux/Unix environment, C/C programming. SystemVerilog/SystemC will be a plus;
4. Familiar with relevant EDA tools/flows such as Synopsys, Cadence or Mentor, etc.
5. Good communication skill in English, other languages will be a plus (Japanese/French/German/Korean);
6. Strong teamwork sense, and self-motivation is required;
7. Solid knowledge and industry experience in one or more of the following areas:
- RTL design, timing analysis, Logic synthesis optimization;
- State-of-the-art IP/SoC verification technologies such as SW/HW co-verification, coverage driven verification, OVM/VMM/UVM, Formal Verification, etc;
- Processor related design such as Float Point Unit, Cache controller, etc;
- Back-end design knowledge and experience will be a plus;
8. Knowledge/Experience in one or more of the following application domains, will be a plus:
- Digital media, audio/video applications and gaming processing
- Digital signal and embedded processor architecture
- Consumer electronics applications
- Communication, network and wireless applications
- Automotive electronics applications
- Other emerging technology and industry areas
（上海职位）
IBM Layout Design Engineer
Job Scopes & Responsibilities:
IBM Layout Design Engineer is working on cutting-edge Mixed-Signal Circuit IP Layout
Development (e.g. Advanced Memory Array, High-Speed I/O Links, etc...) on IBM 32nm, 22nm
and beyond semiconductor technologies for IBM System and OEM ASIC clients. The
candidate will be closely working with worldwide IP development community and responsible
for/participate in:
* Perform layout design which includes low level IP blocks as well as IP layout integration
which minimizes area, provides high reliability, DRC/LVS clean, and meets all committed
schedules.
* Develop initial floorplan and power/ground distribution.
* Interact closely with circuit designers to assure all design objectives are being met.
* Deliver on schedule, all physical design rules which pass DRC/LVS.
* Perform yield and reliability assessment of the physical design.
Job Requirements:
1. EE or related background in circuit IP design areas.
2. Industry experience (1-2 years as entry level, more is preferable) in related areas.
3. Solid knowledge in deep submicron or nanometer CMOS device, process and technology.
4. Solid knowledge and understanding of DRC/LVS and extraction procedures.
5. Solid knowledge in relevant EDA tools and environment, such as Cadence, Synopsys and
Mentor Graphics, etc.
6. Good Unix/Linux or script programming skills.
7. Good English verbal and written communication skills and willingness to work within a
global team.
8. Good learning competency, self-motivation, and be able to work on diverse areas in a
flexible environment.
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