一、Device Bus Operations
设备总线操作
This section describes the requirements and use of the device bus operations, which are initiated through the internal command register. The command register itself does not occupy any addressable memory location. The register is a latch used to store the commands, along with the address and data information needed to execute the command. The contents of the register serve as inputs to the internal state machine. The state machine outputs dictate the function of the device. Table 1 lists the device bus operations, the inputs and control levels they require, and the resulting output. The following subsections describe each of these operations in further detail.
这个章节描述了需求和怎样进行设备总线操作,而这些都是通过内部命令寄存器进行初始化的。命令寄存器不占用任何可寻址的内存空间。寄存器用来存储命令和执行指令所必须的地址和数据信息。机器内部状态由寄存器的内容来管理。机器输出的状态指示了设备功能。表一列出了设备的总线操作,它们需要的输入和控制电平和输出结果。接下来的章节将对这些操作做进一步的解释。
1、Requirements for Reading Array Data
读数据需要的必须条件
To read array data from the outputs, the system must drive the CE# and OE# pins to VIL. CE# is the power control and selects the device. OE# is the output control and gates array data to the output pins. WE# should remain at VIH.
为了能从输出端读到数据,系统必须使CE#和OE#两脚为VIL。CE#控制电源和选择设备。OE#控制输出。WE#需要保持为VIH。
The internal state machine is set for reading array data upon device power-up, or after a hardware reset. This ensures that no spurious alteration of the memory content occurs during the power transition. No command is necessary in this mode to obtain array data. Standard microprocessor read cycles that assert valid addresses on the device address inputs produce valid data on the device data outputs. The device remains enabled for read access until the command register contents are altered.
上电或一个硬件复位后,机器处在读状态。这保证了在电源跳变时,不会出现假的错乱的数据。按标准的微处理器的读时钟去读,将得到有效的输入和输出数据。机器一直处在读状态直到命令寄存器发生该表。
Writing Commands/Command Sequences
To write a command or command sequence (which includes programming data to the device and erasing sectors of memory), the system must drive WE# and CE# to VIL, and OE# to VIH.
2、Writing Commands/Command Sequences
To write a command or command sequence (which includes programming data to the device and erasing sectors of memory), the system must drive WE# and CE# to VIL, and OE# to VIH.
写命令和写命令时序
系统必须使WE#和CE#为VIL以便去发布一个写命令或写命令时序,写命令和写命令时序包括写数据到设备和擦写块。
The device features an Unlock Bypass mode to facilitate faster programming. Once the device enters the Unlock Bypass mode, only two write cycles are required to program a word or byte, instead of four. The Word Program Command Sequence‚ on page 38 has details on programming data to the device using both standard and Unlock Bypass command sequences.
设备有个解锁模式以便达到更快的编程。一旦设备进入解锁模式,烧录一个字或字节只需要两个写周期就可以代替以前的4个周期。在38页,对标准模式和解锁模式中的烧写命令时序做了详细介绍。
怎样进入Autoselect模式
Addr |
DATA |
Addr |
DATA |
Addr |
DATA |
Addr |
DATA |
Addr |
DATA |
Addr |
DATA |
555 |
AA |
2AA |
55 |
555 |
90 |
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通过三个周期的一次对@555 = AA; @2AA = 55; @555 = 90;进入Autoselect模式。一直保持此模式直到发布一个复位命令。
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