mini2440支持ecos3.0

由于ecos3.0现在已经支持了smdk2410开发板，往mini2440上移植是非常简单的，基本不用大的改动。
经过一个多礼拜的阅读ecos的html手册页，对ecos有了一个大概的了解。

到
下载ecos3.0和arm-eabi-gcc交叉编译包

安装一个stdc++库
lzd@lzd-laptop:~$ sudo apt-get install libstdc++5
mkdir -p /opt/ecos
cd /opt/ecos
sudo cp /home/lzd/ecos* .
bunzip2 < ecos-1.3.1.tar.bz2 | tar xvf -
lzd@lzd-laptop:~$ bunzip2 < ecoscentric-gnutools-arm-eabi-20081213-sw.i386linux.tar.bz2 | tar xvf -

先调试redboot，redboot是ecos的一部分，也可以单独使用。把他调试好了，ecos就可以运行在mini2440上了。
在~/.bashrc中加入下面内容
PATH=/opt/ecos/ecos-3.0/tools/bin/:$PATH
PATH=/home/lzd/gnutools/arm-eabi/bin/:$PATH
export PATH
export ECOS_REPOSITORY=/opt/ecos/ecos-3.0/packages
export TARGET=smdk2410
export ARCH_DIR=arm
export PLATFORM_DIR=arm9/smdk2410
export REDBOOT_CFG=smdk2410_redboot_ROMRAM
export VERSION=v3_0

生成redboot步骤：
1）mkdir /tmp/${REDBOOT_CFG} //随便找个地儿都可以
2）cd /tmp/${REDBOOT_CFG}
3）ecosconfig new ${TARGET} redboot
4）ecosconfig import ${ECOS_REPOSITORY}/hal/${ARCH_DIR}/${PLATFORM_DIR}/${VERSION}/misc/${REDBOOT_CFG}.ecm
5）ecosconfig tree
6）make

lzd@lzd-laptop:/tmp/smdk2410_redboot_ROMRAM$ which ecosconfig
/opt/ecos/ecos-3.0/tools/bin/ecosconfig
lzd@lzd-laptop:/tmp/smdk2410_redboot_ROMRAM$ ecosconfig new ${TARGET} redboot
U CYGPKG_HAL_ARM_ARM9_ARM920T, new inferred value 1
U CYGSEM_HAL_USE_ROM_MONITOR, new inferred value 0
U CYGIMP_HAL_COMMON_INTERRUPTS_USE_INTERRUPT_STACK, new inferred value 0
lzd@lzd-laptop:/tmp/smdk2410_redboot_ROMRAM$
都很顺利
make的时候出了错误：
/bin/sh: tclsh: not found

没有tclsh，这是个什么东西？
Tclsh   是一个 shell 类应用程序，从它的标准输入或一个文件读  Tcl 命令并对其求值(evaluate)。
sudo apt-get install tcl8.5

make 后成功生成了./install/bin下的文件

当然，上面生成的bin文件肯定不适合2440。下面是需要修改的内容：

1.首先调试vectors.S文件，它位于hal层的arch下面（所有的arm平台都是用的这个启动文件）。

有这样一个宏
reset_vector:
        PLATFORM_SETUP1         // Early stage platform initialization
                                // which can set DRAM size at 0x40
                                // see
PLATFORM_SETUP1，位置在cyg/hal/hal_platform_setup.h，找到它，因为它有点问题。
在最前面加入
#elif (CYGNUM_HAL_ARM_SMDK2410_CPU_CLOCK == 400000000) //real value is 400M
#define M_MDIV      92                  // Fin=12.0MHz Fout=200.0MHz,92=0x5c
#define M_PDIV      1
#define M_SDIV      1
因为我要用2440的400M cpu，全贴过来吧，好像这里改的最多了
.macro RAW_LED_MACRO x
        ldr     r0,=GPBDAT
        ldr     r1,[r0]
        bic     r1,r1,#(0xf<<5)
        orr     r1,r1,#((0xf & ~(\x))<<5)
        str     r1, [r0]
        .endm


        // Configure GPF[4:7] as Output & pull-up turned off
        .macro RAW_LED_PORT_INIT_MACRO
        ldr     r0,=GPBUP
        ldr     r1,[r0]
        orr     r1,r1,#((1<<7)|(1<<6)|(1<<5)|(1<<8))
        str     r1,[r0]

        RAW_LED_MACRO 0

        ldr     r0,=GPBCON
        ldr     r1,[r0]
        orr     r1,r1,#((1<<14)|(1<<12)|(1<<10)|(1<<16))
        str     r1,[r0]
        .endm

// This macro represents the initial startup code for the platform        
        .macro  _platform_setup1
#ifndef CYG_HAL_STARTUP_RAM
        ldr    r0,=WTCON            // watch dog disable
        ldr    r1,=0x0         
        str    r1,[r0]
#endif
        RAW_LED_PORT_INIT_MACRO

#ifndef CYG_HAL_STARTUP_RAM
        ldr    r0,=INTMSK
        ldr    r1,=0xffffffff       // all interrupt disable
        str    r1,[r0]

        ldr    r0,=INTSUBMSK
        ldr    r1,=0x7ff            // all sub interrupt disable
        str    r1,[r0]

        RAW_LED_MACRO 1

        // Disable and clear caches
        mrc  p15,0,r0,c1,c0,0
        bic  r0,r0,#0x1000              // disable ICache
        bic  r0,r0,#0x000f              // disable DCache, write buffer,
                                        // MMU and alignment faults
        mcr  p15,0,r0,c1,c0,0
        nop
        nop
        mov  r0,#0
        mcr  p15,0,r0,c7,c6,0           // clear data cache
#if 0
        mrc  p15,0,r0,c15,c1,0          // disable streaming
        orr  r0,r0,#0x80
        mcr  p15,0,r0,c15,c1,0
#endif

        // To reduce PLL lock time, adjust the LOCKTIME register.
        ldr    r0,=LOCKTIME
        ldr    r1,=0xffffff
        str    r1,[r0]

        // We must set ratios, set memctl, then change FCLK.
        ldr     r0,=CLKDIVN     // Set ratios 1:4:8 for FCLK:HCLK:PCLK
        ldr     r1,=(5)
        str     r1,[r0]

        // MMU_SetAsyncBusMode  //Must select, since we're setting HDIVN=1
#define R1_iA   (1<<31)
#define R1_nF   (1<<30)
        mrc     p15,0,r0,c1,c0,0
        orr     r0,r0,#(R1_nF|R1_iA)
        mcr     p15,0,r0,c1,c0,0


        // Set memory control registers
        adr    r0,1f
        ldr    r1,=BWSCON           // BWSCON Address
        add    r2, r0, #52          // End address of SMRDATA
0:
        ldr    r3, [r0], #4    
        str    r3, [r1], #4    
        cmp    r2, r0        
        bne    0b
        b      2f

1:
// Memory configuration should be optimized for best performance
// The following parameter is not optimized.                     
// Memory access cycle parameter strategy
// 1) The memory settings is  safe parameters even at HCLK=75Mhz.
// 2) SDRAM refresh period is for HCLK=75Mhz.

        .long (0+(B1_BWSCON<<4)+(B2_BWSCON<<8)+(B3_BWSCON<<12)+(B4_BWSCON<<16)+(B5_BWSCON<<20)+(B6_BWSCON<<24)+(B7_BWSCON<<28))
        .long ((B0_Tacs<<13)+(B0_Tcos<<11)+(B0_Tacc<<8)+(B0_Tcoh<<6)+(B0_Tah<<4)+(B0_Tacp<<2)+(B0_PMC))   //GCS0
        .long ((B1_Tacs<<13)+(B1_Tcos<<11)+(B1_Tacc<<8)+(B1_Tcoh<<6)+(B1_Tah<<4)+(B1_Tacp<<2)+(B1_PMC))   //GCS1
        .long ((B2_Tacs<<13)+(B2_Tcos<<11)+(B2_Tacc<<8)+(B2_Tcoh<<6)+(B2_Tah<<4)+(B2_Tacp<<2)+(B2_PMC))   //GCS2
        .long ((B3_Tacs<<13)+(B3_Tcos<<11)+(B3_Tacc<<8)+(B3_Tcoh<<6)+(B3_Tah<<4)+(B3_Tacp<<2)+(B3_PMC))   //GCS3
        .long ((B4_Tacs<<13)+(B4_Tcos<<11)+(B4_Tacc<<8)+(B4_Tcoh<<6)+(B4_Tah<<4)+(B4_Tacp<<2)+(B4_PMC))   //GCS4
        .long ((B5_Tacs<<13)+(B5_Tcos<<11)+(B5_Tacc<<8)+(B5_Tcoh<<6)+(B5_Tah<<4)+(B5_Tacp<<2)+(B5_PMC))   //GCS5
        .long ((B6_MT<<15)+(B6_Trcd<<2)+(B6_SCAN))    //GCS6
        .long ((B7_MT<<15)+(B7_Trcd<<2)+(B7_SCAN))    //GCS7
        .long ((REFEN<<23)+(TREFMD<<22)+(Trp<<20)+(Trc<<18)+(Tchr<<16)+REFCNT)    

        .long 0x32                    // SCLK power saving mode, BANKSIZE 128M/128M

        .long 0x30                    // MRSR6 CL=3clk
        .long 0x30                    // MRSR7
//        .long 0x20                    // MRSR6 CL=2clk
//        .long 0x20                    // MRSR7

2:
        RAW_LED_MACRO 2

        // Configure MPLL
        ldr    r0,=MPLLCON          
        ldr    r1,=((M_MDIV<<12)+(M_PDIV<<4)+M_SDIV)  // Fin=12MHz,Fout=50MHz
        str    r1,[r0]

    //we need sometimes to get ready
    nop
    nop
    nop
    nop
    nop
    nop
    nop
    nop
    nop
    nop
    nop
    nop
    nop
    nop
    nop
    nop
    nop
    nop
    nop
    nop
    nop
    nop
    nop
    nop

#endif /* !CYG_HAL_STARTUP_RAM */

        // Set up a stack [for calling C code]
        ldr     r1,=__startup_stack
        ldr     r2,=SMDK2410_SDRAM_PHYS_BASE
        orr     sp,r1,r2

        // Create MMU tables
        RAW_LED_MACRO 3
        bl      hal_mmu_init
        RAW_LED_MACRO 4

        // Enable MMU
        ldr     r2,=10f
#ifdef CYG_HAL_STARTUP_ROMRAM
        ldr     r1,=__exception_handlers
        ldr r9,=0x80000000
        sub     r1,r2,r1
        add     r2,r9,r1        // r9 has ROM offset
#endif        
        ldr        r1,=MMU_Control_Init|MMU_Control_M
        mcr        MMU_CP,0,r1,MMU_Control,c0
        mov        pc,r2    /* Change address spaces */
        nop
        nop
        nop
10:
        RAW_LED_MACRO 5 //here still in flash
        
#ifdef CYG_HAL_STARTUP_ROMRAM
        mov     r0,r9                     // Relocate FLASH/ROM to RAM
        ldr     r1,=__exception_handlers  // ram base & length
        ldr     r2,=__rom_data_end
20:     ldr     r3,[r0],#4
        str     r3,[r1],#4
        cmp     r1,r2
        bne     20b
        ldr     r0,=30f
        mov     pc,r0 //here wo in the ram space now ^_^
        nop
        nop
        nop
        nop
30:            
#endif
        RAW_LED_MACRO 6
        .endm
       
#else // defined(CYG_HAL_STARTUP_ROM) || defined(CYG_HAL_STARTUP_ROMRAM)
#define PLATFORM_SETUP1
#endif

主要是sdram的正确配置，led的点亮，cpu频率的正确配置。其他部分没有问题。

修改smdk2410_misc.c文件
//dont touch my gpb port,leds reley on it
    //HAL_WRITE_UINT32(GPBCON, 0x044555);
    //HAL_WRITE_UINT32(GPBUP, 0x7ff);      // The pull up function is disabled GPB[10:0]
注视掉上面两句，因为在cyg_start的调试过程中会用到led（因为那时候串口乱码，得分析原因）

如果现在你把redboot镜像烧到nor的话，串口会乱码。
修改hal_dial.c，因为现在的pclk用的400／8＝50M hz。
    //UART baud divider register
    HAL_WRITE_UINT32(base+OFS_UBRDIV,  (cyg_uint32)((FCLK/8)/(16*CYGNUM_HAL_VIRTUAL_VECTOR_CONSOLE_CHANNEL_BAUD))-1);

好了，编译一下，串口就通了，是默认的38400 8N1 哦。

现在让redboot支持sst39vf1601，因为smdk2410的flash是amd的，需要手术。

修改ecos.db这个数据库 :
target smdk2410 {
        alias { "Samsung ARM9/SMDK2410 development board" s3c2410x }
        packages { CYGPKG_HAL_ARM
                   CYGPKG_HAL_ARM_ARM9
                   CYGPKG_HAL_ARM_ARM9_SMDK2410
                   CYGPKG_IO_SERIAL_ARM_SMDK2410
                   CYGPKG_DEVS_FLASH_ARM_SMDK2410
                   CYGPKG_DEVS_FLASH_AMD_AM29XXXXX
        }
        description "
        The SMDK2410 target provides the packages needed to run eCos on
        Samsung S3c2410x (ARM920T) based development boards (SMDK2410)."
}

to something like this:

target smdk2410 {
        alias { "Samsung ARM9/SMDK2410 development board" s3c2410x }
        packages { CYGPKG_HAL_ARM
                   CYGPKG_HAL_ARM_ARM9
                   CYGPKG_HAL_ARM_ARM9_SMDK2410
                   CYGPKG_IO_SERIAL_ARM_SMDK2410
                   CYGPKG_DEVS_FLASH_ARM_SMDK2410
                   CYGPKG_DEVS_FLASH_SST_39VFXXX (这里变了)
        }
        description "
        The SMDK2410 target provides the packages needed to run eCos on
        Samsung S3c2410x (ARM920T) based development boards (SMDK2410)."
}

然后修改CYGPKG_DEVS_FLASH_ARM_SMDK2410这个包的cdl描述:

cdl_package CYGPKG_DEVS_FLASH_ARM_SMDK2410 {
    display       "FLASH support for Samsung S3c2410x based boards"
    description   "FLASH memory device support for Samsung S3c2410x based
                   development boards"

    parent        CYGPKG_IO_FLASH
    active_if     CYGPKG_IO_FLASH
    requires      CYGPKG_HAL_ARM_ARM9_SMDK2410

    compile       -library=libextras.a smdk2410_flash.c 这里很重要，不然你的flash驱动不会被编译到redboot中。

    # Arguably this should do in the generic package
    # but then there is a logic loop so you can never enable it.
    cdl_interface CYGINT_DEVS_FLASH_SST_39VFXXX_REQUIRED {
        display   "Generic SST SSTVF1601 driver required"
    }

    implements    CYGINT_DEVS_FLASH_SST_39VFXXX_REQUIRED

}

CYGPKG_DEVS_FLASH_SST_39VFXXX这个cdl描述不用动

cdl_package CYGPKG_DEVS_FLASH_SST_39VFXXX {
    display       "SST 39VFXXX FLASH memory support"
    description   "FLASH memory device support for SST 39VFXXX"
    parent        CYGPKG_IO_FLASH
    active_if      CYGPKG_IO_FLASH

    active_if     CYGINT_DEVS_FLASH_SST_39VFXXX_REQUIRED

    implements    CYGHWR_IO_FLASH_DEVICE
    implements    CYGHWR_IO_FLASH_DEVICE_NEEDS_CACHE_HANDLED

    include_dir   cyg/io

}

在/dev/flash/arm/smdk2410中，修改驱动文件。修改后像这样

// Device properties
#include

#define CYGPKG_DEVS_FLASH_SST_39VF1601

// A AMD29LV800BB is equipped with the SMDK2410 platform.
#define CYGNUM_FLASH_INTERLEAVE (1)
#define CYGNUM_FLASH_SERIES     (1)
#define CYGNUM_FLASH_WIDTH      (16)
#define CYGNUM_FLASH_BASE       (0x80000000u)
// #define CYGHWR_FLASH_AM29XXXXX_NO_WRITE_PROTECT

//--------------------------------------------------------------------------
// Now include the driver code
#include "cyg/io/flash_sst_39vfxxx.inl"

static const cyg_flash_block_info_t cyg_flash_sst_block_info[1] = {
    { FLASH_BLOCK_SIZE, FLASH_NUM_REGIONS * CYGNUM_FLASH_SERIES }
};
CYG_FLASH_DRIVER(cyg_flash_sst_flashdev,
                 &cyg_sst_funs,
                 0,                     // Flags
                 CYGNUM_FLASH_BASE,     // Start
                 CYGNUM_FLASH_BASE + (FLASH_BLOCK_SIZE * FLASH_NUM_REGIONS * CYGNUM_FLASH_SERIES) - 1,    // End
                 1,                     // Number of block infos
                 cyg_flash_sst_block_info,
                 NULL                   // priv
    );

// ------------------------------------------------------------------------
// EOF smdk2410_flash.c

这样就支持nor了，可以用fis erase等命令写数据到nor。
redboot到这里就算完毕了，如果想支持网络功能，回头在研究了。

现在来生成ecos内核。
生成ecos内核(也就是libtartet.a库),现在这个阶段，这个是给monitor(redboot)调试用的
//ecosconfig new
ecosconfig new ${TARGET}
ecosconfig tree
ecosconfig check
ecosconfig resolve
make
make tests

下面调试的代码是在example目录里的hello.c程序。

lzd@lzd-laptop:~/ecos-app/install/tests/examples$ file hello
hello: ELF 32-bit LSB executable, ARM, version 1 (SYSV), statically linked, not stripped
就是一个elf格式的文件a

lzd@lzd-laptop:~/ecos-app/install/tests/examples$ arm-eabi-gdb -b 38400 -nw hello
GNU gdb (eCosCentric GNU tools 4.3.2-sw) 6.8.50.20080706
Copyright (C) 2008 Free Software Foundation, Inc.
License GPLv3+: GNU GPL version 3 or later <
This is free software: you are free to change and redistribute it.
There is NO WARRANTY, to the extent permitted by law.  Type "show copying"
and "show warranty" for details.
This GDB was configured as "--host=i686-pc-linux-gnu --target=arm-eabi".
For bug reporting instructions, please see:
<
(gdb) target remote /dev/ttyS0
Remote debugging using /dev/ttyS0
0x0000d524 in ?? ()
(gdb) load
Loading section .rom_vectors, size 0x40 lma 0x40000
Loading section .text, size 0x74cc lma 0x40040
Loading section .rodata, size 0x2d4 lma 0x4750c
Loading section .data, size 0x300 lma 0x477e0
Start address 0x40040, load size 31456
Transfer rate: 3 KB/sec, 305 bytes/write.
(gdb) continue
Continuing.
Hello, eCos world!

Program received signal SIGINT, Interrupt.
[Switching to Thread 2]
0x00010f2c in ?? ()
(gdb)

如果你用objdump去看上面的hello.c的话，会发现他的起始地址是0x00040000，而这个地址是在redboot经过mmu重映射之后的可用sdram空间。
也就是用于gdb调试用的，而且不包含redboot已经完成的启动代码部分，也就是没有连接vectors.S。

现在来生成ecos内核(也就是libtartet.a库),这个是给发布用的应用程序用的
//ecosconfig new
ecosconfig new ${TARGET}

在这里修改ecos.ecc文件，查找CYG_HAL_STARTUP，把他的数值改成ROMRAM方式

# >
# Startup type
# When targetting the SMDK2410 evaluation board it is possible to build
# the system for either RAM bootstrap or ROM bootstrap(s). Select
# 'ram' when building programs to load into RAM using eCos GDB stubs.
# Select 'rom' when building a stand-alone application which will be
# put into ROM, or for the special case of building the eCos GDB stubs
# themselves.
#
cdl_component CYG_HAL_STARTUP {
    # Flavor: data
    user_value ROMRAM
    # value_source user

这样，重修编译这个libtarget.a库。

ecosconfig tree
ecosconfig check
ecosconfig resolve
make
make tests

编译ecos3.0的example目录的文件
arm-eabi-objcopy -O binary -S twothreads twothreads.bin
烧到sst39vf1601中，会有下面的内容：
               Press CTRL-A Z for help on special keys                   
                                                                         
Entering twothreads' cyg_user_start() function                           
Beginning execution; thread data is 0                                    
Beginning execution; thread data is 1                                    
Thread 0: and now a delay of 239 clock ticks                             
Thread 1: and now a delay of 230 clock ticks                             
Thread 1: and now a delay of 221 clock ticks                             
Thread 0: and now a delay of 214 clock ticks                             
Thread 1: and now a delay of 224 clock ticks                             
Thread 0: and now a delay of 243 clock ticks

goodluck ! ^_^