A simple makefile template for c++ project

As you all known，there are four steps  for compiling:
(1)Pre-processing
(2)Compiling
(3)Assembling
(4)Linking

A typical example is:
hello.c-->pre-processing,hello.i-->compiling,hello.s-->Assembling,hello.o-->Linking,hello(execute)

OK，turn to gcc/g++ command!
-g:create debug info.
-c:only compile and create the target file.
-o FILE:create the file specified.
-I  DIRECTORY: include the additional header file path in DIRECTORY。
-L DIRECTORY: include the additional library path in DIRECTORY。

Now,there is a file named main.cpp, write a Makefile just as:

#! /bin/sh

#define the variables
BIN = main
OBJS += main.o
SRC += main.cpp
CC = g++
CFLAGS = -g -o

#define target and command
#ld --> create the execute file
$(BIN): $(OBJS)
  $(CC) $(CFLAGS) $@ $^

#compile --> create the (x).o file
$(OBJS): $(SRC)
  $(CC) -g -c $^

clean:
  rm *.o

What I get the most important point is that,pay attention to the  "=/+=" and ":"，the former is defined for variables,but the latter expressed the dependency.