Interrupts and Exceptions（六）

Exceptions

The 80x86 microprocessors issue roughly 20 different exceptions.^[*] The kernel must provide a dedicated exception handler for each exception type. For some exceptions, the CPU control unit also generates a hardware error code and pushes it on the Kernel Mode stack before starting the exception handler.

x86微处理器提出了20中不同的异常。内核必须为每个异常类型提供专门的异常处理函数。对每个异常，CPU控制单元也生成一个硬件错误码，并在开始执行处理函数前将其压入内核空间栈中。

^[*] The exact number depends on the processor model.

The following list gives the vector, the name, the type, and a brief description of the exceptions found in 80x86 processors. Additional information may be found in the Intel technical documentation.

0 - "Divide error" (fault)

Raised when a program issues an integer division by 0.

当程序提出一个整数除0时产生。

1- "Debug" (trap or fault)

Raised when the TF flag of eflags is set (quite useful to implement single-step execution of a debugged program) or when the address of an instruction or operand falls within the range of an active debug register (see the section "Hardware Context" in Chapter 3).

当设置了eflags寄存器的TF标志，或者当指令或操作数的地址落在一个活动调试寄存器的范围内时产生。

2 - Not used

Reserved for nonmaskable interrupts (those that use the NMI pin).

为不可屏蔽中断（使用NMI管脚的中断）保留。

3 - "Breakpoint" (trap)

Caused by an int3 (breakpoint) instruction (usually inserted by a debugger).

由int3（断点）指令引起（通常由调试器插入）。

4 - "Overflow" (trap)

An into (check for overflow) instruction has been executed while the OF (overflow) flag of eflags is set.

当设置eflags寄存器的OF（溢出）标志，执行了into（溢出检查）指令。

5 - "Bounds check" (fault)

A bound (check on address bound) instruction is executed with the operand outside of the valid address bounds.

当操作数越过了有效地址边界，执行了bound（检查地址边界）指令。

6 - "Invalid opcode" (fault)

The CPU execution unit has detected an invalid opcode (the part of the machine instruction that determines the operation performed).

CPU执行单元检查到一个无效的操作码（决定执行操作的指令的一部分）。

7 - "Device not available" (fault)

An ESCAPE, MMX, or SSE/SSE2 instruction has been executed with the TS flag of cr0 set (see the section "Saving and Loading the FPU, MMX, and XMM Registers" in Chapter 3).

当设置了cr0寄存器的TS标志时，执行了ESCAPE、MMX或者SSE/SSE2指令。

8 - "Double fault" (abort)

Normally, when the CPU detects an exception while trying to call the handler for a prior exception, the two exceptions can be handled serially. In a few cases, however, the processor cannot handle them serially, so it raises this exception.

通常，当CPU在试图调用一个较重要的异常处理函数时，检测到另一个异常，这两个异常可以被串行处理。然而，在一些很少见的情况，处理器不能串行地处理它们，因此产生这个异常。

9 - "Coprocessor segment overrun" (abort)

Problems with the external mathematical coprocessor (applies only to old 80386 microprocessors).

外部算术处理器的问题（仅用在老的80386）。

10 - "Invalid TSS" (fault)

The CPU has attempted a context switch to a process having an invalid Task State Segment.

CPU试图进行上下文切换到一个有着无效TSS段的进程。

11 - "Segment not present" (fault)

A reference was made to a segment not present in memory (one in which the Segment-Present flag of the Segment Descriptor was cleared).

引用一个不在内存中的段（段描述符的段存在标志为空）。

12 - "Stack segment fault" (fault)

The instruction attempted to exceed the stack segment limit, or the segment identified by ss is not present in memory.

指令试图越过堆栈段限制，或者这个有ss标识的段不在内存中。

13 - "General protection" (fault)

One of the protection rules in the protected mode of the 80x86 has been violated.

违背了x86的保护模式的保护规则之一。

14 - "Page Fault" (fault)

The addressed page is not present in memory, the corresponding Page Table entry is null, or a violation of the paging protection mechanism has occurred.

寻址的页不在内存中，对应的页表条目是空的，或者是违背了页式管理的保护机制。

15 - Reserved by Intel

16 - "Floating-point error" (fault)

The floating-point unit integrated into the CPU chip has signaled an error condition, such as numeric overflow or division by 0.^[*]

集成到CPU芯片的浮点数单元产生一个错误条件，比如数字溢出或者除0.

^[*] The 80 x 86 microprocessors also generate this exception when performing a signed division whose result cannot be stored as a signed integer (for instance, a division between -2,147,483,648 and -1).

17 - "Alignment check" (fault)

The address of an operand is not correctly aligned (for instance, the address of a long integer is not a multiple of 4).

操作数的地址没有正确地对齐（比如，一个长整型的地址不是4的倍数）。

18 - "Machine check" (abort)

A machine-check mechanism has detected a CPU or bus error.

机器检查机制检测到CPU或总线错误。

19 - "SIMD floating point exception" (fault)

The SSE or SSE2 unit integrated in the CPU chip has signaled an error condition on a floating-point operation.

The values from 20 to 31 are reserved by Intel for future development. As illustrated in Table 4-1, each exception is handled by a specific exception handler (see the section "Exception Handling" later in this chapter), which usually sends a Unix signal to the process that caused the exception.

Table Signals sent by the exception handlers 

#	Exception	Exception handler	Signal
0	Divide error	divide_error( )	SIGFPE
1	Debug	debug( )	SIGTRAP
2	NMI	nmi( )	None
3	Breakpoint	int3( )	SIGTRAP
4	Overflow	overflow( )	SIGSEGV
5	Bounds check	bounds( )	SIGSEGV
6	Invalid opcode	invalid_op( )	SIGILL
7	Device not available	device_not_available( )	None
8	Double fault	doublefault_fn( )	None
9	Coprocessor segment overrun	coprocessor_segment_overrun( )	SIGFPE
10	Invalid TSS	invalid_TSS( )	SIGSEGV
11	Segment not present	segment_not_present( )	SIGBUS
12	Stack segment fault	stack_segment( )	SIGBUS
13	General protection	general_protection( )	SIGSEGV
14	Page Fault	page_fault( )	SIGSEGV
15	Intel-reserved	None	None
16	Floating-point error	coprocessor_error( )	SIGFPE
17	Alignment check	alignment_check( )	SIGBUS
18	Machine check	machine_check( )	None
19	SIMD floating point	simd_coprocessor_error( )	SIGFPE