Interrupts and Exceptions（四）

IRQs and Interrupts

Each hardware device controller capable of issuing interrupt requests usually has a single output line designated as the Interrupt ReQuest (IRQ) line.^[*] All existing IRQ lines are connected to the input pins of a hardware circuit called the Programmable Interrupt Controller, which performs the following actions:

每个能够提出中断请求的硬件设备控制器，通常有一条输出线，称为IRQ线。所有存在的IRQ线都被连接到一个硬件电路的输入管脚，它叫做可编程中断控制器，执行下列操作：

^[*] More sophisticated devices use several IRQ lines. For instance, a PCI card can use up to four IRQ lines.

1.    Monitors the IRQ lines, checking for raised signals. If two or more IRQ lines are raised, selects the one having the lower pin number.

监控IRQ线，检查产生的信号。如果有两个或更多的IRQ上有信号，选择管脚号较低的那个。

2.    If a raised signal occurs on an IRQ line:

如果产生的信号在一个IRQ线上：

a.    Converts the raised signal received into a corresponding vector.

将收到的信号转换为对应的向量。

b.    Stores the vector in an Interrupt Controller I/O port, thus allowing the CPU to read it via the data bus.

将这个向量存储在中断控制器I/O端口，因此容许CPU通过数据总线读到这个值。

c.    Sends a raised signal to the processor INTR pin, that is, issues an interrupt.

发生一个信号给处理器的INTR管脚，即提出一个中断。

d.    Waits until the CPU acknowledges the interrupt signal by writing into one of the Programmable Interrupt Controllers (PIC) I/O ports; when this occurs, clears the INTR line.

等待，直到CPU收到这个中断信号，通过将其写入PIC的I/O端口；当这个发生时，清除INTR管脚。

3.    Goes back to step 1.

The IRQ lines are sequentially numbered starting from 0; therefore, the first IRQ line is usually denoted as IRQ 0. Intel's default vector associated with IRQ n is n+32. As mentioned before, the mapping between IRQs and vectors can be modified by issuing suitable I/O instructions to the Interrupt Controller ports.

IRQ线是从0开始顺序计数的；因此，第一个IRQ线通常用IRQ 0表示。Intel与IRQ n 关联的默认向量值是n+32。IRQ与向量之间的映射可以通过发出合适的I/O指令给中断控制器端口来修改。

Each IRQ line can be selectively disabled. Thus, the PIC can be programmed to disable IRQs. That is, the PIC can be told to stop issuing interrupts that refer to a given IRQ line, or to resume issuing them. Disabled interrupts are not lost; the PIC sends them to the CPU as soon as they are enabled again. This feature is used by most interrupt handlers, because it allows them to process IRQs of the same type serially.

每条IRQ线可以有选择地关闭。因此，PIC可以被编程关闭IRQ。即PIC可以被告知，停止发出指定IRQ线上的中断，或者恢复发出。关闭中断并不是丢失；一旦IRQ再度开启，PIC就将其送往CPU。这样特性用在很多中断处理函数，因为它容许串行地处理同一类型的IRQ。

Selective enabling/disabling of IRQs is not the same as global masking/unmasking of maskable interrupts. When the IF flag of the eflags register is clear, each maskable interrupt issued by the PIC is temporarily ignored by the CPU. The cli and sti assembly language instructions, respectively, clear and set that flag.

选择开启或关闭IRQ并不等同于可屏蔽中断的屏蔽或未屏蔽状态。当eflags寄存器的IF标志为空时，PIC发出的每个可屏蔽中断都被CPU暂时地忽略。汇编指令cli和sti，分别清除和设置这个标志。

Traditional PICs are implemented by connecting "in cascade" two 8259A-style external chips. Each chip can handle up to eight different IRQ input lines. Because the INT output line of the slave PIC is connected to the IRQ 2 pin of the master PIC, the number of available IRQ lines is limited to 15.

传统的PIC通过级联2个主从8259A芯片实现。每个芯片可以处理8个不同的IRQ输入线。因为从PIC的INT输出管脚连到了主PIC的IRQ2管脚，可用的IRQ线的数目是15。