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分类: LINUX

2007-08-05 17:22:44

浅析armlinux-setup_arch()->paging_init()函数5

文章来源:http://gliethttp.cublog.cn

建议首先参考《浅析armlinux2_4_19启动程序[head-armv.s文件][http://gliethttp.cublog.cn]

//----------------------------------------
//1.arch/arm/mm/Init.c->paging_init()
void __init paging_init(struct meminfo *mi, struct machine_desc *mdesc)
{void *zero_page;
 int node;
 //arch/arm/mm/Init.c->static struct meminfo meminfo __initdata = { 0, };
    memcpy(&meminfo, mi, sizeof(meminfo));//将mi拷贝到全局量meminfo
//请参考《浅析armlinux-setup_arch()->alloc_bootmem_low_pages()函数5-1》
    zero_page = alloc_bootmem_low_pages(PAGE_SIZE);//zero_page指向清0后的虚拟地址
//页表初始化,请参考《浅析armlinux-setup_arch()->memtable_init()函数5-2》[http://gliethttp.cublog.cn]
    memtable_init(mi);//建立中断向量表虚拟地址0xFFFF0000和所有node内存区域虚拟地址到物理地址的映射
//++++++++++++++
//arch/arm/mach-at91rm9200/Core.c
//位于.arch.info段
//MACHINE_START(AT91RM9200, "ATMEL AT91RM9200")//.nr = MACH_TYPE_##_type=MACH_TYPE_AT91RM9200=251
//与上面从u-boot传到r1中的一样[gliethttp]
//MAINTAINER("SAN People / ATMEL")
//BOOT_MEM(AT91_SDRAM_BASE, AT91C_BASE_SYS, AT91C_VA_BASE_SYS)
//BOOT_PARAMS(AT91_SDRAM_BASE + 0x100)//tag list存放的物理地址0x20000100[gliethttp]
//FIXUP(at91rm9200_fixup)
//MAPIO(at91rm9200_map_io)
//INITIRQ(at91rm9200_init_irq)
//MACHINE_END[gliethttp]
//--------------
    if (mdesc->map_io)
//请参见《浅析armlinux-paging_init()->at91rm9200_map_io()函数5-3》[http://gliethttp.cublog.cn]
        mdesc->map_io();//调用at91rm9200_map_io,映射at91rm9200处理器的所有控制寄存器
    flush_cache_all();
    flush_tlb_all();//以上两函数请见后
//初始化每个node内部的所有区域们
    for (node = 0; node < numnodes; node++) {
        unsigned long zone_size[MAX_NR_ZONES];
        unsigned long zhole_size[MAX_NR_ZONES];
        struct bootmem_data *bdata;
        pg_data_t *pgdat;
        int i;
//初始化zone区域们暂存变量
//#define MAX_NR_ZONES 3
//每个node最多可以划分成MAX_NR_ZONES个bank
        for (i = 0; i < MAX_NR_ZONES; i++) {
            zone_size[i] = 0;
            zhole_size[i] = 0;
        }
        pgdat = NODE_DATA(node);//&discontig_node_data[node]
        bdata = pgdat->bdata;
//zone_size[0]存放当前node对应的空间大小
        zone_size[0] = bdata->node_low_pfn - (bdata->node_boot_start >> PAGE_SHIFT);
        if (!zone_size[0])
            continue;
        zhole_size[0] = zone_size[0];//从zhole_size[0]扣除期间每个bank的大小,剩余的即为hole大小
        for (i = 0; i < mi->nr_banks; i++) {
            if (mi->bank[i].node != node)
                continue;
            zhole_size[0] -= mi->bank[i].size >> PAGE_SHIFT;
        }
        arch_adjust_zones(node, zone_size, zhole_size);//我的armlinux是空定义
//请参见《浅析armlinux-paging_init()->free_area_init_core()函数5-4》[http://gliethttp.cublog.cn]
//分配4k页面管理空间,并由指针mem_map指向之,同时对所有4k也管理单元mem_map_t进行初始化
        free_area_init_node(node, pgdat, 0, zone_size,bdata->node_boot_start, zhole_size);
    }
//arch/arm/lib/memzero.S->memzero()
//对memzero的理解可参见《浅析armlinux-__arch_clear_user内存拷贝函数之3》[http://gliethttp.cublog.cn]
    memzero(zero_page, PAGE_SIZE);
//include/asm-arm/arch-at91rm9200/memory.h
//#define __virt_to_phys(vpage) ((vpage) - PAGE_OFFSET + PHYS_OFFSET)
//include/asm-arm/Memory.h->virt_to_page()
//#define __pa(x) __virt_to_phys((unsigned long)(x))//虚拟地址转换成线性对应的物理地址
////转换成当前物理页帧号在mem_map中管理单元的虚拟地址值
//#define pfn_to_page(pfn)    ((mem_map + (pfn)) - PHYS_PFN_OFFSET)
//即:(mem_map+(pfn-PHYS_PFN_OFFSET))
//#define virt_to_page(kaddr) (pfn_to_page(__pa(kaddr) >> PAGE_SHIFT))
    empty_zero_page = virt_to_page(zero_page);
//见后
    flush_dcache_page(empty_zero_page);
}
//----------------------------------------
//2.include/asm-arm/proc-armv/Cache.h->flush_cache_all()
#define flush_cache_all()\
    do{\
        cpu_cache_clean_invalidate_all();\
    }while(0)
//include/asm-arm/Cpu-single.h
#define cpu_cache_clean_invalidate_all    cpu_fn(CPU_NAME,_cache_clean_invalidate_all)
转换后
#define cpu_cache_clean_invalidate_all    cpu_arm920_cache_clean_invalidate_all
//arch/arm/mm/proc-arm920.S->cpu_arm920_cache_clean_invalidate_all()
    .align    5
ENTRY(cpu_arm920_cache_clean_invalidate_all)
    mov    r2, #1
cpu_arm920_cache_clean_invalidate_all_r2:
    mov    ip, #0
#ifdef CONFIG_CPU_DCACHE_WRITETHROUGH//无定义
    mcr    p15, 0, ip, c7, c6, 0
#else
/*
 * 'Clean & Invalidate whole DCache'
 * Re-written to use Index Ops.
 * Uses registers r1, r3 and ip
 */

    mov    r1, #7 << 5               @ 8 segments//8个缓冲块
1:  orr    r3, r1, #63 << 26         @ 64 entries//64根缓存线
2:  mcr    p15, 0, r3, c7, c14, 2    @ clean & invalidate D index
    subs   r3, r3, #1 << 26
    bcs    2b                        @ entries 63 to 0
    subs   r1, r1, #1 << 5
    bcs    1b                        @ segments 7 to 0//每个缓冲块均对应64根缓存线
#endif
    teq    r2, #0
    mcrne  p15, 0, ip, c7, c5, 0     @ invalidate I cache
    mcr    p15, 0, ip, c7, c10, 4    @ drain WB
    mov    pc, lr
//----------------------------------------
//3.include/asm-arm/proc-armv/Cache.h->flush_tlb_all()
#define flush_tlb_all()\
    do {\
        cpu_tlb_invalidate_all();\
    } while (0)
//include/asm-arm/Cpu-single.h
#define cpu_tlb_invalidate_all cpu_fn(CPU_NAME,_tlb_invalidate_all)
转换后
#define cpu_tlb_invalidate_all    cpu_arm920_tlb_invalidate_all
//arch/arm/mm/proc-arm920.S->cpu_arm920_tlb_invalidate_all()
    .align    5
ENTRY(cpu_arm920_tlb_invalidate_all)
    mov    r0, #0
    mcr    p15, 0, r0, c7, c10, 4       @ drain WB//耗写缓冲器
    mcr    p15, 0, r0, c8, c7, 0        @ invalidate I & D TLBs//使指令和数据TLB无效
    mov    pc, lr
//4.include/asm-arm/proc-amrv/Cache.h->flush_dcache_page()
#define mapping_mapped(map)    ((map)->i_mmap || (map)->i_mmap_shared)
static inline void flush_dcache_page(struct page *page)
{
    if (page->mapping && !mapping_mapped(page->mapping))
//该page已经使用
        set_bit(PG_dcache_dirty, &page->flags);
    else {
//该page还没有使用
//计算page对应管理的空间虚拟地址
        unsigned long virt = (unsigned long)page_address(page);
        cpu_cache_clean_invalidate_range(virt, virt + PAGE_SIZE, 0);
    }
}
//include/linux/Mm.h->page_address
#define page_address(page)\
//该宏很方便的将page所属的node空间对应的zone_mem_map和zone_start_paddr
//进行综合运算,计算出page页对应的虚拟地址值
__va( (((page) - page_zone(page)->zone_mem_map) << PAGE_SHIFT)\
    + page_zone(page)->zone_start_paddr)
static inline zone_t *page_zone(struct page *page)
{
    return zone_table[page->flags >> ZONE_SHIFT];
}
//cpu_cache_clean_invalidate_range
//include/asm-arm/Cpu-singnal.h->cpu_cache_clean_invalidate_range()
#define cpu_cache_clean_invalidate_range cpu_fn(CPU_NAME,_cache_clean_invalidate_range)
翻译后
#define cpu_cache_clean_invalidate_range cpu_arm920_cache_clean_invalidate_range
//arch/arm/mm/proc-arm920.S->cpu_arm920_cache_clean_invalidate_range
/*
 * the cache line size of the I and D cache
 */

#define MAX_AREA_SIZE    16384
#define DCACHELINESIZE    32
#define ICACHELINESIZE    32
        .align    5
ENTRY(cpu_arm920_cache_clean_invalidate_range)
    bic    r0, r0, #DCACHELINESIZE - 1     @ && added by PGM
    bic    r1, r1, #DCACHELINESIZE - 1 @ && added by DHM
    sub    r3, r1, r0
    cmp    r3, #MAX_AREA_SIZE
    bgt    cpu_arm920_cache_clean_invalidate_all_r2
1:  teq    r2, #0
#ifdef CONFIG_CPU_DCACHE_WRITETHROUGH//无定义
    mcr    p15, 0, r0, c7, c6, 1      @ invalidate D entry
    mcrne  p15, 0, r0, c7, c5, 1      @ invalidate I entry
    add    r0, r0, #DCACHELINESIZE
    mcr    p15, 0, r0, c7, c6, 1      @ invalidate D entry
    mcrne  p15, 0, r0, c7, c5, 1      @ invalidate I entry
    add    r0, r0, #DCACHELINESIZE
#else
    mcr    p15, 0, r0, c7, c14, 1     @ clean and invalidate D entry
    mcrne  p15, 0, r0, c7, c5, 1      @ invalidate I entry
    add    r0, r0, #DCACHELINESIZE
    mcr    p15, 0, r0, c7, c14, 1     @ clean and invalidate D entry
    mcrne  p15, 0, r0, c7, c5, 1      @ invalidate I entry
    add    r0, r0, #DCACHELINESIZE
#endif
    cmp    r0, r1
    blt    1b
    mcr    p15, 0, r1, c7, c10, 4     @ drain WB
    mov    pc, lr

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