#include
#include
/*
* Jump vector table
*/
.globl _start
_start: b reset
ldr pc, _undefined_instruction
ldr pc, _software_interrupt
ldr pc, _prefetch_abort
ldr pc, _data_abort
ldr pc, _not_used
ldr pc, _irq
ldr pc, _fiq
_undefined_instruction: .word undefined_instruction //定义数据变量
_software_interrupt: .word software_interrupt
_prefetch_abort: .word prefetch_abort
_data_abort: .word data_abort
_not_used: .word not_used
_irq: .word irq
_fiq: .word fiq
.balignl 16,0xdeadbeef //当前地址偏移16的位置填入0xdeadbeef。立个旗杆，占山为王？
/*
*************************************************************************
*
* Startup Code (reset vector) 启动代码
*
* do important init only if we don't start from memory!
* relocate u-boot to ram 将代码复制进ram
* setup stack 设立堆栈
* jump to second stage 跳转至启动第二阶段
*
*************************************************************************
*/
_TEXT_BASE:
.word TEXT_BASE
.globl _armboot_start //全局符号
_armboot_start:
.word _start
/*
* These are defined in the board-specific linker script.
*/
.globl _bss_start
_bss_start:
.word __bss_start
.globl _bss_end
_bss_end:
.word _end
#ifdef CONFIG_USE_IRQ
/* IRQ stack memory (calculated at run-time) */
.globl IRQ_STACK_START
IRQ_STACK_START:
.word 0x0badc0de
/* IRQ stack memory (calculated at run-time) */
.globl FIQ_STACK_START
FIQ_STACK_START:
.word 0x0badc0de
#endif
/*
* the actual reset code 实际启动代码
*/
reset:
/*stack setup for each mode*/
/* SVC32 mode*/
mrs r0,cpsr
bic r0,r0,#0x1f
orr r0,r0,#0x13 //进入svc模式
msr cpsr,r0
ldr r0, _TEXT_BASE
sub r0, r0, #CFG_MALLOC_LEN //预留空间
sub r0, r0, #CFG_GBL_DATA_SIZE
#ifdef CONFIG_USE_IRQ
sub r0, r0, #(CONFIG_STACKSIZE_IRQ+CONFIG_STACKSIZE_FIQ)
#endif
sub sp, r0, #12 //再预留3word,设置堆栈
#ifdef CONFIG_USE_IRQ //如果使用IRQ，
/* IRQ mode*/
mov R4, #0xD2
msr cpsr, R4 //进入IRQ模式，禁止IRQ和FRQ
ldr r0, _TEXT_BASE
sub r0, r0, #CFG_MALLOC_LEN
sub r0, r0, #CFG_GBL_DATA_SIZE
sub r0, r0, #(CONFIG_STACKSIZE_FIQ)
sub sp, r0, #12 //设置IRQ堆栈
/* FIQ mode*/
mov R4, #0xD1 //设置FIQ堆栈
msr cpsr, R4 //进入FRQ模式，禁止IRQ和FRQ
ldr r0, _TEXT_BASE
sub r0, r0, #CFG_MALLOC_LEN
sub r0, r0, #CFG_GBL_DATA_SIZE
sub sp, r0, #12
#endif
/* ABORT mode*/
mov R4, #0xD7 //设置ABORT堆栈
msr cpsr, R4 //进入ABORT模式，禁止IRQ和FRQ
ldr r0, _TEXT_BASE
sub r0, r0, #CFG_MALLOC_LEN
sub r0, r0, #CFG_GBL_DATA_SIZE
sub sp, r0, #8 //预留2word
/* UNDEFINE mode*/
mov R4, #0xDB //设置UNDEFINE堆栈
msr cpsr, R4
ldr r0, _TEXT_BASE
sub r0, r0, #CFG_MALLOC_LEN
sub r0, r0, #CFG_GBL_DATA_SIZE
sub sp, r0, #4
/* SYSTEM mode*/
mov R4, #0xDF //设置SYSTEM堆栈
msr cpsr, R4
ldr r0, _TEXT_BASE
sub r0, r0, #CFG_MALLOC_LEN
sub sp, r0, #CFG_GBL_DATA_SIZE
/*Return to SVC mode 返回SVC模式*/
mov R4, #0xD3
msr cpsr, R4
/*
* we do sys-critical inits only at reboot仅在系统重启时初始化堆栈,
* not when booting from ram!
*/
#ifndef CONFIG_SKIP_LOWLEVEL_INIT //如果没有定义，的确没有定义
bl cpu_init_crit //首先执行cpu_init_crit
/*
* before relocating, we have to setup RAM timing
* because memory timing is board-dependend, you will
* find a lowlevel_init.S in your board directory.
*/
bl lowlevel_init //跳转到lowlevel_init执行
#endif
remap: //重映射前
mov r0, pc //SDRAM已经初始化完成，获取当前PC指针
add r0, r0, #0x20000000 //0x20000000，保证CPU继续在NorFlash中取指
add r0, r0, #0x08 //0x8是因为流水线以及下面指令对于PC的偏移
mov pc, r0
mov r0, r0
mov r0, r0
mov r0, r0
mov r0, r0
ldr r4, =0x11000020 //重映射零地址为SDRAM
ldr r5, =0xb
str r5, [ r4 ]
/*
* init BSS section 初始化BSS，将这一段地址数据清空
*/
ldr r0, = 0
ldr r1, _bss_start
ldr r2, _bss_end
bss_init:
str r0, [r1]
add r1,r1,#4
cmp r1,r2
blt bss_init
#ifndef CONFIG_SKIP_RELOCATE_UBOOT
relocate: /* relocate U-Boot to RAM//把uboot重新定位到RAM */
adr r0, _start /* r0 <- current position of code 当前代码地址 */
ldr r1, _TEXT_BASE /* test if we run from flash or RAM 比较当前地址和_TEXT_BASE地址，TEXT_BASE = 0x30700000 */
cmp r0, r1 /* don't reloc during debug 如果不相等说明代码在Norflash中执行，进行搬运 */
beq vector_copy
ldr r2, _armboot_start
ldr r3, _bss_start
sub r2, r3, r2 /* r2 <- size of armboot */
add r2, r0, r2 /* r2 <- source end address */
copy_loop: /* 将代码从Norflash搬运至SDRAM */
ldmia r0!, {r3-r10} /* copy from source address [r0] 从r0搬运到r1，r0是源地址，r1目的地址，r2大小 */
stmia r1!, {r3-r10} /* copy to target address [r1] 多ldr多str 一次搬运32byte*/
cmp r0, r2 /* until source end addreee [r2] 判断是否搬运完毕*/
ble copy_loop
/*
now copy to sram the interrupt vector 拷贝中断向量表
*/
vector_copy:
ldr r0, _TEXT_BASE
add r2, r0, #128
ldr r1, =0x30000000 /*modified by shixq from 0x0c000000 to 0x30000000*/
/* add r1, r1, #0x08 *//*deleted by shixq*/
vector_copy_loop:
ldmia r0!, {r3-r10}
stmia r1!, {r3-r10}
cmp r0, r2
ble vector_copy_loop
#endif /* CONFIG_SKIP_RELOCATE_UBOOT */
/*enable the irq开中断*/
mrs R4, cpsr
bic R4, R4, #0x80
msr cpsr, R4
ldr pc, _start_armboot //跳转到stage2执行c代码
_start_armboot: .word start_armboot
/*start_armboot是一个函数指针，这个symbol对应了符号表里的函数地址，
这个函数是一个C语言的函数，他就是u-boot的stage2的入口点，stage2应该是在RAM里面执行。*/
/*
*************************************************************************
*
* CPU_init_critical registers 初始化处理器
*
* setup important registers 设置重要寄存器
* setup memory timing 设置内存时序
*
*************************************************************************
*/
cpu_init_crit:
/* PLLCON */
ldr r0, =0x10001004 /*设置主频为88M*/
ldr r1, =0x400B
str r1, [r0]
ldr r0, =0x10001014 /*设置工作模式为Normal*/
ldr r1, =0x1
str r1, [r0]
ldr r0, =0x10001004 /*确认工作模式为88M*/
ldr r1, =0xC00B
str r1, [r0]
ldr r0, =0x1000100C /*打开所有模块*/
ldr r1, =0xFFFFFFFF
str r1, [r0]
/*UARTCON*/
#if 1
ldr r0, =0x1000500C /*UART0行控制寄存器databit:8*/
ldr r1, =0x83 //Divisor Latch 被访问,串行数据输出正常,固定奇偶校验位不使能,奇校验,无奇偶校验位,一个停止位,8bits
str r1, [r0]
ldr r0, =0x10005004 /*LCR[0]为1，此地址为波特率高八位寄存器*/
ldr r1, =0x0
str r1, [r0]
ldr r0, =0x10005000 /*LCR[0]为1，此地址为波特率低八位寄存器*/
ldr r1, =0x2F //101111=47 波特率计算方法：88000000/47/16=117021
str r1, [r0]
ldr r0, =0x1000500C //取消Divisor Latch访问,串行数据输出正常,固定奇偶校验位不使能,奇校验,无奇偶校验位,一个停止位,8bits
ldr r1, =0x3
str r1, [r0]
#endif
mov pc, lr //返回
/*************************************************************/
/* interrupt vectors由于u-boot中没有使用中断，这段不看了*/
/*************************************************************/
省略
/***************************************************************/
/*lowlevel_init.s 由于内容很少，直接放在最后 */
/***************************************************************/
.globl lowlevel_init
lowlevel_init:
ldr r4, =EMI_CSECONF //初始化EMI的CSE——接内存
ldr r5, =0x8ca6a6a1 //1000_1100_1010_0110_1010_0110_1010_0001
//31 片选信号nCSE 接SDRAM, 29-24:001100 默认值，23-22：10 WE_HOLD周期2，21-18：1001 WE_EN 15个周期，17-16：WE_WAIT周期2
//15-14:10 OE_HOLD 2个周期，13-10：1001 OE_EN 15个周期，9-8：WE_WAIT周期2，7-6：10 CS_HOLD 2个周期，5-4：10 CS_WAIT 2个周期，
//bit3:1 选择16 位存储器， bit0 使能总线
str r5, [ r4 ]
ldr r4, =EMI_SDCONF1 //初始化SD控制器 行列位数 刷新周期等等
ldr r5, =0x1E104177
str r5, [ r4 ]
ldr r4, =EMI_SDCONF2
ldr r5, =0x80001860
str r5, [ r4 ]
mov pc, lr //返回
