MIPS 非对齐指令操作是如何处理的

MIPS 非对齐指令操作是如何处理的  

Hi all

 

最近发现了一个有点想不通的事情，是这样的，mips一般是对对齐有严格要求的，四字节的话需要地址也是四字节对齐的。

 

在fusion code中，在ethernet driver中分配rx skb是这样来的

 

static struct sk_buff *

    ag7240_buffer_alloc(void)

{

    struct sk_buff *skb;

 

    skb = dev_alloc_skb(AG7240_RX_BUF_SIZE);

    if (unlikely(!skb))

        return NULL;

    skb_reserve(skb, AG7240_RX_RESERVE);

 

    return skb;

}

 

可以看出，分配以后一个skb最终一般会预留0x50个空间，通过打印也是这样

Skb->head=0x80d06000, skb->data=0x80d06050

 

DMA会把数据从skb->data开始装。

问题是这样的，因为mac头部是14个字节，这样到ip头时，就是0x80d0605e, 然后ip头就不是四字节对齐，可知到时引用saddr这个字段也不是四字节对齐。

这个不是会引起问题吗？但它却运行的很好。

 

而aquila也是ag7240的以太网驱动，会有这样一个动作

skb_reserve(skb, (ATHR_GMAC_RX_RESERVE + 2));

它额外的加了二个字节，于是ip头的地址就是四字节对齐了。

 

不过这样操作看来要求DMA能够支持2字节的传输。

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I think we can divide unaligned memory accessing to two cateogries:

1.       Static, which means it’s known unaligned memory accessing at compile time;

2.       Dynamic, which means it’s impossible to determine if it’s unaligned memory accessing at run time;

For case 1, compiler should handle it well. For case 2, different architecture may have different processing.

For MIPS, normally kernel exception handler will handle the unaligned data accessing both in kernel and user space(instruction unaligned exception is not supported as it’s a critical error). You can check arch/mips/kernel/unaligned.c  for details(I’m using 2.6.32 kernel).

 

Some more info: two debugfs files have been exported by kernel for unaligned memory accessing. Suppose you mount debugfs at /sys/kernel/debug, then

/sys/kernel/debug/mips/unaligned_action: 0 – quiet processing(default value), 1 – Dump register and stack, then panic, 2 – Dump register and stack for each unaligned data accessing

/sys/kernel/debug/mips/unaligned_instructions: a counter, how many instructions have caused unaligned memory accessing.

 

Thanks,

Michael

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Hi Michael

 

Thanks for your information about unaligned.c , my kernel is 2.6.15, and  it didn’t have debugfs.

I confirmed that if we don’t reserve extra two bytes in the skb header, &iph->saddr will be not 4 bytes alignment.

And it will be handled as ade exception,

But no panic, it is because in exception, for some type of unaligned access, MIPS provide other instructions to software emulate the access.

At last, it modify the EPC to EPC+4, when return from the exception, it will continue to run next instruction, like no exception happen.

the precedure is 

1   using lwl, lwr instructions to get the value from unaligned address.  could refer to section 2.5

2   store the address to the register that the trapped instruction lw used.

3   EPC += 4.

4   return from exception, then, it will execute EPC+4, like no exception happen.

Notice: not all trapped address can be emulated, there are some limitation, such as  we are fetching PC instruction...

So, for fusion code, if it is used as router, the efficiency will be low due to frequent access ip address.

 

Thanks,

Roger