简单的Makefile

看了linuxforum上的帖子，我也仔细读了读ldd3-29页的几段话

最简单的Makefile如下

obj-m := module.o
module-objs := file1.o file2.o

为了使其正常工作，需要在大的内核构造调用环境中调用它

因此正确的命令行应该为 make -C $(KERNELDIR) M='pwd' modules

这样make开始时首先到 -C 指定的 kernelsource 目录下，调用内核顶层的Makefile文件，用来设定各种环境参数等等，然后在执行modules目标之前，回到了 M=''的目录中,设置了变量 obj-m，回头再执行modules目标时，该目标指向obj-m,这样最终构造的目标是我们这里所设置的obj-m.

稍微明白点了，书读百遍不会错的

下面是该类完整的Makefile

# To build modules outside of the kernel tree, we run "make"
# in the kernel source tree; the Makefile these then includes this
# Makefile once again.
# This conditional selects whether we are being included from the
# kernel Makefile or not.
ifeq ($(KERNELRELEASE),)

    # Assume the source tree is where the running kernel was built
    # You should set KERNELDIR in the environment if it's elsewhere
    KERNELDIR ?= /lib/modules/$(shell uname -r)/build
    # The current directory is passed to sub-makes as argument
    PWD := $(shell pwd)

modules:
 $(MAKE) -C $(KERNELDIR) M=$(PWD) modules

modules_install:
 $(MAKE) -C $(KERNELDIR) M=$(PWD) modules_install

clean:
 rm -rf *.o *~ core .depend .*.cmd *.ko *.mod.c .tmp_versions

.PHONY: modules modules_install clean

else
    # called from kernel build system: just declare what our modules are
    obj-m := hello.o hellop.o seq.o jit.o jiq.o sleepy.o complete.o \
             silly.o faulty.o kdatasize.o kdataalign.o
endif