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2005-09-06 16:53:28

System boards

main contents:
identify the diffenent system and CPU boards used in Sun Enterprise servers
identify each I/O board type and the peripheral devices they support
describe the function of the Clock+ board
remove and replace a CPU module

The system's main logic board provides sixteen slots for high-capacity dual in line memory modules(DIMMs). the system supports sun standard 200-pin ,5-volt, 60-nanosecond memory modules. modules of 32- 64- and 128-Mbyte capacities can be installed in the system

The following rules apply to configuring the systems memory:
memory DIMMs must be added four at a time within the same bank
each bank used must have four identical capacity DIMMs installed
memory bank A must always be filled
DIMM capacities can differ from one bank to the next

The enterprise systems support the five types of I/O boards identified as follows:
type1-SBus I/O board with FC-OM fibre Channel
type4-SBus+I/O board with FC-AL fibre Channel
type2-Graphics I/O board with FC-OM fibre Channel
type5-Graphics+I/O board with FC-AL fibre Channel
type3-PCI+ I/O board

The clock+ board provides:
programmable system and processor clock
serial,keyboard,and mouse ports for the console
centralized time-of-day(TOD) chip that includes NVRAM
centralized reset logic
status and control of power supplies

The clock+ board allows you to connect an ASCII terminal to the serial port and a Sun keyboard and mouse to the keyboard port. This allows you to interface to the local system console. The serial port allows POST messages to be displayed to a local ASCII terminal

The following lists the general LED condition rules for the CPU/Memory+ and I/O+ boards:
if no LEDs are lit, there is no electrical power to the board
if the green power and running LEDs are not lit, the board is ready for removal
if no LEDs are flashing, the system is hung or in the process of booting up
the board requires service if the yellow service LED is lit continuously. it is a normal condition for the service LED to flash during POST testing

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