单板gpio口物理地址注册进系统：samsung_gpiolib_init

static __init int samsung_gpiolib_init(void)
{
struct samsung_gpio_chip *chip;
int i, nr_chips;
int group = 0;


samsung_gpiolib_set_cfg(samsung_gpio_cfgs, ARRAY_SIZE(samsung_gpio_cfgs));


if (soc_is_s3c24xx()) {
s3c24xx_gpiolib_add_chips(s3c24xx_gpios,
ARRAY_SIZE(s3c24xx_gpios), S3C24XX_VA_GPIO);
} else if (soc_is_s3c64xx()) {
samsung_gpiolib_add_2bit_chips(s3c64xx_gpios_2bit,
ARRAY_SIZE(s3c64xx_gpios_2bit),
S3C64XX_VA_GPIO + 0xE0, 0x20);
samsung_gpiolib_add_4bit_chips(s3c64xx_gpios_4bit,
ARRAY_SIZE(s3c64xx_gpios_4bit),
S3C64XX_VA_GPIO);
samsung_gpiolib_add_4bit2_chips(s3c64xx_gpios_4bit2,
ARRAY_SIZE(s3c64xx_gpios_4bit2));
} else if (soc_is_s5p6440()) {
samsung_gpiolib_add_2bit_chips(s5p6440_gpios_2bit,
ARRAY_SIZE(s5p6440_gpios_2bit), NULL, 0x0);
samsung_gpiolib_add_4bit_chips(s5p6440_gpios_4bit,
ARRAY_SIZE(s5p6440_gpios_4bit), S5P_VA_GPIO);
samsung_gpiolib_add_4bit2_chips(s5p6440_gpios_4bit2,
ARRAY_SIZE(s5p6440_gpios_4bit2));
s5p64x0_gpiolib_add_rbank(s5p6440_gpios_rbank,
ARRAY_SIZE(s5p6440_gpios_rbank));
} else if (soc_is_s5p6450()) {
samsung_gpiolib_add_2bit_chips(s5p6450_gpios_2bit,
ARRAY_SIZE(s5p6450_gpios_2bit), NULL, 0x0);
samsung_gpiolib_add_4bit_chips(s5p6450_gpios_4bit,
ARRAY_SIZE(s5p6450_gpios_4bit), S5P_VA_GPIO);
samsung_gpiolib_add_4bit2_chips(s5p6450_gpios_4bit2,
ARRAY_SIZE(s5p6450_gpios_4bit2));
s5p64x0_gpiolib_add_rbank(s5p6450_gpios_rbank,
ARRAY_SIZE(s5p6450_gpios_rbank));
} else if (soc_is_s5pc100()) {
group = 0;
chip = s5pc100_gpios_4bit;
nr_chips = ARRAY_SIZE(s5pc100_gpios_4bit);


for (i = 0; i < nr_chips; i++, chip++) {
if (!chip->config) {
chip->config = &samsung_gpio_cfgs[3];
chip->group = group++;
}
}
samsung_gpiolib_add_4bit_chips(s5pc100_gpios_4bit, nr_chips, S5P_VA_GPIO);
#if defined(CONFIG_CPU_S5PC100) && defined(CONFIG_S5P_GPIO_INT)
s5p_register_gpioint_bank(IRQ_GPIOINT, 0, S5P_GPIOINT_GROUP_MAXNR);
#endif
} else if (soc_is_s5pv210()) {
group = 0;
chip = s5pv210_gpios_4bit;
nr_chips = ARRAY_SIZE(s5pv210_gpios_4bit);


for (i = 0; i < nr_chips; i++, chip++) {
if (!chip->config) {
chip->config = &samsung_gpio_cfgs[3];
chip->group = group++;
}
}
samsung_gpiolib_add_4bit_chips(s5pv210_gpios_4bit, nr_chips, S5P_VA_GPIO);
#if defined(CONFIG_CPU_S5PV210) && defined(CONFIG_S5P_GPIO_INT)
s5p_register_gpioint_bank(IRQ_GPIOINT, 0, S5P_GPIOINT_GROUP_MAXNR);
#endif
} else if (soc_is_exynos4210()) {
group = 0;


/* gpio part1 */
chip = exynos4_gpios_1;
nr_chips = ARRAY_SIZE(exynos4_gpios_1);


for (i = 0; i < nr_chips; i++, chip++) {
if (!chip->config) {
chip->config = &exynos4_gpio_cfg;
chip->group = group++;
}
#ifdef CONFIG_CPU_EXYNOS4210
exynos4_gpiolib_attach_ofnode(chip,
EXYNOS4_PA_GPIO1, i * 0x20);
#endif
}
samsung_gpiolib_add_4bit_chips(exynos4_gpios_1, nr_chips, S5P_VA_GPIO1);


/* gpio part2 */
chip = exynos4_gpios_2;
nr_chips = ARRAY_SIZE(exynos4_gpios_2);


for (i = 0; i < nr_chips; i++, chip++) {
if (!chip->config) {
chip->config = &exynos4_gpio_cfg;
chip->group = group++;
}
#ifdef CONFIG_CPU_EXYNOS4210
exynos4_gpiolib_attach_ofnode(chip,
EXYNOS4_PA_GPIO2, i * 0x20);
#endif
}
samsung_gpiolib_add_4bit_chips(exynos4_gpios_2, nr_chips, S5P_VA_GPIO2);


/* gpio part3 */
chip = exynos4_gpios_3;
nr_chips = ARRAY_SIZE(exynos4_gpios_3);


for (i = 0; i < nr_chips; i++, chip++) {
if (!chip->config) {
chip->config = &exynos4_gpio_cfg;
chip->group = group++;
}
#ifdef CONFIG_CPU_EXYNOS4210
exynos4_gpiolib_attach_ofnode(chip,
EXYNOS4_PA_GPIO3, i * 0x20);
#endif
}
samsung_gpiolib_add_4bit_chips(exynos4_gpios_3, nr_chips, S5P_VA_GPIO3);


#if defined(CONFIG_CPU_EXYNOS4210) && defined(CONFIG_S5P_GPIO_INT)
s5p_register_gpioint_bank(IRQ_GPIO_XA, 0, IRQ_GPIO1_NR_GROUPS);
s5p_register_gpioint_bank(IRQ_GPIO_XB, IRQ_GPIO1_NR_GROUPS, IRQ_GPIO2_NR_GROUPS);
#endif
} else {
WARN(1, "Unknown SoC in gpio-samsung, no GPIOs added\n");
return -ENODEV;
}


return 0;
}
core_initcall(samsung_gpiolib_init);


int s3c_gpio_cfgpin(unsigned int pin, unsigned int config)
{
struct samsung_gpio_chip *chip = samsung_gpiolib_getchip(pin);
unsigned long flags;
int offset;
int ret;


if (!chip)
return -EINVAL;


offset = pin - chip->chip.base;


samsung_gpio_lock(chip, flags);
ret = samsung_gpio_do_setcfg(chip, offset, config);
samsung_gpio_unlock(chip, flags);


return ret;
}
EXPORT_SYMBOL(s3c_gpio_cfgpin);


int s3c_gpio_cfgpin_range(unsigned int start, unsigned int nr,
 unsigned int cfg)
{
int ret;


for (; nr > 0; nr--, start++) {
ret = s3c_gpio_cfgpin(start, cfg);
if (ret != 0)
return ret;
}


return 0;