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分类: 嵌入式

2014-04-06 17:18:36

1.解决Flash: *** failed ***

    修改arch/arm/lib/board.c,把第588行的hang()注释掉,587行的puts(failed);改为puts("0 MiB\n");

    重新make all 后烧写,结果如下

    


2.解决raise: Signal # 8 caught
    修改arch/arm/cpu/arm1176/s3c64xx/timer.c,如下

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  1. /*
  2.  * (C) Copyright 2003
  3.  * Texas Instruments <www.ti.com>
  4.  *
  5.  * (C) Copyright 2002
  6.  * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
  7.  * Marius Groeger <mgroeger@sysgo.de>
  8.  *
  9.  * (C) Copyright 2002
  10.  * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
  11.  * Alex Zuepke <azu@sysgo.de>
  12.  *
  13.  * (C) Copyright 2002-2004
  14.  * Gary Jennejohn, DENX Software Engineering, <garyj@denx.de>
  15.  *
  16.  * (C) Copyright 2004
  17.  * Philippe Robin, ARM Ltd. <philippe.robin@arm.com>
  18.  *
  19.  * (C) Copyright 2008
  20.  * Guennadi Liakhovetki, DENX Software Engineering, <lg@denx.de>
  21.  *
  22.  * See file CREDITS for list of people who contributed to this
  23.  * project.
  24.  *
  25.  * This program is free software; you can redistribute it and/or
  26.  * modify it under the terms of the GNU General Public License as
  27.  * published by the Free Software Foundation; either version 2 of
  28.  * the License, or (at your option) any later version.
  29.  *
  30.  * This program is distributed in the hope that it will be useful,
  31.  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  32.  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.     See the
  33.  * GNU General Public License for more details.
  34.  *
  35.  * You should have received a copy of the GNU General Public License
  36.  * along with this program; if not, write to the Free Software
  37.  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  38.  * MA 02111-1307 USA
  39.  */

  40. #include <common.h>
  41. #include <asm/proc-armv/ptrace.h>
  42. #ifdef CONFIG_S3C6400
  43. #include <asm/arch/s3c6400.h>
  44. #else
  45. #include <asm/arch/s3c6410.h>
  46. #endif
  47. #include <div64.h>

  48. //static ulong gd->arch.timer_rate_hz ;
  49. DECLARE_GLOBAL_DATA_PTR;

  50. #define PRESCALER    167

  51. static s3c64xx_timers *s3c64xx_get_base_timers(void)
  52. {
  53.     return (s3c64xx_timers *)ELFIN_TIMER_BASE;
  54. }

  55. /* macro to read the 16 bit timer */
  56. static inline ulong read_timer(void)
  57. {
  58.     s3c64xx_timers *const timers = s3c64xx_get_base_timers();

  59.     return timers->TCNTO4;
  60. }

  61. /* Internal tick units */
  62. /* Last decremneter snapshot */
  63. //static unsigned long lastdec;
  64. /* Monotonic incrementing timer */
  65. //static unsigned long long timestamp;

  66. int timer_init(void)
  67. {
  68.     s3c64xx_timers *const timers = s3c64xx_get_base_timers();

  69.     /* use PWM Timer 4 because it has no output */
  70.     /*
  71.      * We use the following scheme for the timer:
  72.      * Prescaler is hard fixed at 167, divider at 1/4.
  73.      * This gives at PCLK frequency 66MHz approx. 10us ticks
  74.      * The timer is set to wrap after 100s, at 66MHz this obviously
  75.      * happens after 10,000,000 ticks. A long variable can thus
  76.      * keep values up to 40,000s, i.e., 11 hours. This should be
  77.      * enough for most uses:-) Possible optimizations: select a
  78.      * binary-friendly frequency, e.g., 1ms / 128. Also calculate
  79.      * the prescaler automatically for other PCLK frequencies.
  80.      */
  81.     timers->TCFG0 = PRESCALER << 8;
  82.     if (gd->arch.timer_rate_hz == 0) {
  83.         //gd->arch.timer_rate_hz = get_PCLK() / PRESCALER * (100 / 4); /* 100s */
  84.         gd->arch.timer_rate_hz = get_PCLK() / PRESCALER * (100 / 4);
  85.         timers->TCFG1 = (timers->TCFG1 & ~0xf0000) | 0x20000;
  86.     }

  87.     /* load value for 10 ms timeout */
  88.     //gd->arch.lastinc = timers->TCNTB4 = gd->arch.timer_rate_hz ;
  89.     gd->arch.lastinc =timers->TCNTB4 =gd->arch.timer_rate_hz;
  90.     /* auto load, manual update of Timer 4 */
  91.     timers->TCON = (timers->TCON & ~0x00700000) | TCON_4_AUTO |
  92.         TCON_4_UPDATE;

  93.     /* auto load, start Timer 4 */
  94.     timers->TCON = (timers->TCON & ~0x00700000) | TCON_4_AUTO | COUNT_4_ON;
  95.     //timestamp= 0;
  96.     gd->arch.timer_reset_value=0;
  97.     return 0;
  98. }

  99. /*
  100.  * timer without interrupts
  101.  */

  102. /*
  103.  * This function is derived from PowerPC code (read timebase as long long).
  104.  * On ARM it just returns the timer value.
  105.  */
  106. unsigned long long get_ticks(void)
  107. {
  108.     ulong now = read_timer();

  109.     if (gd->arch.lastinc >= now) {
  110.         /* normal mode */
  111.         gd->arch.timer_reset_value+= gd->arch.lastinc - now;
  112.     } else {
  113.         /* we have an overflow ... */
  114.         gd->arch.timer_reset_value+= gd->arch.lastinc + gd->arch.timer_rate_hz - now;
  115.     }
  116.     gd->arch.lastinc = now;

  117.     return gd->arch.timer_reset_value;
  118. }

  119. /*
  120.  * This function is derived from PowerPC code (timebase clock frequency).
  121.  * On ARM it returns the number of timer ticks per second.
  122.  */
  123. ulong get_tbclk(void)
  124. {
  125.     /* We overrun in 100s */
  126.     return (ulong)(gd->arch.timer_rate_hz / 100);
  127. }

  128. ulong get_timer_masked(void)
  129. {
  130.     unsigned long long res = get_ticks();
  131.     do_div (res, (gd->arch.timer_rate_hz / (100 * CONFIG_SYS_HZ)));
  132.     return res;
  133. }

  134. ulong get_timer(ulong base)
  135. {
  136.     return get_timer_masked() - base;
  137. }

  138. void __udelay(unsigned long usec)
  139. {
  140.     unsigned long long tmp;
  141.     ulong tmo;

  142.     tmo = (usec + 9) / 10;
  143.     tmp = get_ticks() + tmo;    /* get current timestamp*/

  144.     while (get_ticks() < tmp)/* loop till event */
  145.          /*NOP*/;
  146. }


        重新make all 后烧写,结果如下

        


3.解决NAND: No NAND device found!!!

    修改drivers/mtd/nand/nand_ids.c,在/* 8 Gigabit */后添加

            {"NAND 1GiB 1,8V 8-bit", 0x38, 4096, 1024, 512*1024, LP_OPTIONS},//MT

    重新编译烧写后显示

        

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