大体上看了一下boot0的代码,没有找到交叉编译的工具,所以也没有编译实验一下(即以下分析可能有错).
boot0的代码在./lichee/boot/boot0目录下:
1. 开始的代码
这部分代码准备了c语言的环境,并跳到c函数Boot0_C_part中
Boot0.slichee/boot/boot0/Boot0.s
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INCLUDE boot0_i.inc
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IMPORT Boot0_C_part
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IMPORT set_pll
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PRESERVE8
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AREA init, CODE, READONLY
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CODE32
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ENTRY
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initialize
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//设置当前运行SVC模式
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mrs r0, cpsr
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bic r0, r0, #ARMV7_MODE_MASK
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orr r0, r0, #ARMV7_SVC_MODE
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orr r0, r0, #( ARMV7_IRQ_MASK | ARMV7_FIQ_MASK ) ;// After reset, ARM automaticly disables IRQ and FIQ, and runs in SVC mode.
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bic r0, r0, #ARMV7_CC_E_BIT ;// set little-endian
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msr cpsr_c, r0
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//关mmu, data cache, icache, flow prediction,align
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mrc p15, 0, r0, c1, c0
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bic r0, r0, #( ARMV7_C1_M_BIT | ARMV7_C1_C_BIT ) ;// disable MMU, data cache
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bic r0, r0, #( ARMV7_C1_I_BIT | ARMV7_C1_Z_BIT ) ;// disable instruction cache, disable flow prediction
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bic r0, r0, #( ARMV7_C1_A_BIT) ;// disable align
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mcr p15, 0, r0, c1, c0
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//为运行C语言设置栈
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ldr sp, =BOOT0_STACK_BOTTOM
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//调用C函数set_pll,设置cpu频率
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bl set_pll
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//调用C函数Boot0_C_part
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bl Boot0_C_part
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b . ;// infinite loop
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END
2. 进入
然后调用文件Boot0_C_part.c中的Boot0_C_part
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void Boot0_C_part( void )
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{
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__u32 status;
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__s32 dram_size;
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//将boot0的代码由 Load$$Boot0_RW_ZI$$Base复制到Image$$Boot0_RW_ZI$$Base
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move_RW( );
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//清bss
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clear_ZI( );
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//设置了各个clock,具体哪个没看
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timer_init();
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//初始化串口,以后就可以打印了
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UART_open( BT0_head.prvt_head.uart_port, (void *)BT0_head.prvt_head.uart_ctrl, 24*1000*1000 );
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//打印
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print_version();
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//以下就是一些初始化
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...
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//在文件./lichee/boot/config/storage_media_cfg/nand/storage_media_cfg.h中配置了启动设备
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#if SYS_STORAGE_MEDIA_TYPE == SYS_STORAGE_MEDIA_NAND_FLASH
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//初始化nand flash,读取nand上的第2块(烧录时boot1写在了这个地方),第2块开头有一些数据记录了boot1的大小,
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//按这个大小数取整个的boot1到内存的BOOT1_BASE(0x42400000)处
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status = load_Boot1_from_nand( );
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#elif SYS_STORAGE_MEDIA_TYPE == SYS_STORAGE_MEDIA_SPI_NOR_FLASH
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status = load_boot1_from_spinor( );
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#elif SYS_STORAGE_MEDIA_TYPE == SYS_STORAGE_MEDIA_SD_CARD
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status = load_boot1_from_sdmmc( (char *)BT0_head.prvt_head.storage_data ); // ????boot1
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#else
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#error The storage media of Boot1 has not been defined.
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#endif
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mmu_disable( ); // disable instruction cache
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if( status == OK )
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{
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set_dram_para((void *)&BT0_head.prvt_head.dram_para, dram_size);
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set_nand_good_block_ratio_para((void *)&BT0_head.prvt_head.storage_data);
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jump_to( BOOT1_BASE ); //跳到BOOT1_BASE处,开始执行boot1的东东
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}
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}
注: boot0的交叉编译工具链是在lichee/boot/config/ARMCC_CROSSTOOL.CFG中有定义的,需要ARMRVDS.不知上哪儿找这个东东.
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