Chinaunix首页 | 论坛 | 博客

lgd3608的ChinaUnix博客

首页　| 　博文目录　| 　关于我

lgd3608

  • 博客访问： 33505
  • 博文数量： 13
  • 博客积分： 0
  • 博客等级： 民兵
  • 技术积分： 0
  • 用 户 组： 普通用户
  • 注册时间： 2014-08-04 21:15
文章分类

全部博文（13）

文章存档

2015年（11）

2014年（2）

我的朋友
最近访客
推荐博文
相关博文
linux内存管理之DMA

分类： LINUX

2015-06-06 10:22:12

原文地址：linux内存管理之DMA 作者：linuxDOS

     说起DMA我们并不陌生，但是实际编程中去用的人不多吧，最多就是网卡驱动里的环形buffer，再有就是设备的dma，下面我们就分析分析.
   DMA用来在设备内存和内存之间直接数据交互。而无需cpu干预
  
内核为了方便驱动的开发，已经提供了几个dma 函数接口。
dma跟硬件架构相关，所以linux关于硬件部分已经给屏蔽了，有兴趣的可以深入跟踪学习.

按照linux内核对dma层的架构设计，各平台dma缓冲区映射之间的差异由内核定义的一个dma操作集

include/linux/dma-mapping.h:点击(此处)折叠或打开

  1. struct dma_map_ops {
  2.     void* (*alloc)(struct device *dev, size_t size,
  3.                 dma_addr_t *dma_handle, gfp_t gfp,
  4.                 struct dma_attrs *attrs);
  5.     void (*free)(struct device *dev, size_t size,
  6.              void *vaddr, dma_addr_t dma_handle,
  7.              struct dma_attrs *attrs);
  8.     int (*mmap)(struct device *, struct vm_area_struct *,
  9.              void *, dma_addr_t, size_t, struct dma_attrs *attrs);

  11.     int (*get_sgtable)(struct device *dev, struct sg_table *sgt, void *,
  12.              dma_addr_t, size_t, struct dma_attrs *attrs);

  14.     dma_addr_t (*map_page)(struct device *dev, struct page *page,
  15.              unsigned long offset, size_t size,
  16.              enum dma_data_direction dir,
  17.              struct dma_attrs *attrs);
  18.     void (*unmap_page)(struct device *dev, dma_addr_t dma_handle,
  19.              size_t size, enum dma_data_direction dir,
  20.              struct dma_attrs *attrs);
  21.     int (*map_sg)(struct device *dev, struct scatterlist *sg,
  22.          int nents, enum dma_data_direction dir,
  23.          struct dma_attrs *attrs);
  24.     void (*unmap_sg)(struct device *dev,
  25.              struct scatterlist *sg, int nents,
  26.              enum dma_data_direction dir,
  27.              struct dma_attrs *attrs);
  28.     void (*sync_single_for_cpu)(struct device *dev,
  29.                  dma_addr_t dma_handle, size_t size,
  30.                  enum dma_data_direction dir);
  31.     void (*sync_single_for_device)(struct device *dev,
  32.                  dma_addr_t dma_handle, size_t size,
  33.                  enum dma_data_direction dir);
  34.     void (*sync_sg_for_cpu)(struct device *dev,
  35.                 struct scatterlist *sg, int nents,
  36.                 enum dma_data_direction dir);
  37.     void (*sync_sg_for_device)(struct device *dev,
  38.                  struct scatterlist *sg, int nents,
  39.                  enum dma_data_direction dir);
  40.     int (*mapping_error)(struct device *dev, dma_addr_t dma_addr);
  41.     int (*dma_supported)(struct device *dev, u64 mask);
  42.     int (*set_dma_mask)(struct device *dev, u64 mask);
  43. #ifdef ARCH_HAS_DMA_GET_REQUIRED_MASK
  44.     u64 (*get_required_mask)(struct device *dev);
  45. #endif
  46.     int is_phys;
  47. }
来统一屏蔽实现的差异.
不同差异主要来来自cache的问题

Cache与dma同步问题，这里不深入讨论.

另外一个常用的函数是Dma_set_mask，  为了通知内核设备能够寻址的范围，很多时候设备能够寻址的范围有限。

Dma映射可以分为三类：

1.       一致性dma映射 dma_alloc_coherent （问题：驱动使用的buffer不是自身申请的，而是其他模块）

当驱动模块主动分配一个Dma缓冲区并且dma生存期和模块一样时

参数说明：

（1）这个函数的返回值是缓冲的一个内核虚拟地址, 它可被驱动使用

（2）第三个参数dma_handle：

其间相关的物理地址在 dma_handle 中返回

 

2.       流式dma映射  dma_map_single 
通常用于把内核一段buffer映射，返回物理地址.

如果驱动模块需要使用从别的模块传进来的虚拟地址空间作为dma缓冲区，保证地址的线性  cache一致性

一致性api接口：sync_single_for_cpu

3.分散/聚集映射（scatter/gather map）  Dma_map_sgs


有时候我们还需要

1. 回弹缓冲区 bounce  buffer：当cpu侧物理地址不适合设备的dma操作的时候

2.

DmA内存池：一般dma映射都是单个page的整数倍，如果驱动程序需要更小的一致性映射的dma缓冲区，可以使用。类似于slab机制，

Dma_pool_create

下面我们就那网卡驱动的例子说说dma的具体应用，参考linux kernel e1000网卡
drivers/net/ethernet/intel/e1000/*

Ring buffer

Dma不能为高端内存，一般为32，默认低端内存，由于设备能够访问的地址范围有限。

设备使用物理地址，而代码使用虚拟地址。

就看看如何发送数据包：e1000_main.c:
e1000_xmit_frame: 关于帧的发送流程这里不多说.

点击(此处)折叠或打开

  1. static netdev_tx_t e1000_xmit_frame(struct sk_buff *skb,
  2.                  struct net_device *netdev)
  3. {
  4.     struct e1000_adapter *adapter = netdev_priv(netdev);
  5.     struct e1000_hw *hw = &adapter->hw;
  6.     struct e1000_tx_ring *tx_ring;
  7.     unsigned int first, max_per_txd = E1000_MAX_DATA_PER_TXD;
  8.     unsigned int max_txd_pwr = E1000_MAX_TXD_PWR;
  9.     unsigned int tx_flags = 0;
  10.     unsigned int len = skb_headlen(skb);
  11.     unsigned int nr_frags;
  12.     unsigned int mss;
  13.     int count = 0;
  14.     int tso;
  15.     unsigned int f;

  17.     /* This goes back to the question of how to logically map a tx queue
  18.      * to a flow. Right now, performance is impacted slightly negatively
  19.      * if using multiple tx queues. If the stack breaks away from a
  20.      * single qdisc implementation, we can look at this again. */
  21.     tx_ring = adapter->tx_ring;

  23.     if (unlikely(skb->len <= 0)) {
  24.         dev_kfree_skb_any(skb);
  25.         return NETDEV_TX_OK;
  26.     }

  28.     /* On PCI/PCI-X HW, if packet size is less than ETH_ZLEN,
  29.      * packets may get corrupted during padding by HW.
  30.      * To WA this issue, pad all small packets manually.
  31.      */
  32.     if (skb->len < ETH_ZLEN) {
  33.         if (skb_pad(skb, ETH_ZLEN - skb->len))
  34.             return NETDEV_TX_OK;
  35.         skb->len = ETH_ZLEN;
  36.         skb_set_tail_pointer(skb, ETH_ZLEN);
  37.     }

  39.     mss = skb_shinfo(skb)->gso_size;
  40.     /* The controller does a simple calculation to
  41.      * make sure there is enough room in the FIFO before
  42.      * initiating the DMA for each buffer. The calc is:
  43.      * 4 = ceil(buffer len/mss). To make sure we don't
  44.      * overrun the FIFO, adjust the max buffer len if mss
  45.      * drops. */
  46.     if (mss) {
  47.         u8 hdr_len;
  48.         max_per_txd = min(mss << 2, max_per_txd);
  49.         max_txd_pwr = fls(max_per_txd) - 1;

  51.         hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb);
  52.         if (skb->data_len && hdr_len == len) {
  53.             switch (hw->mac_type) {
  54.                 unsigned int pull_size;
  55.             case e1000_82544:
  56.                 /* Make sure we have room to chop off 4 bytes,
  57.                  * and that the end alignment will work out to
  58.                  * this hardware's requirements
  59.                  * NOTE: this is a TSO only workaround
  60.                  * if end byte alignment not correct move us
  61.                  * into the next dword */
  62.                 if ((unsigned long)(skb_tail_pointer(skb) - 1) & 4)
  63.                     break;
  64.                 /* fall through */
  65.                 pull_size = min((unsigned int)4, skb->data_len);
  66.                 if (!__pskb_pull_tail(skb, pull_size)) {
  67.                     e_err(drv, "__pskb_pull_tail "
  68.                      "failed.\n");
  69.                     dev_kfree_skb_any(skb);
  70.                     return NETDEV_TX_OK;
  71.                 }
  72.                 len = skb_headlen(skb);
  73.                 break;
  74.             default:
  75.                 /* do nothing */
  76.                 break;
  77.             }
  78.         }
  79.     }

  81.     /* reserve a descriptor for the offload context */
  82.     if ((mss) || (skb->ip_summed == CHECKSUM_PARTIAL))
  83.         count++;
  84.     count++;

  86.     /* Controller Erratum workaround */
  87.     if (!skb->data_len && tx_ring->last_tx_tso && !skb_is_gso(skb))
  88.         count++;

  90.     count += TXD_USE_COUNT(len, max_txd_pwr);

  92.     if (adapter->pcix_82544)
  93.         count++;

  95.     /* work-around for errata 10 and it applies to all controllers
  96.      * in PCI-X mode, so add one more descriptor to the count
  97.      */
  98.     if (unlikely((hw->bus_type == e1000_bus_type_pcix) &&
  99.             (len > 2015)))
  100.         count++;

  102.     nr_frags = skb_shinfo(skb)->nr_frags;
  103.     for (f = 0; f < nr_frags; f++)
  104.         count += TXD_USE_COUNT(skb_frag_size(&skb_shinfo(skb)->frags[f]),
  105.                  max_txd_pwr);
  106.     if (adapter->pcix_82544)
  107.         count += nr_frags;

  109.     /* need: count + 2 desc gap to keep tail from touching
  110.      * head, otherwise try next time */
  111.     if (unlikely(e1000_maybe_stop_tx(netdev, tx_ring, count + 2)))
  112.         return NETDEV_TX_BUSY;

  114.     if (unlikely((hw->mac_type == e1000_82547) &&
  115.          (e1000_82547_fifo_workaround(adapter, skb)))) {
  116.         netif_stop_queue(netdev);
  117.         if (!test_bit(__E1000_DOWN, &adapter->flags))
  118.             schedule_delayed_work(&adapter->fifo_stall_task, 1);
  119.         return NETDEV_TX_BUSY;
  120.     }

  122.     if (vlan_tx_tag_present(skb)) {
  123.         tx_flags |= E1000_TX_FLAGS_VLAN;
  124.         tx_flags |= (vlan_tx_tag_get(skb) << E1000_TX_FLAGS_VLAN_SHIFT);
  125.     }

  127.     first = tx_ring->next_to_use;

  129.     tso = e1000_tso(adapter, tx_ring, skb);
  130.     if (tso < 0) {
  131.         dev_kfree_skb_any(skb);
  132.         return NETDEV_TX_OK;
  133.     }

  135.     if (likely(tso)) {
  136.         if (likely(hw->mac_type != e1000_82544))
  137.             tx_ring->last_tx_tso = true;
  138.         tx_flags |= E1000_TX_FLAGS_TSO;
  139.     } else if (likely(e1000_tx_csum(adapter, tx_ring, skb)))
  140.         tx_flags |= E1000_TX_FLAGS_CSUM;

  142.     if (likely(skb->protocol == htons(ETH_P_IP)))
  143.         tx_flags |= E1000_TX_FLAGS_IPV4;

  145.     if (unlikely(skb->no_fcs))
  146.         tx_flags |= E1000_TX_FLAGS_NO_FCS;

  148.     count = e1000_tx_map(adapter, tx_ring, skb, first, max_per_txd,
  149.      nr_frags, mss);

  151.     if (count) {
  152.         netdev_sent_queue(netdev, skb->len);
  153.         skb_tx_timestamp(skb);

  155.         e1000_tx_queue(adapter, tx_ring, tx_flags, count);
  156.         /* Make sure there is space in the ring for the next send. */
  157.         e1000_maybe_stop_tx(netdev, tx_ring, MAX_SKB_FRAGS + 2);

  159.     } else {
  160.         dev_kfree_skb_any(skb);
  161.         tx_ring->buffer_info[first].time_stamp = 0;
  162.         tx_ring->next_to_use = first;
  163.     }

  165.     return NETDEV_TX_OK;
  166. }
经过上次，邻居子系统后，数据帧已经到达驱动，数据放在skb指定的内存里. 
看代码
tx_ring = adapter->tx_ring;  //  获取发送的ring buffer
接着我们看关键代码：
count = e1000_tx_map(adapter, tx_ring, skb, first, max_per_txd,    nr_frags, mss);
它做了什么呢？

点击(此处)折叠或打开

  1. static int e1000_tx_map(struct e1000_adapter *adapter,
  2.             struct e1000_tx_ring *tx_ring,
  3.             struct sk_buff *skb, unsigned int first,
  4.             unsigned int max_per_txd, unsigned int nr_frags,
  5.             unsigned int mss)
  6. {
  7.     struct e1000_hw *hw = &adapter->hw;
  8.     struct pci_dev *pdev = adapter->pdev;
  9.     struct e1000_buffer *buffer_info;
  10.     unsigned int len = skb_headlen(skb);
  11.     unsigned int offset = 0, size, count = 0, i;
  12.     unsigned int f, bytecount, segs;

  14.     i = tx_ring->next_to_use;

  16.     while (len) {
  17.         buffer_info = &tx_ring->buffer_info[i];
  18.         size = min(len, max_per_txd);
  19.         /* Workaround for Controller erratum --
  20.          * descriptor for non-tso packet in a linear SKB that follows a
  21.          * tso gets written back prematurely before the data is fully
  22.          * DMA'd to the controller */
  23.         if (!skb->data_len && tx_ring->last_tx_tso &&
  24.          !skb_is_gso(skb)) {
  25.             tx_ring->last_tx_tso = false;
  26.             size -= 4;
  27.         }

  29.         /* Workaround for premature desc write-backs
  30.          * in TSO mode. Append 4-byte sentinel desc */
  31.         if (unlikely(mss && !nr_frags && size == len && size > 8))
  32.             size -= 4;
  33.         /* work-around for errata 10 and it applies
  34.          * to all controllers in PCI-X mode
  35.          * The fix is to make sure that the first descriptor of a
  36.          * packet is smaller than 2048 - 16 - 16 (or 2016) bytes
  37.          */
  38.         if (unlikely((hw->bus_type == e1000_bus_type_pcix) &&
  39.          (size > 2015) && count == 0))
  40.          size = 2015;

  42.         /* Workaround for potential 82544 hang in PCI-X. Avoid
  43.          * terminating buffers within evenly-aligned dwords. */
  44.         if (unlikely(adapter->pcix_82544 &&
  45.          !((unsigned long)(skb->data + offset + size - 1) & 4) &&
  46.          size > 4))
  47.             size -= 4;

  49.         buffer_info->length = size;
  50.         /* set time_stamp *before* dma to help avoid a possible race */
  51.         buffer_info->time_stamp = jiffies;
  52.         buffer_info->mapped_as_page = false;
  53.         buffer_info->dma = dma_map_single(&pdev->dev,
  54.                          skb->data + offset,
  55.                          size,    DMA_TO_DEVICE);
  56.         if (dma_mapping_error(&pdev->dev, buffer_info->dma))
  57.             goto dma_error;
  58.         buffer_info->next_to_watch = i;

  60.         len -= size;
  61.         offset += size;
  62.         count++;
  63.         if (len) {
  64.             i++;
  65.             if (unlikely(i == tx_ring->count))
  66.                 i = 0;
  67.         }
  68.     }

  70.     for (f = 0; f < nr_frags; f++) {
  71.         const struct skb_frag_struct *frag;

  73.         frag = &skb_shinfo(skb)->frags[f];
  74.         len = skb_frag_size(frag);
  75.         offset = 0;

  77.         while (len) {
  78.             unsigned long bufend;
  79.             i++;
  80.             if (unlikely(i == tx_ring->count))
  81.                 i = 0;

  83.             buffer_info = &tx_ring->buffer_info[i];
  84.             size = min(len, max_per_txd);
  85.             /* Workaround for premature desc write-backs
  86.              * in TSO mode. Append 4-byte sentinel desc */
  87.             if (unlikely(mss && f == (nr_frags-1) && size == len && size > 8))
  88.                 size -= 4;
  89.             /* Workaround for potential 82544 hang in PCI-X.
  90.              * Avoid terminating buffers within evenly-aligned
  91.              * dwords. */
  92.             bufend = (unsigned long)
  93.                 page_to_phys(skb_frag_page(frag));
  94.             bufend += offset + size - 1;
  95.             if (unlikely(adapter->pcix_82544 &&
  96.                  !(bufend & 4) &&
  97.                  size > 4))
  98.                 size -= 4;

  100.             buffer_info->length = size;
  101.             buffer_info->time_stamp = jiffies;
  102.             buffer_info->mapped_as_page = true;
  103.             buffer_info->dma = skb_frag_dma_map(&pdev->dev, frag,
  104.                         offset, size, DMA_TO_DEVICE);
  105.             if (dma_mapping_error(&pdev->dev, buffer_info->dma))
  106.                 goto dma_error;
  107.             buffer_info->next_to_watch = i;

  109.             len -= size;
  110.             offset += size;
  111.             count++;
  112.         }
  113.     }

  115.     segs = skb_shinfo(skb)->gso_segs ?: 1;
  116.     /* multiply data chunks by size of headers */
  117.     bytecount = ((segs - 1) * skb_headlen(skb)) + skb->len;

  119.     tx_ring->buffer_info[i].skb = skb;
  120.     tx_ring->buffer_info[i].segs = segs;
  121.     tx_ring->buffer_info[i].bytecount = bytecount;
  122.     tx_ring->buffer_info[first].next_to_watch = i;

  124.     return count;

  126. dma_error:
  127.     dev_err(&pdev->dev, "TX DMA map failed\n");
  128.     buffer_info->dma = 0;
  129.     if (count)
  130.         count--;

  132.     while (count--) {
  133.         if (i==0)
  134.             i += tx_ring->count;
  135.         i--;
  136.         buffer_info = &tx_ring->buffer_info[i];
  137.         e1000_unmap_and_free_tx_resource(adapter, buffer_info);
  138.     }

  140.     return 0;
  141. }
默认数据报文没有分片或者碎片什么的。
那么进入第一个while(len)
获取buffer_info = &tx_ring->buffer_info[i];
然后：调用dma_map_single进行流式映射. 即把skb->data(虚拟地址) 和buffer_info->dma（物理地址）对应起来.操作两个地址等于操作同一片区域。

点击(此处)折叠或打开

  1. buffer_info->length = size;
  2.         /* set time_stamp *before* dma to help avoid a possible race */
  3.         buffer_info->time_stamp = jiffies;
  4.         buffer_info->mapped_as_page = false;
  5.         buffer_info->dma = dma_map_single(&pdev->dev,
  6.                          skb->data + offset,
  7.                          size,    DMA_TO_DEVICE);
回到主发送函数：

点击(此处)折叠或打开

  1. if (count) {
  2.         netdev_sent_queue(netdev, skb->len);
  3.         skb_tx_timestamp(skb);

  5.         e1000_tx_queue(adapter, tx_ring, tx_flags, count);
  6.         /* Make sure there is space in the ring for the next send. */
  7.         e1000_maybe_stop_tx(netdev, tx_ring, MAX_SKB_FRAGS + 2);

  9.     }
调用e1000_tx_queue把数据发送出去：

点击(此处)折叠或打开

  1. static void e1000_tx_queue(struct e1000_adapter *adapter,
  2.              struct e1000_tx_ring *tx_ring, int tx_flags,
  3.              int count)
  4. {
  5.     struct e1000_hw *hw = &adapter->hw;
  6.     struct e1000_tx_desc *tx_desc = NULL;
  7.     struct e1000_buffer *buffer_info;
  8.     u32 txd_upper = 0, txd_lower = E1000_TXD_CMD_IFCS;
  9.     unsigned int i;
  10.     
  11.     ...

  13.     i = tx_ring->next_to_use;

  15.     while (count--) {
  16.         buffer_info = &tx_ring->buffer_info[i];
  17.         tx_desc = E1000_TX_DESC(*tx_ring, i);
  18.         tx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
  19.         tx_desc->lower.data =
  20.             cpu_to_le32(txd_lower | buffer_info->length);
  21.         tx_desc->upper.data = cpu_to_le32(txd_upper);
  22.         if (unlikely(++i == tx_ring->count)) i = 0;
  23.     }

  25.     tx_desc->lower.data |= cpu_to_le32(adapter->txd_cmd);

  27.     /* txd_cmd re-enables FCS, so we'll re-disable it here as desired. */
  28.     if (unlikely(tx_flags & E1000_TX_FLAGS_NO_FCS))
  29.         tx_desc->lower.data &= ~(cpu_to_le32(E1000_TXD_CMD_IFCS));

  31.     /* Force memory writes to complete before letting h/w
  32.      * know there are new descriptors to fetch. (Only
  33.      * applicable for weak-ordered memory model archs,
  34.      * such as IA-64). */
  35.     wmb();

  37.     tx_ring->next_to_use = i;
  38.     writel(i, hw->hw_addr + tx_ring->tdt);
  39.     /* we need this if more than one processor can write to our tail
  40.      * at a time, it syncronizes IO on IA64/Altix systems */
  41.     mmiowb();
  42. }
我们看到它把刚才dma_map_singe里的映射赋值了：
tx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
说明发送的时候是根据发送描述符来发送的。
然后操作寄存器：
writel(i, hw->hw_addr + tx_ring->tdt);
那么网卡就会自动读取tx desc 然后把数据发送出去。
总结下流程：
1. linux os会调用网卡的start_xmit（）函数。在e1000里，对应的函数是 e1000_xmit_frame,
2.   e1000_xmit_frame又会调用e1000_tx_queue(adapter, tx_ring, tx_flags, count)。
这里的tx_queue指的是发送Descriptor的queue。
3. e1000_tx_queue 在检查了一些参数后，最终调用 writel(i, hw->hw_addr + tx_ring->tdt)。
这里的tx_ring->tdt中的tdt全写为 tx_descriptor_tail。从网卡的开发手册中可以查到，如果写了descriptor tail，那么网卡就会自动读取 descriptor,然后把包发送出去。
descroptor的主要内容是addr pointer和length。前者是要发送的包的起始物理地址。后者是包的长度。有了这些，硬件就可以通过dma来读取包并发出去了。其他网卡也基本会用descriptor的结构。

虽然流程明白了，但是还有几个点，
1. tx_ring在哪初始化？
2. 网卡到底是如何操作映射的dma地址的，把数据发送出去的？

tx ring 在e1000_open 的时候：
调用：

点击(此处)折叠或打开

  1. /**
  2.  * e1000_setup_all_tx_resources - wrapper to allocate Tx resources
  3.  *                  (Descriptors) for all queues
  4.  * @adapter: board private structure
  5.  *
  6.  * Return 0 on success, negative on failure
  7.  **/

  9. int e1000_setup_all_tx_resources(struct e1000_adapter *adapter)
  10. {
  11.     int i, err = 0;

  13.     for (i = 0; i < adapter->num_tx_queues; i++) {
  14.         err = e1000_setup_tx_resources(adapter, &adapter->tx_ring[i]);
  15.         if (err) {
  16.             e_err(probe, "Allocation for Tx Queue %u failed\n", i);
  17.             for (i-- ; i >= 0; i--)
  18.                 e1000_free_tx_resources(adapter,
  19.                             &adapter->tx_ring[i]);
  20.             break;
  21.         }
  22.     }

  24.     return err;
  25. }

点击(此处)折叠或打开

  1. /**
  2.  * e1000_setup_tx_resources - allocate Tx resources (Descriptors)
  3.  * @adapter: board private structure
  4.  * @txdr: tx descriptor ring (for a specific queue) to setup
  5.  *
  6.  * Return 0 on success, negative on failure
  7.  **/

  9. static int e1000_setup_tx_resources(struct e1000_adapter *adapter,
  10.                  struct e1000_tx_ring *txdr)
  11. {
  12.     struct pci_dev *pdev = adapter->pdev;
  13.     int size;

  15.     size = sizeof(struct e1000_buffer) * txdr->count;
  16.     txdr->buffer_info = vzalloc(size);
  17.     if (!txdr->buffer_info) {
  18.         e_err(probe, "Unable to allocate memory for the Tx descriptor "
  19.          "ring\n");
  20.         return -ENOMEM;
  21.     }

  23.     /* round up to nearest 4K */

  25.     txdr->size = txdr->count * sizeof(struct e1000_tx_desc);
  26.     txdr->size = ALIGN(txdr->size, 4096);

  28.     txdr->desc = dma_alloc_coherent(&pdev->dev, txdr->size, &txdr->dma,
  29.                     GFP_KERNEL);
  30.     if (!txdr->desc) {
  31. setup_tx_desc_die:
  32.         vfree(txdr->buffer_info);
  33.         e_err(probe, "Unable to allocate memory for the Tx descriptor "
  34.          "ring\n");
  35.         return -ENOMEM;
  36.     }

  38.     /* Fix for errata 23, can't cross 64kB boundary */
  39.     if (!e1000_check_64k_bound(adapter, txdr->desc, txdr->size)) {
  40.         void *olddesc = txdr->desc;
  41.         dma_addr_t olddma = txdr->dma;
  42.         e_err(tx_err, "txdr align check failed: %u bytes at %p\n",
  43.          txdr->size, txdr->desc);
  44.         /* Try again, without freeing the previous */
  45.         txdr->desc = dma_alloc_coherent(&pdev->dev, txdr->size,
  46.                         &txdr->dma, GFP_KERNEL);
  47.         /* Failed allocation, critical failure */
  48.         if (!txdr->desc) {
  49.             dma_free_coherent(&pdev->dev, txdr->size, olddesc,
  50.                      olddma);
  51.             goto setup_tx_desc_die;
  52.         }

  54.         if (!e1000_check_64k_bound(adapter, txdr->desc, txdr->size)) {
  55.             /* give up */
  56.             dma_free_coherent(&pdev->dev, txdr->size, txdr->desc,
  57.                      txdr->dma);
  58.             dma_free_coherent(&pdev->dev, txdr->size, olddesc,
  59.                      olddma);
  60.             e_err(probe, "Unable to allocate aligned memory "
  61.              "for the transmit descriptor ring\n");
  62.             vfree(txdr->buffer_info);
  63.             return -ENOMEM;
  64.         } else {
  65.             /* Free old allocation, new allocation was successful */
  66.             dma_free_coherent(&pdev->dev, txdr->size, olddesc,
  67.                      olddma);
  68.         }
  69.     }
  70.     memset(txdr->desc, 0, txdr->size);

  72.     txdr->next_to_use = 0;
  73.     txdr->next_to_clean = 0;

  75.     return 0;
  76. }
我们看：它建立了一致性dma映射.
  1.         txdr->desc = dma_alloc_coherent(&pdev->dev, txdr->size,
  2.                         &txdr->dma, GFP_KERNEL);
desc是结构指针：它的结构跟网卡寄存器结构有关，e1000_hw.h

点击(此处)折叠或打开

  1. /* Transmit Descriptor */
  2. struct e1000_tx_desc {
  3.     __le64 buffer_addr;    /* Address of the descriptor's data buffer */
  4.     union {
  5.         __le32 data;
  6.         struct {
  7.             __le16 length;    /* Data buffer length */
  8.             u8 cso;    /* Checksum offset */
  9.             u8 cmd;    /* Descriptor control */
  10.         } flags;
  11.     } lower;
  12.     union {
  13.         __le32 data;
  14.         struct {
  15.             u8 status;    /* Descriptor status */
  16.             u8 css;    /* Checksum start */
  17.             __le16 special;
  18.         } fields;
  19.     } upper;
  20. }

我们稍微屡一下，
1. skb->data  --- ring->buffer_info->dma
2.ring->dma  ---  ring->desc
3. ring->desc->buffer_addr ---ring->buffer_info->dma
那么网卡又是如何和dma地址关联的呢?

点击(此处)折叠或打开

  1. /**
  2.  * e1000_configure_tx - Configure 8254x Transmit Unit after Reset
  3.  * @adapter: board private structure
  4.  *
  5.  * Configure the Tx unit of the MAC after a reset.
  6.  **/

  8. static void e1000_configure_tx(struct e1000_adapter *adapter)
  9. {
  10.     u64 tdba;
  11.     struct e1000_hw *hw = &adapter->hw;
  12.     u32 tdlen, tctl, tipg;
  13.     u32 ipgr1, ipgr2;

  15.     /* Setup the HW Tx Head and Tail descriptor pointers */

  17.     switch (adapter->num_tx_queues) {
  18.     case 1:
  19.     default:
  20.         tdba = adapter->tx_ring[0].dma;
  21.         tdlen = adapter->tx_ring[0].count *
  22.             sizeof(struct e1000_tx_desc);
  23.         ew32(TDLEN, tdlen);
  24.         ew32(TDBAH, (tdba >> 32));
  25.         ew32(TDBAL, (tdba & 0x00000000ffffffffULL));
  26.         ew32(TDT, 0);
  27.         ew32(TDH, 0);
  28.         adapter->tx_ring[0].tdh = ((hw->mac_type >= e1000_82543) ? E1000_TDH : E1000_82542_TDH);
  29.         adapter->tx_ring[0].tdt = ((hw->mac_type >= e1000_82543) ? E1000_TDT : E1000_82542_TDT);
  30.         break;
  31.     }
很明显它把dma地址写入了网卡dma寄存器。所以dma还需要网卡硬件的支持才行.

当然e1000这个网卡驱动还是相当的复杂,不过它把一致性映射和流式映射都用上了。











阅读(1309) | 评论(0) | 转发(0) |
0

上一篇：PPP协议解析

下一篇：没有了

给主人留下些什么吧！~~
关于我们 | 关于IT168 | 联系方式 | 广告合作 | 法律声明 | 免费注册

Copyright 2001-2010 ChinaUnix.net All Rights Reserved 北京皓辰网域网络信息技术有限公司. 版权所有

感谢所有关心和支持过ChinaUnix的朋友们

16024965号-6