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分类: LINUX

2013-08-21 16:03:32

上一篇文章讲述了I2C子系统体系结构,总线驱动、设备驱动的知识点,下面就S3C2440 I2C总线驱动的实现详细讲解,它的源码位于drivers/i2c/busses/i2c-s3c2410.c

一、I2C平台设备资源

      IIC驱动中使用的平台设备与前面看门狗、rtc等方式原理相同,但定义路径有所不同,并且设置了额外一些参数。mach_smdk2440.c文件中smdk2440_machine_init函数初始化了平台设备,还对s3c_device_i2c0平台设备进行额外的设置(s3c_i2c0_set_platdata),s3c_device_i2c0平台设备定义在arch/arm/plat-s3c/dev-i2c0.c。

static void __init smdk2440_machine_init(void)

{

       s3c24xx_fb_set_platdata(&smdk2440_fb_info);

       s3c_i2c0_set_platdata(NULL);


       platform_add_devices(smdk2440_devices, ARRAY_SIZE(smdk2440_devices));

       smdk_machine_init();

}

下面是s3c_device_i2c0平台设备相关部分,s3c_i2c0_set_platdata初始化s3c_device_i2c0.dev.platform_data为default_i2c_data0

static struct resource s3c_i2c_resource[] = {

       [0] = {

              .start = S3C_PA_IIC,

              .end   = S3C_PA_IIC + SZ_4K - 1,

              .flags = IORESOURCE_MEM,

       },

       [1] = {

              .start = IRQ_IIC,

              .end   = IRQ_IIC,

              .flags = IORESOURCE_IRQ,

       },

};


struct platform_device s3c_device_i2c0 = {

       .name               = "s3c2410-i2c",

#ifdef CONFIG_S3C_DEV_I2C1

       .id             = 0,

#else

       .id             = -1,

#endif

       .num_resources       = ARRAY_SIZE(s3c_i2c_resource),

       .resource   = s3c_i2c_resource,

};


static struct s3c2410_platform_i2c default_i2c_data0 __initdata = {

       .flags             = 0,

       .slave_addr     = 0x10,

       .frequency      = 100*1000,

       .sda_delay      = 100,

};


void __init s3c_i2c0_set_platdata(struct s3c2410_platform_i2c *pd)

{

       struct s3c2410_platform_i2c *npd;


       if (!pd)

              pd = &default_i2c_data0;


       npd = kmemdup(pd, sizeof(struct s3c2410_platform_i2c), GFP_KERNEL);

       if (!npd)

              printk(KERN_ERR "%s: no memory for platform data\n", __func__);

       else if (!npd->cfg_gpio)

              npd->cfg_gpio = s3c_i2c0_cfg_gpio;

       s3c_device_i2c0.dev.platform_data = npd;

}

void s3c_i2c0_cfg_gpio(struct platform_device *dev)

{         //  位于arch/arm/plat-s3c24xx/setup-i2c.c

       s3c2410_gpio_cfgpin(S3C2410_GPE(15), S3C2410_GPE15_IICSDA);

       s3c2410_gpio_cfgpin(S3C2410_GPE(14), S3C2410_GPE14_IICSCL);

}

二、总线驱动实现

1.I2C适配器驱动加载卸载

  1. staticint s3c24xx_i2c_calcdivisor(unsignedlong clkin, unsignedint wanted,
  2.                    unsignedint *div1, unsignedint *divs)
  3.     unsignedint calc_divs = clkin / wanted;
  4.     unsignedint calc_div1;
  5.  
  6.     if (calc_divs > (16*16))
  7.         calc_div1 = 512;
  8.     else
  9.         calc_div1 = 16;
  10.  
  11.     calc_divs += calc_div1-1;
  12.     calc_divs /= calc_div1;
  13.  
  14.     if (calc_divs == 0)
  15.         calc_divs = 1;
  16.     if (calc_divs > 17)
  17.         calc_divs = 17;
  18.  
  19.     *divs = calc_divs;
  20.     *div1 = calc_div1;
  21.  
  22.     return clkin / (calc_divs * calc_div1);
  23.  
  24. /* s3c24xx_i2c_clockrate
  25. *
  26. * work out a divisor for the user requested frequency setting,
  27. * either by the requested frequency, or scanning the acceptable
  28. * range of frequencies until something is found
  29. */
  30.  
  31. staticint s3c24xx_i2c_clockrate(struct s3c24xx_i2c *i2c, unsigned int *got)
  32.     struct s3c2410_platform_i2c *pdata = i2c->dev->platform_data;
  33.     unsignedlong clkin = clk_get_rate(i2c->clk);  /* PCLK */
  34.     unsignedint divs, div1;
  35.     unsignedlong target_frequency;   /* 需要设置速率默认100khz */
  36.     u32 iiccon;
  37.     int freq;
  38.  
  39.     i2c->clkrate = clkin;
  40.     clkin /= 1000;     /* clkin now in KHz */
  41.  
  42.     dev_dbg(i2c->dev,"pdata desired frequency %lu\n", pdata->frequency);
  43.  
  44.     target_frequency = pdata->frequency ? pdata->frequency : 100000;
  45.  
  46.     target_frequency /= 1000;/* Target frequency now in KHz */
  47.  
  48.     freq = s3c24xx_i2c_calcdivisor(clkin, target_frequency, &div1, &divs); /* 计算出IICCON中Tx clock source selection和Transmit clock value */
  49.  
  50.     if (freq > target_frequency) {
  51.         dev_err(i2c->dev,
  52.            "Unable to achieve desired frequency %luKHz."   \
  53.            " Lowest achievable %dKHz\n", target_frequency, freq);
  54.        return -EINVAL;
  55.     }
  56.  
  57.     *got = freq;
  58.  
  59.     iiccon = readl(i2c->regs + S3C2410_IICCON);
  60.     iiccon &= ~(S3C2410_IICCON_SCALEMASK | S3C2410_IICCON_TXDIV_512);
  61.     iiccon |= (divs-1);
  62.  
  63.     if (div1 == 512)
  64.         iiccon |= S3C2410_IICCON_TXDIV_512;
  65.  
  66.     writel(iiccon, i2c->regs + S3C2410_IICCON);
  67.  
  68.     if (s3c24xx_i2c_is2440(i2c)) {   /* 2440设置IICLC */
  69.         unsignedlong sda_delay;
  70.  
  71.        if (pdata->sda_delay) {
  72.             sda_delay = (freq / 1000) * pdata->sda_delay;
  73.             sda_delay /= 1000000;
  74.             sda_delay = DIV_ROUND_UP(sda_delay, 5);
  75.            if (sda_delay > 3)
  76.                 sda_delay = 3;
  77.             sda_delay |= S3C2410_IICLC_FILTER_ON;
  78.         }else
  79.             sda_delay = 0;
  80.  
  81.         dev_dbg(i2c->dev,"IICLC=%08lx\n", sda_delay);
  82.         writel(sda_delay, i2c->regs + S3C2440_IICLC);
  83.     }
  84.  
  85.     return 0;
  86.  
  87. #ifdef CONFIG_CPU_FREQ
  88.  
  89. #define freq_to_i2c(_n) container_of(_n, struct s3c24xx_i2c, freq_transition)
  90.  
  91. staticint s3c24xx_i2c_cpufreq_transition(struct notifier_block *nb, 
  92.                       unsignedlong val,void *data)
  93.     struct s3c24xx_i2c *i2c = freq_to_i2c(nb);
  94.     unsignedlong flags;
  95.     unsignedint got;
  96.     int delta_f;
  97.     int ret;
  98.  
  99.     delta_f = clk_get_rate(i2c->clk) - i2c->clkrate;
  100.  
  101.     /* if we're post-change and the input clock has slowed down
  102.      * or at pre-change and the clock is about to speed up, then
  103.      * adjust our clock rate. <0 is slow, >0 speedup.
  104.      */
  105.  
  106.     if ((val == CPUFREQ_POSTCHANGE && delta_f < 0) ||
  107.         (val == CPUFREQ_PRECHANGE && delta_f > 0)) {
  108.         spin_lock_irqsave(&i2c->lock, flags);
  109.         ret = s3c24xx_i2c_clockrate(i2c, &got);
  110.         spin_unlock_irqrestore(&i2c->lock, flags);
  111.  
  112.        if (ret < 0)
  113.             dev_err(i2c->dev,"cannot find frequency\n");
  114.        else
  115.             dev_info(i2c->dev,"setting freq %d\n", got);
  116.     }
  117.  
  118.     return 0;
  119.  
  120. staticinlineint s3c24xx_i2c_register_cpufreq(struct s3c24xx_i2c *i2c) 
  121.     i2c->freq_transition.notifier_call = s3c24xx_i2c_cpufreq_transition;
  122.  
  123.     return cpufreq_register_notifier(&i2c->freq_transition,
  124.                      CPUFREQ_TRANSITION_NOTIFIER);
  125.  
  126. staticinlinevoid s3c24xx_i2c_deregister_cpufreq(struct s3c24xx_i2c *i2c) 
  127.     cpufreq_unregister_notifier(&i2c->freq_transition,
  128.                     CPUFREQ_TRANSITION_NOTIFIER);
  129.  
  130. #else
  131. staticinlineint s3c24xx_i2c_register_cpufreq(struct s3c24xx_i2c *i2c) 
  132.     return 0;
  133.  
  134. staticinlinevoid s3c24xx_i2c_deregister_cpufreq(struct s3c24xx_i2c *i2c) 
  135. #endif
  136.  
  137. /* s3c24xx_i2c_init
  138. *
  139. * initialise the controller, set the IO lines and frequency
  140. */
  141.  
  142. staticint s3c24xx_i2c_init(struct s3c24xx_i2c *i2c) 
  143.     unsignedlong iicon = S3C2410_IICCON_IRQEN | S3C2410_IICCON_ACKEN;
  144.     struct s3c2410_platform_i2c *pdata;
  145.     unsignedint freq;
  146.  
  147.     /* get the plafrom data */
  148.  
  149.     pdata = i2c->dev->platform_data;   /* 获取platform_data */
  150.  
  151.     /* inititalise the gpio */
  152.  
  153.     if (pdata->cfg_gpio)
  154.         pdata->cfg_gpio(to_platform_device(i2c->dev));
  155.  
  156.     /* write slave address */
  157.  
  158.     writeb(pdata->slave_addr, i2c->regs + S3C2410_IICADD);
  159.  
  160.     dev_info(i2c->dev,"slave address 0x%02x\n", pdata->slave_addr);
  161.  
  162.     writel(iicon, i2c->regs + S3C2410_IICCON);
  163.  
  164.     /* we need to work out the divisors for the clock... */
  165.  
  166.     if (s3c24xx_i2c_clockrate(i2c, &freq) != 0) {        /* 设置i2c速率 */
  167.         writel(0, i2c->regs + S3C2410_IICCON);     
  168.         dev_err(i2c->dev,"cannot meet bus frequency required\n");
  169.        return -EINVAL;
  170.     }
  171.  
  172.     /* todo - check that the i2c lines aren't being dragged anywhere */
  173.  
  174.     dev_info(i2c->dev,"bus frequency set to %d KHz\n", freq);
  175.     dev_dbg(i2c->dev,"S3C2410_IICCON=0x%02lx\n", iicon);
  176.  
  177.     return 0;
  178.  
  179. /* s3c24xx_i2c_probe
  180. *
  181. * called by the bus driver when a suitable device is found
  182. */
  183.  
  184. staticint s3c24xx_i2c_probe(struct platform_device *pdev) 
  185.     struct s3c24xx_i2c *i2c;
  186.     struct s3c2410_platform_i2c *pdata;
  187.     struct resource *res;
  188.     int ret;
  189.  
  190.     pdata = pdev->dev.platform_data;   /* 在平台设备资源中初始化了platform_data,关于platform_data参考前一节 */
  191.     if (!pdata) {
  192.         dev_err(&pdev->dev,"no platform data\n");
  193.        return -EINVAL;
  194.     }
  195.  
  196.     i2c = kzalloc(sizeof(struct s3c24xx_i2c), GFP_KERNEL); /* s3c24xx_i2c分配空间 */
  197.     if (!i2c) {
  198.         dev_err(&pdev->dev,"no memory for state\n");
  199.        return -ENOMEM;
  200.     }
  201.  
  202.     strlcpy(i2c->adap.name,"s3c2410-i2c",sizeof(i2c->adap.name));  /* s3c24xx_i2c初始化 */
  203.     i2c->adap.owner   = THIS_MODULE;
  204.     i2c->adap.algo    = &s3c24xx_i2c_algorithm;  /* 通信方法,下一节重点介绍 */
  205.     i2c->adap.retries = 2;
  206.     i2c->adap.class   = I2C_CLASS_HWMON | I2C_CLASS_SPD; 
  207.     i2c->tx_setup     = 50;
  208.  
  209.     spin_lock_init(&i2c->lock);
  210.     init_waitqueue_head(&i2c->wait);
  211.  
  212.     /* find the clock and enable it */
  213.  
  214.     i2c->dev = &pdev->dev;
  215.     i2c->clk = clk_get(&pdev->dev,"i2c");  /* 时钟 */
  216.     if (IS_ERR(i2c->clk)) {
  217.         dev_err(&pdev->dev,"cannot get clock\n");
  218.         ret = -ENOENT;
  219.        goto err_noclk;
  220.     }
  221.  
  222.     dev_dbg(&pdev->dev,"clock source %p\n", i2c->clk);
  223.  
  224.     clk_enable(i2c->clk);
  225.  
  226.     /* map the registers */
  227.  
  228.     res = platform_get_resource(pdev, IORESOURCE_MEM, 0);   /* 寄存器映射 */
  229.     if (res == NULL) {
  230.         dev_err(&pdev->dev,"cannot find IO resource\n");
  231.         ret = -ENOENT;
  232.        goto err_clk;
  233.     }
  234.  
  235.     i2c->ioarea = request_mem_region(res->start, resource_size(res),
  236.                      pdev->name);
  237.  
  238.     if (i2c->ioarea == NULL) {
  239.         dev_err(&pdev->dev,"cannot request IO\n");
  240.         ret = -ENXIO;
  241.        goto err_clk;
  242.     }
  243.  
  244.     i2c->regs = ioremap(res->start, resource_size(res));
  245.  
  246.     if (i2c->regs == NULL) {
  247.         dev_err(&pdev->dev,"cannot map IO\n");
  248.         ret = -ENXIO;
  249.        goto err_ioarea;
  250.     }
  251.  
  252.     dev_dbg(&pdev->dev,"registers %p (%p, %p)\n",
  253.         i2c->regs, i2c->ioarea, res);
  254.  
  255.     /* setup info block for the i2c core */
  256.  
  257.     i2c->adap.algo_data = i2c;
  258.     i2c->adap.dev.parent = &pdev->dev;
  259.  
  260.     /* initialise the i2c controller */
  261.  
  262.     ret = s3c24xx_i2c_init(i2c);    /* 初始化 */
  263.     if (ret != 0)
  264.        goto err_iomap;
  265.  
  266.     /* find the IRQ for this unit (note, this relies on the init call to
  267.      * ensure no current IRQs pending
  268.      */
  269.  
  270.     i2c->irq = ret = platform_get_irq(pdev, 0);    /* 中断申请 */
  271.     if (ret <= 0) {
  272.         dev_err(&pdev->dev,"cannot find IRQ\n");
  273.        goto err_iomap;
  274.     }
  275.  
  276.     ret = request_irq(i2c->irq, s3c24xx_i2c_irq, IRQF_DISABLED,
  277.               dev_name(&pdev->dev), i2c);
  278.  
  279.     if (ret != 0) {
  280.         dev_err(&pdev->dev,"cannot claim IRQ %d\n", i2c->irq);
  281.        goto err_iomap;
  282.     }
  283.  
  284.     ret = s3c24xx_i2c_register_cpufreq(i2c); /* 关于cpufreq没明白,有关cpufreq可以暂时不管 */
  285.     if (ret < 0) {
  286.         dev_err(&pdev->dev,"failed to register cpufreq notifier\n");
  287.        goto err_irq;
  288.     }
  289.  
  290.     /* Note, previous versions of the driver used i2c_add_adapter()
  291.      * to add the bus at any number. We now pass the bus number via
  292.      * the platform data, so if unset it will now default to always
  293.      * being bus 0.
  294.      */
  295.  
  296.     i2c->adap.nr = pdata->bus_num;          
  297.     /*调用了i2c-core中的i2c_add_adapter函数来添加一个i2c控制器,i2c_add_numbered_adapter和i2c_add_adapter的
  298.      区别在于前者用来添加一个在CPU内部集成的适配器,而后者用来添加一个CPU外部的适配器。显然这里应该用前者 */
  299.     ret = i2c_add_numbered_adapter(&i2c->adap);
  300.     if (ret < 0) {
  301.         dev_err(&pdev->dev,"failed to add bus to i2c core\n");
  302.        goto err_cpufreq;
  303.     }
  304.  
  305.     platform_set_drvdata(pdev, i2c);
  306.  
  307.     dev_info(&pdev->dev,"%s: S3C I2C adapter\n", dev_name(&i2c->adap.dev));
  308.     return 0;
  309.  
  310. err_cpufreq:
  311.     s3c24xx_i2c_deregister_cpufreq(i2c);
  312.  
  313. err_irq:
  314.     free_irq(i2c->irq, i2c);
  315.  
  316. err_iomap:
  317.     iounmap(i2c->regs);
  318.  
  319. err_ioarea:
  320.     release_resource(i2c->ioarea);
  321.     kfree(i2c->ioarea);
  322.  
  323. err_clk:
  324.     clk_disable(i2c->clk);
  325.     clk_put(i2c->clk);
  326.  
  327. err_noclk:
  328.     kfree(i2c);
  329.     return ret;
  330.  
  331. /* s3c24xx_i2c_remove
  332. *
  333. * called when device is removed from the bus
  334. */
  335.  
  336. staticint s3c24xx_i2c_remove(struct platform_device *pdev) 
  337.     struct s3c24xx_i2c *i2c = platform_get_drvdata(pdev);
  338.  
  339.     s3c24xx_i2c_deregister_cpufreq(i2c);
  340.  
  341.     i2c_del_adapter(&i2c->adap);    /* 删除adapter*/
  342.     free_irq(i2c->irq, i2c);
  343.  
  344.     clk_disable(i2c->clk);
  345.     clk_put(i2c->clk);
  346.  
  347.     iounmap(i2c->regs);
  348.  
  349.     release_resource(i2c->ioarea);
  350.     kfree(i2c->ioarea);
  351.     kfree(i2c);
  352.  
  353.     return 0;
  354.  
  355. #ifdef CONFIG_PM
  356. staticint s3c24xx_i2c_suspend_noirq(struct device *dev) 
  357.     struct platform_device *pdev = to_platform_device(dev);
  358.     struct s3c24xx_i2c *i2c = platform_get_drvdata(pdev);
  359.  
  360.     i2c->suspended = 1;
  361.  
  362.     return 0;
  363.  
  364. staticint s3c24xx_i2c_resume(struct device *dev) 
  365.     struct platform_device *pdev = to_platform_device(dev);
  366.     struct s3c24xx_i2c *i2c = platform_get_drvdata(pdev);
  367.  
  368.     i2c->suspended = 0;
  369.     s3c24xx_i2c_init(i2c);
  370.  
  371.     return 0;
  372.  
  373. staticstruct dev_pm_ops s3c24xx_i2c_dev_pm_ops = {
  374.     .suspend_noirq = s3c24xx_i2c_suspend_noirq,
  375.     .resume = s3c24xx_i2c_resume,
  376. }; 
  377.  
  378. #define S3C24XX_DEV_PM_OPS (&s3c24xx_i2c_dev_pm_ops)
  379. #else
  380. #define S3C24XX_DEV_PM_OPS NULL
  381. #endif
  382.  
  383. /* device driver for platform bus bits */
  384.  
  385. staticstruct platform_device_id s3c24xx_driver_ids[] = {
  386.     {
  387.         .name       ="s3c2410-i2c",
  388.         .driver_data    = TYPE_S3C2410,
  389.     }, {
  390.         .name       ="s3c2440-i2c",
  391.         .driver_data    = TYPE_S3C2440,
  392.     }, { },
  393. }; 
  394. MODULE_DEVICE_TABLE(platform, s3c24xx_driver_ids);
  395.  
  396. staticstruct platform_driver s3c24xx_i2c_driver = {
  397.     .probe      = s3c24xx_i2c_probe,
  398.     .remove     = s3c24xx_i2c_remove,
  399.     .id_table   = s3c24xx_driver_ids,  //解释参见代码后面说明
  400.     .driver     = {
  401.         .owner  = THIS_MODULE,
  402.         .name   ="s3c-i2c",
  403.         .pm = S3C24XX_DEV_PM_OPS,
  404.     },
  405. }; 
  406.  
  407. staticint __init i2c_adap_s3c_init(void)
  408.     return platform_driver_register(&s3c24xx_i2c_driver);
  409. subsys_initcall(i2c_adap_s3c_init);
  410.  
  411. staticvoid __exit i2c_adap_s3c_exit(void)
  412.     platform_driver_unregister(&s3c24xx_i2c_driver);
  413. module_exit(i2c_adap_s3c_exit);
  414.  
  415. MODULE_DESCRIPTION("S3C24XX I2C Bus driver");
  416. MODULE_AUTHOR("Ben Dooks, ");
  417. MODULE_LICENSE("GPL");

      i2c_adap_s3c_init注册i2c平台驱动s3c24xx_i2c_driver,它是platform_driver结构体,不要误解为i2c_driver。同时还实现了probe、remove、id_table、driver,其中suspend、resume在driver中实现。i2c_adap_s3c_exit注销s3c24xx_i2c_driver。

      关于平台驱动s3c24xx_i2c_driver中名字为s3c_i2c与平台设备中名字s3c2410-i2c不一样,怎么匹配?这里主要在于id_table,s3c24xx_driver_ids包含了驱动所支持的设备ID表,判断这个表中的名字与平台设备中名字一致,则匹配成功。

2.I2C通信方法

  1. #include
  2. #include
  3.  
  4. #include
  5. #include
  6. #include
  7. #include
  8. #include
  9. #include
  10. #include
  11. #include
  12. #include
  13. #include
  14. #include
  15.  
  16. #include
  17. #include
  18.  
  19. #include
  20. #include
  21.  
  22. /* i2c controller state */
  23.  
  24. enum s3c24xx_i2c_state { 
  25.     STATE_IDLE,
  26.     STATE_START,
  27.     STATE_READ,
  28.     STATE_WRITE,
  29.     STATE_STOP
  30. }; 
  31.  
  32. enum s3c24xx_i2c_type { 
  33.     TYPE_S3C2410,
  34.     TYPE_S3C2440,
  35. }; 
  36.  
  37. struct s3c24xx_i2c { 
  38.     spinlock_t      lock;
  39.     wait_queue_head_t   wait;
  40.     unsignedint        suspended:1;
  41.  
  42.     struct i2c_msg      *msg;
  43.     unsignedint        msg_num;
  44.     unsignedint        msg_idx;
  45.     unsignedint        msg_ptr;
  46.  
  47.     unsignedint        tx_setup;
  48.     unsignedint        irq;
  49.  
  50.     enum s3c24xx_i2c_state  state;
  51.     unsignedlong       clkrate;
  52.  
  53.     void __iomem        *regs;
  54.     struct clk      *clk;
  55.     struct device       *dev;
  56.     struct resource     *ioarea;
  57.     struct i2c_adapter  adap;
  58.  
  59. #ifdef CONFIG_CPU_FREQ
  60.     struct notifier_block   freq_transition;
  61. #endif
  62. }; 
  63.  
  64. /* default platform data removed, dev should always carry data. */
  65.  
  66. /* s3c24xx_i2c_is2440()
  67. *
  68. * return true is this is an s3c2440
  69. */
  70.  
  71. staticinlineint s3c24xx_i2c_is2440(struct s3c24xx_i2c *i2c) 
  72.     struct platform_device *pdev = to_platform_device(i2c->dev);
  73.     enum s3c24xx_i2c_type type;
  74.  
  75.     type = platform_get_device_id(pdev)->driver_data;
  76.     return type == TYPE_S3C2440;
  77.  
  78. /* s3c24xx_i2c_master_complete
  79. *
  80. * complete the message and wake up the caller, using the given return code,
  81. * or zero to mean ok.
  82. */
  83.  
  84. staticinlinevoid s3c24xx_i2c_master_complete(struct s3c24xx_i2c *i2c, int ret)
  85.     dev_dbg(i2c->dev,"master_complete %d\n", ret);
  86.  
  87.     i2c->msg_ptr = 0;
  88.     i2c->msg = NULL;
  89.     i2c->msg_idx++;
  90.     i2c->msg_num = 0;
  91.     if (ret)
  92.         i2c->msg_idx = ret;
  93.  
  94.     wake_up(&i2c->wait);
  95.  
  96. staticinlinevoid s3c24xx_i2c_disable_ack(struct s3c24xx_i2c *i2c) 
  97.     unsignedlong tmp;
  98.  
  99.     tmp = readl(i2c->regs + S3C2410_IICCON);
  100.     writel(tmp & ~S3C2410_IICCON_ACKEN, i2c->regs + S3C2410_IICCON);
  101.  
  102. staticinlinevoid s3c24xx_i2c_enable_ack(struct s3c24xx_i2c *i2c) 
  103.     unsignedlong tmp;
  104.  
  105.     tmp = readl(i2c->regs + S3C2410_IICCON);
  106.     writel(tmp | S3C2410_IICCON_ACKEN, i2c->regs + S3C2410_IICCON);
  107.  
  108. /* irq enable/disable functions */
  109.  
  110. staticinlinevoid s3c24xx_i2c_disable_irq(struct s3c24xx_i2c *i2c) 
  111.     unsignedlong tmp;
  112.  
  113.     tmp = readl(i2c->regs + S3C2410_IICCON);
  114.     writel(tmp & ~S3C2410_IICCON_IRQEN, i2c->regs + S3C2410_IICCON);
  115.  
  116. staticinlinevoid s3c24xx_i2c_enable_irq(struct s3c24xx_i2c *i2c) 
  117.     unsignedlong tmp;
  118.  
  119.     tmp = readl(i2c->regs + S3C2410_IICCON);
  120.     writel(tmp | S3C2410_IICCON_IRQEN, i2c->regs + S3C2410_IICCON);
  121.  
  122.  
  123. /* s3c24xx_i2c_message_start
  124. *
  125. * put the start of a message onto the bus
  126. */
  127.  
  128. staticvoid s3c24xx_i2c_message_start(struct s3c24xx_i2c *i2c, 
  129.                      struct i2c_msg *msg)
  130.     unsignedint addr = (msg->addr & 0x7f) << 1;
  131.     unsignedlong stat;
  132.     unsignedlong iiccon;
  133.  
  134.     stat = 0;
  135.     stat |=  S3C2410_IICSTAT_TXRXEN;     /* 使能TXRX */
  136.  
  137.     if (msg->flags & I2C_M_RD) {         /* 设备地址 */
  138.         stat |= S3C2410_IICSTAT_MASTER_RX;
  139.         addr |= 1;
  140.     }else
  141.         stat |= S3C2410_IICSTAT_MASTER_TX;
  142.  
  143.     if (msg->flags & I2C_M_REV_DIR_ADDR)
  144.         addr ^= 1;
  145.  
  146.     /* todo - check for wether ack wanted or not */
  147.     s3c24xx_i2c_enable_ack(i2c);         /* 使能ack */
  148.  
  149.     iiccon = readl(i2c->regs + S3C2410_IICCON);
  150.     writel(stat, i2c->regs + S3C2410_IICSTAT);
  151.  
  152.     dev_dbg(i2c->dev,"START: %08lx to IICSTAT, %02x to DS\n", stat, addr);
  153.     writeb(addr, i2c->regs + S3C2410_IICDS);   /* 写设备地址 */
  154.  
  155.     /* delay here to ensure the data byte has gotten onto the bus
  156.      * before the transaction is started */
  157.  
  158.     ndelay(i2c->tx_setup);
  159.  
  160.     dev_dbg(i2c->dev,"iiccon, %08lx\n", iiccon);
  161.     writel(iiccon, i2c->regs + S3C2410_IICCON);
  162.  
  163.     stat |= S3C2410_IICSTAT_START;            /* 启动i2c,当设备地址发送后就会进入中断,在中断中根据不同状态进行读写操作 */
  164.     writel(stat, i2c->regs + S3C2410_IICSTAT);
  165.  
  166. staticinlinevoid s3c24xx_i2c_stop(struct s3c24xx_i2c *i2c, int ret)
  167.     unsignedlong iicstat = readl(i2c->regs + S3C2410_IICSTAT);
  168.  
  169.     dev_dbg(i2c->dev,"STOP\n");
  170.  
  171.     /* stop the transfer */
  172.     iicstat &= ~S3C2410_IICSTAT_START;
  173.     writel(iicstat, i2c->regs + S3C2410_IICSTAT);
  174.  
  175.     i2c->state = STATE_STOP;
  176.  
  177.     s3c24xx_i2c_master_complete(i2c, ret);
  178.     s3c24xx_i2c_disable_irq(i2c);
  179.  
  180. /* helper functions to determine the current state in the set of
  181. * messages we are sending */
  182.  
  183. /* 关于以下三个函数功能区别,后文详解 */
  184. /* is_lastmsg()
  185. *
  186. * returns TRUE if the current message is the last in the set
  187. */
  188.  
  189. staticinlineint is_lastmsg(struct s3c24xx_i2c *i2c) 
  190.     return i2c->msg_idx >= (i2c->msg_num - 1);
  191.  
  192. /* is_msglast
  193. *
  194. * returns TRUE if we this is the last byte in the current message
  195. */
  196.  
  197. staticinlineint is_msglast(struct s3c24xx_i2c *i2c) 
  198.     return i2c->msg_ptr == i2c->msg->len-1;
  199.  
  200. /* is_msgend
  201. *
  202. * returns TRUE if we reached the end of the current message
  203. */
  204.  
  205. staticinlineint is_msgend(struct s3c24xx_i2c *i2c) 
  206.     return i2c->msg_ptr >= i2c->msg->len;
  207.  
  208. /* i2s_s3c_irq_nextbyte
  209. *
  210. * process an interrupt and work out what to do
  211. */
  212.  
  213. staticint i2s_s3c_irq_nextbyte(struct s3c24xx_i2c *i2c, unsigned long iicstat)
  214. {  
  215.       /* 此函数比较复杂,在后文中将举一个具体例子来说明整个过程 */
  216.     unsignedlong tmp;
  217.     unsignedchar byte;
  218.     int ret = 0;
  219.  
  220.     switch (i2c->state) {
  221.  
  222.     case STATE_IDLE:
  223.         dev_err(i2c->dev,"%s: called in STATE_IDLE\n", __func__);
  224.        goto out;
  225.        break;
  226.  
  227.     case STATE_STOP:
  228.         dev_err(i2c->dev,"%s: called in STATE_STOP\n", __func__);
  229.         s3c24xx_i2c_disable_irq(i2c);
  230.        goto out_ack;
  231.  
  232.     case STATE_START:
  233.        /* last thing we did was send a start condition on the
  234.          * bus, or started a new i2c message
  235.          */
  236.  
  237.        if (iicstat & S3C2410_IICSTAT_LASTBIT &&
  238.             !(i2c->msg->flags & I2C_M_IGNORE_NAK)) {
  239.            /* ack was not received... */
  240.  
  241.             dev_dbg(i2c->dev,"ack was not received\n");
  242.             s3c24xx_i2c_stop(i2c, -ENXIO);
  243.            goto out_ack;
  244.         }
  245.  
  246.        if (i2c->msg->flags & I2C_M_RD)
  247.             i2c->state = STATE_READ;
  248.        else
  249.             i2c->state = STATE_WRITE;
  250.  
  251.        /* terminate the transfer if there is nothing to do
  252.          * as this is used by the i2c probe to find devices. */
  253.  
  254.        if (is_lastmsg(i2c) && i2c->msg->len == 0) {
  255.             s3c24xx_i2c_stop(i2c, 0);
  256.            goto out_ack;
  257.         }
  258.  
  259.        if (i2c->state == STATE_READ)
  260.            goto prepare_read;
  261.  
  262.        /* fall through to the write state, as we will need to
  263.          * send a byte as well */
  264.  
  265.     case STATE_WRITE:
  266.        /* we are writing data to the device... check for the
  267.          * end of the message, and if so, work out what to do
  268.          */
  269.  
  270.        if (!(i2c->msg->flags & I2C_M_IGNORE_NAK)) {
  271.            if (iicstat & S3C2410_IICSTAT_LASTBIT) {
  272.                 dev_dbg(i2c->dev,"WRITE: No Ack\n");
  273.  
  274.                 s3c24xx_i2c_stop(i2c, -ECONNREFUSED);
  275.                goto out_ack;
  276.             }
  277.         }
  278.  
  279. retry_write:
  280.  
  281.        if (!is_msgend(i2c)) {
  282.             byte = i2c->msg->buf[i2c->msg_ptr++];
  283.             writeb(byte, i2c->regs + S3C2410_IICDS);
  284.  
  285.            /* delay after writing the byte to allow the
  286.              * data setup time on the bus, as writing the
  287.              * data to the register causes the first bit
  288.              * to appear on SDA, and SCL will change as
  289.              * soon as the interrupt is acknowledged */
  290.  
  291.             ndelay(i2c->tx_setup);
  292.  
  293.         }elseif (!is_lastmsg(i2c)) {
  294.            /* we need to go to the next i2c message */
  295.  
  296.             dev_dbg(i2c->dev,"WRITE: Next Message\n");
  297.  
  298.             i2c->msg_ptr = 0;
  299.             i2c->msg_idx++;
  300.             i2c->msg++;
  301.  
  302.            /* check to see if we need to do another message */
  303.            if (i2c->msg->flags & I2C_M_NOSTART) {
  304.  
  305.                if (i2c->msg->flags & I2C_M_RD) {
  306.                    /* cannot do this, the controller
  307.                      * forces us to send a new START
  308.                      * when we change direction */
  309.  
  310.                     s3c24xx_i2c_stop(i2c, -EINVAL);
  311.                 }
  312.  
  313.                goto retry_write;
  314.             }else {
  315.                /* send the new start */
  316.                 s3c24xx_i2c_message_start(i2c, i2c->msg);
  317.                 i2c->state = STATE_START;
  318.             }
  319.  
  320.         }else {
  321.            /* send stop */
  322.  
  323.             s3c24xx_i2c_stop(i2c, 0);
  324.         }
  325.        break;
  326.  
  327.     case STATE_READ:
  328.        /* we have a byte of data in the data register, do
  329.          * something with it, and then work out wether we are
  330.          * going to do any more read/write
  331.          */
  332.  
  333.         byte = readb(i2c->regs + S3C2410_IICDS);
  334.         i2c->msg->buf[i2c->msg_ptr++] = byte;
  335.  
  336. prepare_read:
  337.        if (is_msglast(i2c)) {
  338.            /* last byte of buffer */
  339.  
  340.            if (is_lastmsg(i2c))
  341.                 s3c24xx_i2c_disable_ack(i2c);
  342.  
  343.         }elseif (is_msgend(i2c)) {
  344.            /* ok, we've read the entire buffer, see if there
  345.              * is anything else we need to do */
  346.  
  347.            if (is_lastmsg(i2c)) {
  348.                /* last message, send stop and complete */
  349.                 dev_dbg(i2c->dev,"READ: Send Stop\n");
  350.  
  351.                 s3c24xx_i2c_stop(i2c, 0);
  352.             }else {
  353.                /* go to the next transfer */
  354.                 dev_dbg(i2c->dev,"READ: Next Transfer\n");
  355.  
  356.                 i2c->msg_ptr = 0;
  357.                 i2c->msg_idx++;
  358.                 i2c->msg++;
  359.             }
  360.         }
  361.  
  362.        break;
  363.     }
  364.  
  365.     /* acknowlegde the IRQ and get back on with the work */
  366.  
  367. out_ack:             /* 退出时请pend flag */
  368.     tmp = readl(i2c->regs + S3C2410_IICCON);
  369.     tmp &= ~S3C2410_IICCON_IRQPEND;
  370.     writel(tmp, i2c->regs + S3C2410_IICCON);
  371. out:
  372.     return ret;
  373.  
  374. /* s3c24xx_i2c_irq
  375. *
  376. * top level IRQ servicing routine
  377. */
  378.  
  379. static irqreturn_t s3c24xx_i2c_irq(int irqno,void *dev_id)
  380.     /* 中断第一次进入在调用s3c24xx_i2c_message_start写入设备地址后 */
  381.     struct s3c24xx_i2c *i2c = dev_id;
  382.     unsignedlong status;
  383.     unsignedlong tmp;
  384.  
  385.     status = readl(i2c->regs + S3C2410_IICSTAT);
  386.  
  387.     if (status & S3C2410_IICSTAT_ARBITR) {
  388.        /* deal with arbitration loss */
  389.         dev_err(i2c->dev,"deal with arbitration loss\n");
  390.     }
  391.  
  392.     if (i2c->state == STATE_IDLE) {
  393.         dev_dbg(i2c->dev,"IRQ: error i2c->state == IDLE\n");
  394.  
  395.         tmp = readl(i2c->regs + S3C2410_IICCON);
  396.         tmp &= ~S3C2410_IICCON_IRQPEND;
  397.         writel(tmp, i2c->regs +  S3C2410_IICCON);
  398.        goto out;
  399.     }
  400.  
  401.     /* pretty much this leaves us with the fact that we've
  402.      * transmitted or received whatever byte we last sent */
  403.  
  404.     i2s_s3c_irq_nextbyte(i2c, status);   /* 根据不同状态步步推进读写操作,i2s_s3c_irq_nextbyte难点 */
  405.  
  406. out:
  407.     return IRQ_HANDLED;
  408.  
  409.  
  410. /* s3c24xx_i2c_set_master
  411. *
  412. * get the i2c bus for a master transaction
  413. */
  414.  
  415. staticint s3c24xx_i2c_set_master(struct s3c24xx_i2c *i2c) 
  416.     unsignedlong iicstat;
  417.     int timeout = 400;
  418.  
  419.     while (timeout-- > 0) {
  420.         iicstat = readl(i2c->regs + S3C2410_IICSTAT);
  421.  
  422.        if (!(iicstat & S3C2410_IICSTAT_BUSBUSY))
  423.            return 0;
  424.  
  425.         msleep(1);
  426.     }
  427.  
  428.     return -ETIMEDOUT;
  429.  
  430. /* s3c24xx_i2c_doxfer
  431. *
  432. * this starts an i2c transfer
  433. */
  434.  
  435. staticint s3c24xx_i2c_doxfer(struct s3c24xx_i2c *i2c, 
  436.                  struct i2c_msg *msgs,int num)
  437.     unsignedlong timeout;
  438.     int ret;
  439.  
  440.     if (i2c->suspended)
  441.        return -EIO;
  442.  
  443.     ret = s3c24xx_i2c_set_master(i2c);      /* 检查i2c总线状态 */
  444.     if (ret != 0) {
  445.         dev_err(i2c->dev,"cannot get bus (error %d)\n", ret);
  446.         ret = -EAGAIN;
  447.        goto out;
  448.     }
  449.  
  450.     spin_lock_irq(&i2c->lock);
  451.  
  452.     i2c->msg     = msgs;       /* 把消息写入i2c结构体 */  
  453.     i2c->msg_num = num;
  454.     i2c->msg_ptr = 0;
  455.     i2c->msg_idx = 0;
  456.     i2c->state   = STATE_START;
  457.  
  458.     s3c24xx_i2c_enable_irq(i2c);     /* 使能中断*/
  459.     s3c24xx_i2c_message_start(i2c, msgs);  /* 写设备地址,启动i2c */
  460.     spin_unlock_irq(&i2c->lock);
  461.  
  462.     timeout = wait_event_timeout(i2c->wait, i2c->msg_num == 0, HZ * 5); /* 等待消息传输完成,否则超时 */
  463.  
  464.     ret = i2c->msg_idx;    /* 成功传输消息条数 */
  465.  
  466.     /* having these next two as dev_err() makes life very
  467.      * noisy when doing an i2cdetect */
  468.  
  469.     if (timeout == 0)
  470.         dev_dbg(i2c->dev,"timeout\n");
  471.     elseif (ret != num)             /* 如果ret不等于原有消息条数,传输失败 */
  472.         dev_dbg(i2c->dev,"incomplete xfer (%d)\n", ret);
  473.  
  474.     /* ensure the stop has been through the bus */
  475.  
  476.     msleep(1);
  477.  
  478. out:
  479.     return ret;
  480.  
  481. /* s3c24xx_i2c_xfer
  482. *
  483. * first port of call from the i2c bus code when an message needs
  484. * transferring across the i2c bus.
  485. */
  486.  
  487. staticint s3c24xx_i2c_xfer(struct i2c_adapter *adap, 
  488.            struct i2c_msg *msgs,int num)
  489.     struct s3c24xx_i2c *i2c = (struct s3c24xx_i2c *)adap->algo_data; 
  490.     int retry;
  491.     int ret;
  492.  
  493.     for (retry = 0; retry < adap->retries; retry++) {  /* 传输不成功重复次数 */
  494.  
  495.         ret = s3c24xx_i2c_doxfer(i2c, msgs, num);  /* 重点在这里实现 */
  496.  
  497.        if (ret != -EAGAIN)
  498.            return ret;
  499.  
  500.         dev_dbg(i2c->dev,"Retrying transmission (%d)\n", retry);
  501.  
  502.         udelay(100);
  503.     }
  504.  
  505.     return -EREMOTEIO;
  506.  
  507. /* declare our i2c functionality */
  508. static u32 s3c24xx_i2c_func(struct i2c_adapter *adap)
  509. {     /* 支持的功能,定义在i2c.h */
  510.     return I2C_FUNC_I2C | I2C_FUNC_SMBUS_EMUL | I2C_FUNC_PROTOCOL_MANGLING;
  511.  
  512. /* i2c bus registration info */
  513.  
  514. staticconststruct i2c_algorithm s3c24xx_i2c_algorithm = {
  515.     .master_xfer        = s3c24xx_i2c_xfer,
  516.     .functionality      = s3c24xx_i2c_func,
  517. }; 

      I2C适配器的通信方法整个驱动的重点,主要实现i2c_algorithm的master_xfer()和functionality()。s3c24xx_i2c_xfer中调用了s3c24xx_i2c_doxfer,然后启动i2c,并且通过中断s3c24xx_i2c_irq和i2s_s3c_irq_nextbyte来一步步推进传输工作。

      通信方法传输是以消息为单位的,所有先了解消息结构体。消息i2c_msg包括地址、标志、一条消息包含的数据及长度。

struct i2c_msg {

       __u16 addr;    /* slave address                    */

       __u16 flags;

#define I2C_M_TEN            0x0010    /* this is a ten bit chip address */

#define I2C_M_RD              0x0001    /* read data, from slave to master */

#define I2C_M_NOSTART           0x4000    /* if I2C_FUNC_PROTOCOL_MANGLING */

#define I2C_M_REV_DIR_ADDR 0x2000    /* if I2C_FUNC_PROTOCOL_MANGLING */

#define I2C_M_IGNORE_NAK    0x1000    /* if I2C_FUNC_PROTOCOL_MANGLING */

#define I2C_M_NO_RD_ACK             0x0800    /* if I2C_FUNC_PROTOCOL_MANGLING */

#define I2C_M_RECV_LEN         0x0400    /* length will be first received byte */

       __u16 len;             /* msg length                       */

       __u8 *buf;             /* pointer to msg data                  */

};

      代码中提到的is_lastmsg、is_msglast、is_msgend到底判断是什么?在s3c24xx_i2c中定义的struct i2c_msg       *msg看出可以包含多条消息,而一条消息有可能包含多个数据,比如对于AT24c02页写就包含多个数据。is_lastmsg判断是否是消息中最后一条,使用了变量msg_idx;is_msglast判断是否一条消息中最后一个数据,is_msgend判断是否是一条消息全部完成,所以这两个函数使用变量时msg_ptr。

      下面就根据AT24C02具体的讲解s3c24xx_i2c_irq和i2s_s3c_irq_nextbyte如何实现传输。

      任意地址字节写时序如上所示,只需要一条消息即可。其中flag位为写,写0即可,消息包括两个数据目标地址、数据,消息如下所示。

struct i2c_msg *msg;

msg=malloc(sizeof(struct i2c_msg));

msg.len=2;    // 1个目标地址和1个数据

msg.addr=0x50; // 设备地址

msg.flags=0;  // write

msg.buf=(unsigned char*)malloc(2);

msg.buf[0]=0x10;// 目标地址

msg.buf[1]=0x58;// the data to write

      s3c24xx_i2c_xfer中调用了s3c24xx_i2c_doxfer,在s3c24xx_i2c_doxfer中把消息传入i2c->msg,使能中断,置i2c->state 为STATE_START,调用s3c24xx_i2c_message_start启动i2c发送设备地址,就等待中断来做后续工作。当设备地址发送后就会进入中断,继续进入i2s_s3c_irq_nextbyte的STATE_START,判断消息为写,置i2c->state 为STATE_WRITE,跳入STATE_WRITE,在retry_write这一段中,if先判断是否一条消息所有数据发送完,没发送完,则每次发送一条等待下次中断进入,每发送一个数据都要清pend位;发送完else if判断是否最后一条消息,如果不是则要指针指向下一条消息继续if的步骤;最后else为发送完成,停止i2c。针对任意字节写只有一条消息,if中发送两次就完成本条消息传输。

      任意地址字节读时序如上所示,需两条消息。第一条,写目标地址,flag位为写;第二条,读取数据,flag位为读,第一条与第二条消息之间要发送START。

struct i2c_msg *msgs;

msgs=malloc(2*sizeof(struct i2c_msg));

msgs[0].len=1; // 目标地址

msgs[0].addr=0x50; // 设备地址

msgs[0].flags=0; // write

msgs[0].buf=(unsigned char*)malloc(1);

msgs[0].buf[0]=0x10; // 目标地址

msgs[1].len=1; // 读出的数据

msgs[1].addr=0x50; // 设备地址

msgs[1].flags=I2C_M_RD; // read

msgs[1].buf=(unsigned char*)malloc(1);

msgs[1].buf[0]=0;// 初始化读缓冲

      直接从中断开始讲,发送设备地址后,进入STATE_START,判断第一条消息为写,置i2c->state 为STATE_WRITE,跳入STATE_WRITE,第一条消息有一个数据,发送完成后,在else if中判断不是此条消息不是最后一条,就会执行else if中指向下一条消息,s3c24xx_i2c_message_start重新发送START,置i2c->state 为STATE_START。下次进入中跳到STATE_START,判断第二条消息为读,置i2c->state 为STATE_READ跳入STATE_READ,第二条消息只有一个数据,关闭ack,接收一个字节,停止i2c。看完这两个例子,再看i2s_s3c_irq_nextbyte就容易理解。

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