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cpu/arm920t/s3c24x0/nand_flash.c

分类： LINUX

2013-05-02 06:53:32


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  1. #include <common.h>
  2.  
  3. #if (CONFIG_COMMANDS & CFG_CMD_NAND) && !defined(CFG_NAND_LEGACY)
  4. #include <s3c2410.h>
  5. #include <nand.h>
  6.  
  7. DECLARE_GLOBAL_DATA_PTR;
  8.  
  9. #define S3C2410_NFSTAT_READY (1<<0)
  10. #define S3C2410_NFCONF_nFCE (1<<11)
  11.  
  12. #define S3C2440_NFSTAT_READY (1<<0)
  13. #define S3C2440_NFCONT_nFCE (1<<1)




  18. static void s3c2410_nand_select_chip(struct mtd_info *mtd, int chip)
  19. {
  20.     S3C2410_NAND * const s3c2410nand = S3C2410_GetBase_NAND();
  21.  
  22.     if (chip == -1) {
  23.         s3c2410nand->NFCONF |= S3C2410_NFCONF_nFCE;
  24.     } else {
  25.         s3c2410nand->NFCONF &= ~S3C2410_NFCONF_nFCE;
  26.     }
  27. }




  32. static void s3c2410_nand_hwcontrol(struct mtd_info *mtd, int cmd)
  33. {
  34.     S3C2410_NAND * const s3c2410nand = S3C2410_GetBase_NAND();
  35.     struct nand_chip *chip = mtd->priv;
  36.  
  37.     switch (cmd) {
  38.     case NAND_CTL_SETNCE:
  39.     case NAND_CTL_CLRNCE:
  40.         printf("%s: called for NCE\n", __FUNCTION__);
  41.         break;
  42.  
  43.     case NAND_CTL_SETCLE:
  44.         chip->IO_ADDR_W = (void *)&s3c2410nand->NFCMD;
  45.         break;
  46.  
  47.     case NAND_CTL_SETALE:
  48.         chip->IO_ADDR_W = (void *)&s3c2410nand->NFADDR;
  49.         break;
  50.  
  51.         
  52.        
  53.     default:
  54.         chip->IO_ADDR_W = (void *)&s3c2410nand->NFDATA;
  55.         break;
  56.     }
  57. }




  62. static int s3c2410_nand_devready(struct mtd_info *mtd)
  63. {
  64.     S3C2410_NAND * const s3c2410nand = S3C2410_GetBase_NAND();
  65.  
  66.     return (s3c2410nand->NFSTAT & S3C2410_NFSTAT_READY);
  67. }
  68.  
  69.  
  70.  
  71. static void s3c2440_nand_select_chip(struct mtd_info *mtd, int chip)
  72. {
  73.     S3C2440_NAND * const s3c2440nand = S3C2440_GetBase_NAND();
  74.  
  75.     if (chip == -1) {
  76.         s3c2440nand->NFCONT |= S3C2440_NFCONT_nFCE;
  77.     } else {
  78.         s3c2440nand->NFCONT &= ~S3C2440_NFCONT_nFCE;
  79.     }
  80. }
  81.  
  82.  
  83. static void s3c2440_nand_hwcontrol(struct mtd_info *mtd, int cmd)
  84. {
  85.     S3C2440_NAND * const s3c2440nand = S3C2440_GetBase_NAND();
  86.     struct nand_chip *chip = mtd->priv;
  87.  
  88.     switch (cmd) {
  89.     case NAND_CTL_SETNCE:
  90.     case NAND_CTL_CLRNCE:
  91.         printf("%s: called for NCE\n", __FUNCTION__);
  92.         break;
  93.  
  94.     case NAND_CTL_SETCLE:
  95.         chip->IO_ADDR_W = (void *)&s3c2440nand->NFCMD;
  96.         break;
  97.  
  98.     case NAND_CTL_SETALE:
  99.         chip->IO_ADDR_W = (void *)&s3c2440nand->NFADDR;
  100.         break;
  101.  
  102.        
  103.        
  104.     default:
  105.         chip->IO_ADDR_W = (void *)&s3c2440nand->NFDATA;
  106.         break;
  107.     }
  108. }
  109.  
  110.  
  111. static int s3c2440_nand_devready(struct mtd_info *mtd)
  112. {
  113.     S3C2440_NAND * const s3c2440nand = S3C2440_GetBase_NAND();
  114.  
  115.     return (s3c2440nand->NFSTAT & S3C2440_NFSTAT_READY);
  116. }
  117.  
  118.  
  119. static void s3c24x0_nand_inithw(void)
  120. {
  121.     S3C2410_NAND * const s3c2410nand = S3C2410_GetBase_NAND();
  122.     S3C2440_NAND * const s3c2440nand = S3C2440_GetBase_NAND();
  123.  
  124. #define TACLS 0
  125. #define TWRPH0 4
  126. #define TWRPH1 2
  127.  
  128.     if (gd->bd->bi_arch_number == MACH_TYPE_SMDK2410)
  129.     {
  130.        
  131.         s3c2410nand->NFCONF = (1<<15)|(1<<12)|(1<<11)|(TACLS<<8)|(TWRPH0<<4)|(TWRPH1<<0);
  132.     }
  133.     else
  134.     {
  135.        
  136.         s3c2440nand->NFCONF = (TACLS<<12)|(TWRPH0<<8)|(TWRPH1<<4);
  137.        
  138.         s3c2440nand->NFCONT = (1<<4)|(0<<1)|(1<<0);
  139.     }
  140. }
  141.  
  142.  
  143. void board_nand_init(struct nand_chip *chip)
  144. {
  145.     S3C2410_NAND * const s3c2410nand = S3C2410_GetBase_NAND();
  146.     S3C2440_NAND * const s3c2440nand = S3C2440_GetBase_NAND();
  147.  
  148.     s3c24x0_nand_inithw();
  149.  
  150.     if (gd->bd->bi_arch_number == MACH_TYPE_SMDK2410) {
  151.         chip->IO_ADDR_R = (void *)&s3c2410nand->NFDATA;
  152.         chip->IO_ADDR_W = (void *)&s3c2410nand->NFDATA;
  153.         chip->hwcontrol = s3c2410_nand_hwcontrol;
  154.         chip->dev_ready = s3c2410_nand_devready;
  155.         chip->select_chip = s3c2410_nand_select_chip;
  156.         chip->options = 0;
  157.     } else {
  158.         chip->IO_ADDR_R = (void *)&s3c2440nand->NFDATA;
  159.         chip->IO_ADDR_W = (void *)&s3c2440nand->NFDATA;
  160.         chip->hwcontrol = s3c2440_nand_hwcontrol;
  161.         chip->dev_ready = s3c2440_nand_devready;
  162.         chip->select_chip = s3c2440_nand_select_chip;
  163.         chip->options = 0;
  164.     }
  165.  
  166.     chip->eccmode = NAND_ECC_SOFT;
  167. }
  168.  
  169. #endif


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