分类：
2012-12-02 14:49:27
Author： eilian
Blog： http://blog.csdn.net/eilianlau
Copyright：Original
Date： 2011、12、13
1、Hosting environment：VMare ubuntu10.04
2、Cross-compiling environment：arm-2009q3.tar.bz2
3、Development board：QT6410
4、nanflash：K9F2G08(256M)
5、linux -version：Linux-2.6.39
6、uboot-version：u-boot-2010.06
五、为nandflash分区
想起这个nandflash头痛、百次移植、百次卡起！
1)注册platform设备(nand)。修改arch/arm/mach-s3c64xx/mach-qt6410.c文件
在static struct platform_device *qt6410_devices[] __initdata中加入：
&samsung_asoc_dma,关于nandflash平台设备更多知识在arch/arm/plat-samsung/dev-nand.c和arch/arm/plat-samsung/include/plat/nand.h
以及arch/arm/plat-samsung/include/plat/regs-nand.h
dev-nand.c：定义了nand平台设备、nand平台设备所需资源、平台的一些数据信息等。
nand.h：定义了芯片本身相关的信息、bsp对nandflash的一些时序设置信息等。
regs-nand.h：CPU中NANDFLASH各种寄存器的定义。
2)添加分区、时序等。。
/*
* Configuring Nandflash on QT6410
*/
struct mtd_partition qt6410_nand_part[] = {
{
.name = "Bootloader",
.offset = 0,
.size = (1 * SZ_1M),
.mask_flags = MTD_CAP_NANDFLASH,
},
{
.name = "Kernel",
.offset = (1 * SZ_1M),
.size = (5*SZ_1M) ,
.mask_flags = MTD_CAP_NANDFLASH,
},
{
.name = "User",
.offset = (6 * SZ_1M),
.size = (120*SZ_1M) ,
},
{
.name = "File System",
.offset = MTDPART_OFS_APPEND,
.size = MTDPART_SIZ_FULL,
}
};
static struct s3c2410_nand_set qt6410_nand_sets[] = {
[0] = {
.name = "nand",
.nr_chips = 1,
.nr_partitions = ARRAY_SIZE(qt6410_nand_part),
.partitions = qt6410_nand_part,
},
};
static struct s3c2410_platform_nand qt6410_nand_info = {
.tacls = 25,
.twrph0 = 55,
.twrph1 = 40,
.nr_sets = ARRAY_SIZE(qt6410_nand_sets),
.sets = qt6410_nand_sets,
};
上面这些东西放在static struct platform_device *qt6410_devices[] __initdata就ok
还不行还需要把上面这些信息在bsp加载的时候告诉内核
在static void __init smdk6410_machine_init(void)函数中添加如下：
//eilian add it
s3c_nand_set_platdata(&qt6410_nand_info);
3)拷贝s3c_nand.c到linux-2.6.39/drivers/mtd/nand/目录下(不知道谁写的反证很强大)拿来主义不解释,开源的百度即有,给个免费连接地址
修改drivers/mtd/nand/目录下的Kconfig和Makfile告知内核编译s3c_nand.c
Kconfig：添加下面红色部分
config MTD_NAND_S3C2410_HWECC
bool "Samsung S3C NAND Hardware ECC"
depends on MTD_NAND_S3C2410
help
Enable the use of the controller's internal ECC generator when
using NAND. Early versions of the chips have had problems with
incorrect ECC generation, and if using these, the default of
software ECC is preferable.
config MTD_NAND_S3C
tristate "NAND Flash support for S3C SoC"
depends on (ARCH_S3C64XX || ARCH_S5P64XX || ARCH_S5PC1XX) && MTD_NAND
help
This enables the NAND flash controller on the S3C.
No board specfic support is done by this driver, each board
must advertise a platform_device for the driver to attach.
config MTD_NAND_S3C_DEBUG
bool "S3C NAND driver debug"
depends on MTD_NAND_S3C
help
Enable debugging of the S3C NAND driver
config MTD_NAND_S3C_HWECC
bool "S3C NAND Hardware ECC"
depends on MTD_NAND_S3C
help
Enable the use of the S3C's internal ECC generator when
using NAND. Early versions of the chip have had problems with
incorrect ECC generation, and if using these, the default of
software ECC is preferable.
If you lay down a device with the hardware ECC, then you will
currently not be able to switch to software, as there is no
implementation for ECC method used by the S3C
config MTD_NAND_NDFC
tristate "NDFC NanD Flash Controller"
depends on 4xx
select MTD_NAND_ECC_SMC
help
NDFC Nand Flash Controllers are integrated in IBM/AMCC's 4xx SoCs
Makefile：添加下面红色部分
obj-$(CONFIG_MTD_NAND_AUTCPU12) += autcpu12.o
obj-$(CONFIG_MTD_NAND_DENALI) += denali.o
obj-$(CONFIG_MTD_NAND_EDB7312) += edb7312.o
obj-$(CONFIG_MTD_NAND_AU1550) += au1550nd.o
obj-$(CONFIG_MTD_NAND_BF5XX) += bf5xx_nand.o
obj-$(CONFIG_MTD_NAND_PPCHAMELEONEVB) += ppchameleonevb.o
obj-$(CONFIG_MTD_NAND_S3C2410) += s3c2410.o
obj-$(CONFIG_MTD_NAND_S3C) += s3c_nand.o
obj-$(CONFIG_MTD_NAND_DAVINCI) += davinci_nand.o
obj-$(CONFIG_MTD_NAND_DISKONCHIP) += diskonchip.o
obj-$(CONFIG_MTD_NAND_FSMC) += fsmc_nand.o
改好后保存退出(未特殊声明红色部分和淡绿色部分代码为添加代码)
还有一个地方就是对S3C6410NANDFLASH寄存器的定义：在arch/arm/plat-samsung/include/plat/regs-nand.h中添加
#define S3C2412_NFECCERR_MULTIBIT (2)
#define S3C2412_NFECCERR_ECCAREA (3)
/* for s3c_nand.c */
#define S3C_NFCONF S3C2410_NFREG(0x00)
#define S3C_NFCONT S3C2410_NFREG(0x04)
#define S3C_NFCMMD S3C2410_NFREG(0x08)
#define S3C_NFADDR S3C2410_NFREG(0x0c)
#define S3C_NFDATA8 S3C2410_NFREG(0x10)
#define S3C_NFDATA S3C2410_NFREG(0x10)
#define S3C_NFMECCDATA0 S3C2410_NFREG(0x14)
#define S3C_NFMECCDATA1 S3C2410_NFREG(0x18)
#define S3C_NFSECCDATA S3C2410_NFREG(0x1c)
#define S3C_NFSBLK S3C2410_NFREG(0x20)
#define S3C_NFEBLK S3C2410_NFREG(0x24)
#define S3C_NFSTAT S3C2410_NFREG(0x28)
#define S3C_NFMECCERR0 S3C2410_NFREG(0x2c)
#define S3C_NFMECCERR1 S3C2410_NFREG(0x30)
#define S3C_NFMECC0 S3C2410_NFREG(0x34)
#define S3C_NFMECC1 S3C2410_NFREG(0x38)
#define S3C_NFSECC S3C2410_NFREG(0x3c)
#define S3C_NFMLCBITPT S3C2410_NFREG(0x40)
#define S3C_NF8ECCERR0 S3C2410_NFREG(0x44)
#define S3C_NF8ECCERR1 S3C2410_NFREG(0x48)
#define S3C_NF8ECCERR2 S3C2410_NFREG(0x4c)
#define S3C_NFM8ECC0 S3C2410_NFREG(0x50)
#define S3C_NFM8ECC1 S3C2410_NFREG(0x54)
#define S3C_NFM8ECC2 S3C2410_NFREG(0x58)
#define S3C_NFM8ECC3 S3C2410_NFREG(0x5c)
#define S3C_NFMLC8BITPT0 S3C2410_NFREG(0x60)
#define S3C_NFMLC8BITPT1 S3C2410_NFREG(0x64)
#define S3C_NFCONF_NANDBOOT (1<<31)
#define S3C_NFCONF_ECCCLKCON (1<<30)
#define S3C_NFCONF_ECC_MLC (1<<24)
#define S3C_NFCONF_ECC_1BIT (0<<23)
#define S3C_NFCONF_ECC_4BIT (2<<23)
#define S3C_NFCONF_ECC_8BIT (1<<23)
#define S3C_NFCONF_TACLS(x) ((x)<<12)
#define S3C_NFCONF_TWRPH0(x) ((x)<<8)
#define S3C_NFCONF_TWRPH1(x) ((x)<<4)
#define S3C_NFCONF_ADVFLASH (1<<3)
#define S3C_NFCONF_PAGESIZE (1<<2)
#define S3C_NFCONF_ADDRCYCLE (1<<1)
#define S3C_NFCONF_BUSWIDTH (1<<0)
#define S3C_NFCONT_ECC_ENC (1<<18)
#define S3C_NFCONT_LOCKTGHT (1<<17)
#define S3C_NFCONT_LOCKSOFT (1<<16)
#define S3C_NFCONT_MECCLOCK (1<<7)
#define S3C_NFCONT_SECCLOCK (1<<6)
#define S3C_NFCONT_INITMECC (1<<5)
#define S3C_NFCONT_INITSECC (1<<4)
#define S3C_NFCONT_nFCE1 (1<<2)
#define S3C_NFCONT_nFCE0 (1<<1)
#define S3C_NFCONT_INITECC (S3C_NFCONT_INITSECC | S3C_NFCONT_INITMECC)
#define S3C_NFSTAT_ECCENCDONE (1<<7)
#define S3C_NFSTAT_ECCDECDONE (1<<6)
#define S3C_NFSTAT_BUSY (1<<0)
#define S3C_NFECCERR0_ECCBUSY (1<<31)
保存退出
4)回到主目录重新配置、(在第一步编译测试的基础上)
root@bootloader:/home/eilian/development/Linux/linux-2.6.39#make menuconfig
按上下箭头键移动到 System Type->DEIVER按回车进入该子菜单，如图
进入子菜单
往下翻
进入子菜单
配置完后按exit退出
5)编译测试
root@bootloader:/home/eilian/development/Linux/linux-2.6.39#make uImage
通过tftp服务将uImage烧入DDR0X50018000处
Load address: 0x50000000
Loading: T #################################################################
#################################################################
#################################################################
####################################################
done
Bytes transferred = 1263964 (13495c hex)
QT6410# bootm 50000000
## Booting kernel from Legacy Image at 50000000 ...
Image Name: Linux-2.6.39
Image Type: ARM Linux Kernel Image (uncompressed)
Data Size: 1263900 Bytes = 1.2 MiB
Load Address: 50008000
Entry Point: 50008000
Verifying Checksum ... OK
Loading Kernel Image ... OK
OK
Starting kernel ...
Uncompressing Linux... done, booting the kernel.
Linux version 2.6.39 (root@bootloader) (gcc version 4.4.1 (Sourcery G++ Lite 2009q3-67) ) #1 Mon Dec 12 18:05:20 CST 2011
CPU: ARMv6-compatible processor [410fb766] revision 6 (ARMv7), cr=00c5387f
CPU: VIPT nonaliasing data cache, VIPT nonaliasing instruction cache
Machine: QT6410 development board
Memory policy: ECC disabled, Data cache writeback
CPU S3C6410 (id 0x36410101)
S3C24XX Clocks, Copyright 2004 Simtec Electronics
camera: no parent clock specified
S3C64XX: PLL settings, A=667000000, M=533000000, E=24000000
S3C64XX: HCLK2=266500000, HCLK=133250000, PCLK=66625000
mout_apll: source is fout_apll (1), rate is 667000000
mout_epll: source is epll (1), rate is 24000000
mout_mpll: source is mpll (1), rate is 533000000
mmc_bus: source is mout_epll (0), rate is 24000000
mmc_bus: source is mout_epll (0), rate is 24000000
mmc_bus: source is mout_epll (0), rate is 24000000
usb-bus-host: source is clk_48m (0), rate is 48000000
uclk1: source is mout_epll (0), rate is 24000000
spi-bus: source is mout_epll (0), rate is 24000000
spi-bus: source is mout_epll (0), rate is 24000000
audio-bus: source is mout_epll (0), rate is 24000000
audio-bus: source is mout_epll (0), rate is 24000000
audio-bus: source is mout_epll (0), rate is 24000000
irda-bus: source is mout_epll (0), rate is 24000000
camera: no parent clock specified
Built 1 zonelists in Zone order, mobility grouping on. Total pages: 32512
Kernel command line: root=/dev/mtdblock2 rootfstype=yaffs2 init=/linuxrc nconsole=tty1 console=ttySAC0,115200
PID hash table entries: 512 (order: -1, 2048 bytes)
Dentry cache hash table entries: 16384 (order: 4, 65536 bytes)
Inode-cache hash table entries: 8192 (order: 3, 32768 bytes)
Memory: 128MB = 128MB total
Memory: 127196k/127196k available, 3876k reserved, 0K highmem
Virtual kernel memory layout:
vector : 0xffff0000 - 0xffff1000 ( 4 kB)
fixmap : 0xfff00000 - 0xfffe0000 ( 896 kB)
DMA : 0xff600000 - 0xffe00000 ( 8 MB)
vmalloc : 0xc8800000 - 0xf6000000 ( 728 MB)
lowmem : 0xc0000000 - 0xc8000000 ( 128 MB)
modules : 0xbf000000 - 0xc0000000 ( 16 MB)
.init : 0xc0008000 - 0xc0022000 ( 104 kB)
.text : 0xc0022000 - 0xc024cc58 (2220 kB)
.data : 0xc024e000 - 0xc026f9e0 ( 135 kB)
SLUB: Genslabs=13, HWalign=32, Order=0-3, MinObjects=0, CPUs=1, Nodes=1
NR_IRQS:246
VIC @f6000000: id 0x00041192, vendor 0x41
VIC @f6010000: id 0x00041192, vendor 0x41
Console: colour dummy device 80x30
console [ttySAC0] enabled
Calibrating delay loop... 666.41 BogoMIPS (lpj=3332096)
pid_max: default: 32768 minimum: 301
Mount-cache hash table entries: 512
CPU: Testing write buffer coherency: ok
s3c6410-nand: failed to claim resource 0
------------[ cut here ]------------
WARNING: at drivers/base/core.c:143 device_release+0x70/0x84()
Device 'pwm-backlight.0' does not have a release() function, it is broken and must be fixed.
Modules linked in:
[
[
[
---[ end trace 1b75b31a2719ed25 ]---
------------[ cut here ]------------
WARNING: at drivers/base/core.c:143 device_release+0x70/0x84()
Device 'samsung-i2s.2' does not have a release() function, it is broken and must be fixed.
Modules linked in:
[
[
[
[
[
[
[
[
[
[
---[ end trace 1b75b31a2719ed26 ]---
------------[ cut here ]------------
WARNING: at drivers/base/core.c:143 device_release+0x70/0x84()
Device 'samsung-audio' does not have a release() function, it is broken and must be fixed.
Modules linked in:
[
[
[
[
[
[
[
[
[
[
---[ end trace 1b75b31a2719ed27 ]---
------------[ cut here ]------------
WARNING: at drivers/base/core.c:143 device_release+0x70/0x84()
Device 's3c-hsotg' does not have a release() function, it is broken and must be fixed.
Modules linked in:
[
[
[
[
[
[
[
[
[
[
---[ end trace 1b75b31a2719ed28 ]---
------------[ cut here ]------------
WARNING: at drivers/base/core.c:143 device_release+0x70/0x84()
Device 's3c2410-ohci' does not have a release() function, it is broken and must be fixed.
Modules linked in:
[
[
[
[
[
[
[
[
[
[
---[ end trace 1b75b31a2719ed29 ]---
------------[ cut here ]------------
WARNING: at drivers/base/core.c:143 device_release+0x70/0x84()
Device 's3c-fb' does not have a release() function, it is broken and must be fixed.
Modules linked in:
[
[
[
[
[
[
[
[
[
[
---[ end trace 1b75b31a2719ed2a ]---
------------[ cut here ]------------
WARNING: at drivers/base/core.c:143 device_release+0x70/0x84()
Device 's3c2440-i2c.1' does not have a release() function, it is broken and must be fixed.
Modules linked in:
[
[
[
[
[
[
[
[
[
[
---[ end trace 1b75b31a2719ed2b ]---
------------[ cut here ]------------
WARNING: at drivers/base/core.c:143 device_release+0x70/0x84()
Device 's3c2440-i2c.0' does not have a release() function, it is broken and must be fixed.
Modules linked in:
[
[
[
[
[
[
[
[
[
[
---[ end trace 1b75b31a2719ed2c ]---
s3c64xx_dma_init: Registering DMA channels
PL080: IRQ 73, at c8808000, channels 0..8
PL080: IRQ 74, at c880c000, channels 8..16
S3C6410: Initialising architecture
bio: create slab
usbcore: registered new interface driver usbfs
usbcore: registered new interface driver hub
usbcore: registered new device driver usb
ROMFS MTD (C) 2007 Red Hat, Inc.
io scheduler noop registered
io scheduler deadline registered
io scheduler cfq registered (default)
start plist test
end plist test
Serial: 8250/16550 driver, 4 ports, IRQ sharing disabled
s3c6400-uart.0: ttySAC0 at MMIO 0x7f005000 (irq = 16) is a S3C6400/10
s3c6400-uart.1: ttySAC1 at MMIO 0x7f005400 (irq = 20) is a S3C6400/10
s3c6400-uart.2: ttySAC2 at MMIO 0x7f005800 (irq = 24) is a S3C6400/10
s3c6400-uart.3: ttySAC3 at MMIO 0x7f005c00 (irq = 28) is a S3C6400/10
brd: module loaded
loop: module loaded
S3C NAND Driver, (c) 2008 Samsung Electronics
ohci_hcd: USB 1.1 'Open' Host Controller (OHCI) Driver
mousedev: PS/2 mouse device common for all mice
S3C24XX RTC, (c) 2004,2006 Simtec Electronics
i2c /dev entries driver
sdhci: Secure Digital Host Controller Interface driver
sdhci: Copyright(c) Pierre Ossman
usbcore: registered new interface driver usbhid
usbhid: USB HID core driver
VFP support v0.3: implementor 41 architecture 1 part 20 variant b rev 5
drivers/rtc/hctosys.c: unable to open rtc device (rtc0)
VFS: Cannot open root device "mtdblock2" or unknown-block(0,0)
Please append a correct "root=" boot option; here are the available partitions:
Kernel panic - not syncing: VFS: Unable to mount root fs on unknown-block(0,0)
[
[
[
[
结果、果断尴尬、蛋痛
搞了一个下午最后在arch/arm/plat-samsung/dev-nand.c文件中
static struct resource s3c_nand_resource[] = {
[0] = {
.start = S3C_PA_NAND,
.end = S3C_PA_NAND + SZ_1M,
.flags = IORESOURCE_MEM,
}
};
static struct resource s3c_nand_resource[] = {
[0] = {
.start = S3C_PA_NAND,
.end = S3C_PA_NAND + SZ_1M - 1,
.flags = IORESOURCE_MEM,
}
};
至于为什么减个1我还真不知道什么原因！！！
再次编译烧写结果如下
