Linux3.6.7在OK6410平台的移植（三）NAND HWECC 8BIT驱动

 1.从开发板厂家提供的源码中找到s3c_nand.c,放到drivers/mtd/nand目录下，修改其Makefile,加入：

obj-$(CONFIG_MTD_NAND_S3C)        += s3c_nand.o 修改Kconfig，为了和原来的NAND驱动区分开来，我把新加的驱动叫S3C64xx S5P64xx,原来的叫做S3C24xx S3C64xx.修改的地方如下：

并加入：

config MTD_NAND_S3C
tristate "NAND support for Samsung S3C64xx S5P64xx"
depends on (ARCH_S3C64XX || ARCH_S5P64XX || ARCH_S5PC1XX) && MTD_NAND
help
This enables the NAND flash controller on the S3C

No board specific support is done by this driver, each board
must advertise a platform_device for the driver to attach.

config MTD_NAND_S3C_DEBUG
bool "Samsung S3C64xx S5P64xx NAND driver debug"
depends on MTD_NAND_S3C
help
Enable debugging of the S3C NAND driver

config MTD_NAND_S3C_HWECC
bool "Samsung S3C64xx S5P64xx NAND Hardware ECC 8BITS"
depends on MTD_NAND_S3C
help
Enable the use of the S3C's internal ECC generator when
using NAND. Early versions of the chip have had problems with
incorrect ECC generation, and if using these, the default of
software ECC is preferable.

If you lay down a device with the hardware ECC, then you will
currently not be able to switch to software, as there is no
implementation for ECC method used by the S3C

2.arch/arm/plat-samsung/include/plat/regs_nand.h加入寄存器定义：

#define S3C_NFCONF S3C2410_NFREG(0x00)
#define S3C_NFCONT S3C2410_NFREG(0x04)
#define S3C_NFCMMD S3C2410_NFREG(0x08)
#define S3C_NFADDR S3C2410_NFREG(0x0c)
#define S3C_NFDATA8 S3C2410_NFREG(0x10)
#define S3C_NFDATA S3C2410_NFREG(0x10)
#define S3C_NFMECCDATA0 S3C2410_NFREG(0x14)
#define S3C_NFMECCDATA1 S3C2410_NFREG(0x18)
#define S3C_NFSECCDATA S3C2410_NFREG(0x1c)
#define S3C_NFSBLK S3C2410_NFREG(0x20)
#define S3C_NFEBLK S3C2410_NFREG(0x24)
#define S3C_NFSTAT S3C2410_NFREG(0x28)
#define S3C_NFMECCERR0 S3C2410_NFREG(0x2c)
#define S3C_NFMECCERR1 S3C2410_NFREG(0x30)
#define S3C_NFMECC0 S3C2410_NFREG(0x34)
#define S3C_NFMECC1 S3C2410_NFREG(0x38)
#define S3C_NFSECC S3C2410_NFREG(0x3c)
#define S3C_NFMLCBITPT S3C2410_NFREG(0x40)

#define S3C_NF8ECCERR0 S3C2410_NFREG(0x44)
#define S3C_NF8ECCERR1 S3C2410_NFREG(0x48)
#define S3C_NF8ECCERR2 S3C2410_NFREG(0x4c)


#define S3C_NFM8ECC0 S3C2410_NFREG(0x50)
#define S3C_NFM8ECC1 S3C2410_NFREG(0x54)
#define S3C_NFM8ECC2 S3C2410_NFREG(0x58)
#define S3C_NFM8ECC3 S3C2410_NFREG(0x5c)

#define S3C_NFMLC8BITPT0 S3C2410_NFREG(0x60)
#define S3C_NFMLC8BITPT1 S3C2410_NFREG(0x64)

#define S3C_NFCONF_NANDBOOT (1<<31)
#define S3C_NFCONF_ECCCLKCON (1<<30)
#define S3C_NFCONF_ECC_MLC (1<<24)
#define S3C_NFCONF_ECC_1BIT (0<<23)
#define S3C_NFCONF_ECC_4BIT (2<<23)
#define S3C_NFCONF_ECC_8BIT (1<<23)
#define S3C_NFCONF_TACLS(x) ((x)<<12)
#define S3C_NFCONF_TWRPH0(x) ((x)<<8)
#define S3C_NFCONF_TWRPH1(x) ((x)<<4)
#define S3C_NFCONF_ADVFLASH (1<<3)
#define S3C_NFCONF_PAGESIZE (1<<2)
#define S3C_NFCONF_ADDRCYCLE (1<<1)
#define S3C_NFCONF_BUSWIDTH (1<<0)

#define S3C_NFCONT_ECC_ENC (1<<18)
#define S3C_NFCONT_LOCKTGHT (1<<17)
#define S3C_NFCONT_LOCKSOFT (1<<16)
#define S3C_NFCONT_MECCLOCK (1<<7)
#define S3C_NFCONT_SECCLOCK (1<<6)
#define S3C_NFCONT_INITMECC (1<<5)
#define S3C_NFCONT_INITSECC (1<<4)
#define S3C_NFCONT_nFCE1 (1<<2)
#define S3C_NFCONT_nFCE0 (1<<1)
#define S3C_NFCONT_INITECC (S3C_NFCONT_INITSECC | S3C_NFCONT_INITMECC)

#define S3C_NFSTAT_ECCENCDONE (1<<7)
#define S3C_NFSTAT_ECCDECDONE (1<<6)
#define S3C_NFSTAT_BUSY (1<<0)

#define S3C_NFECCERR0_ECCBUSY (1<<31)

3. 修改drivers/mtd/nand/nand_base.c文件，加入

static struct nand_ecclayout nand_oob_218 = {
.eccbytes = 104,
.eccpos = {
24,25,26,27,28,29,30,31,32,33,
34,35,36,37,38,39,40,41,42,43,
44,45,46,47,48,49,50,51,52,53,
54,55,56,57,58,59,60,61,62,63,
64,65,66,67,68,69,70,71,72,73,
74,75,76,77,78,79,80,81,82,83,
84,85,86,87,88,89,90,91,92,93,
94,95,96,97,98,99,100,101,102,103,
104,105,106,107,108,109,110,111,112,113,
114,115,116,117,118,119,120,121,122,123,
124,125,126,127},
.oobfree =
{
{.offset = 2,
.length = 22
}
}
};

再找到int nand_scan_tail(struct mtd_info *mtd)这个函数，在switch (mtd->oobsize) 里面加入

case 218:
chip->ecc.layout = &nand_oob_218;
break;

找到if (!chip->ecc.strength) {
pr_warn("Driver must set ecc.strength when using hardware ECC\n");
BUG();
}把BUG();屏蔽掉

4.主目录下make menuconfig：

找到Device Drivers -->  Memory Technology Device (MTD) support --->NAND Device Support ---> 取消NAND support for Samsung S3C24xx S3C64xx ，选择 NAND support for Samsung S3C64xx S5P64xx

保存后退出然后 make uImage,烧写后运行如下：

Starting kernel ...


Uncompressing Linux... done, booting the kernel.
Booting Linux on physical CPU 0
Linux version 3.6.7 (root@ubuntu) (gcc version 4.5.1 (ctng-1.8.1-FA) ) #3 Mon Dec 3 21:15:19 CST 2012
CPU: ARMv6-compatible processor [410fb766] revision 6 (ARMv7), cr=00c5387d
CPU: PIPT / VIPT nonaliasing data cache, VIPT nonaliasing instruction cache
Machine: OK6410
Memory policy: ECC disabled, Data cache writeback
CPU S3C6410 (id 0x36410101)
S3C24XX Clocks, Copyright 2004 Simtec Electronics
camera: no parent clock specified
S3C64XX: PLL settings, A=533000000, M=533000000, E=24000000
S3C64XX: HCLK2=266500000, HCLK=133250000, PCLK=66625000
mout_apll: source is fout_apll (1), rate is 533000000
mout_epll: source is epll (1), rate is 24000000
mout_mpll: source is mpll (1), rate is 533000000
usb-bus-host: source is clk_48m (0), rate is 48000000
audio-bus: source is mout_epll (0), rate is 24000000
audio-bus: source is mout_epll (0), rate is 24000000
audio-bus: source is mout_epll (0), rate is 24000000
irda-bus: source is mout_epll (0), rate is 24000000
camera: no parent clock specified
CPU: found DTCM0 8k @ 00000000, not enabled
CPU: moved DTCM0 8k to fffe8000, enabled
CPU: found DTCM1 8k @ 00000000, not enabled
CPU: moved DTCM1 8k to fffea000, enabled
CPU: found ITCM0 8k @ 00000000, not enabled
CPU: moved ITCM0 8k to fffe0000, enabled
CPU: found ITCM1 8k @ 00000000, not enabled
CPU: moved ITCM1 8k to fffe2000, enabled
Built 1 zonelists in Zone order, mobility grouping on. Total pages: 65024
Kernel command line: noinitrd root=/dev/mtdblock2 rootfstype=yaffs2 init=/linuxrc console=ttySAC0,115200
PID hash table entries: 1024 (order: 0, 4096 bytes)
Dentry cache hash table entries: 32768 (order: 5, 131072 bytes)
Inode-cache hash table entries: 16384 (order: 4, 65536 bytes)
Memory: 256MB = 256MB total
Memory: 256772k/256772k available, 5372k reserved, 0K highmem
Virtual kernel memory layout:
vector : 0xffff0000 - 0xffff1000 ( 4 kB)
DTCM : 0xfffe8000 - 0xfffec000 ( 16 kB)
ITCM : 0xfffe0000 - 0xfffe4000 ( 16 kB)
fixmap : 0xfff00000 - 0xfffe0000 ( 896 kB)
vmalloc : 0xd0800000 - 0xff000000 ( 744 MB)
lowmem : 0xc0000000 - 0xd0000000 ( 256 MB)
modules : 0xbf000000 - 0xc0000000 ( 16 MB)
.text : 0xc0008000 - 0xc02828ec (2539 kB)
.init : 0xc0283000 - 0xc029db94 ( 107 kB)
.data : 0xc029e000 - 0xc02ca7c0 ( 178 kB)
.bss : 0xc02cb024 - 0xc02fc0c4 ( 197 kB)
SLUB: Genslabs=13, HWalign=32, Order=0-3, MinObjects=0, CPUs=1, Nodes=1
NR_IRQS:246
VIC @f6000000: id 0x00041192, vendor 0x41
VIC @f6010000: id 0x00041192, vendor 0x41
sched_clock: 32 bits at 100 Hz, resolution 10000000ns, wraps every 4294967286ms
Console: colour dummy device 80x30
Calibrating delay loop... 353.89 BogoMIPS (lpj=1769472)
pid_max: default: 32768 minimum: 301
Mount-cache hash table entries: 512
CPU: Testing write buffer coherency: ok
Setting up static identity map for 0x501ddc68 - 0x501ddcc4
DMA: preallocated 256 KiB pool for atomic coherent allocations
OK6410: Option string ok6410=0
OK6410: selected LCD display is 480x272
s3c64xx_dma_init: Registering DMA channels
PL080: IRQ 73, at d0846000, channels 0..8
PL080: IRQ 74, at d0848000, channels 8..16
S3C6410: Initialising architecture
bio: create slab at 0
usbcore: registered new interface driver usbfs
usbcore: registered new interface driver hub
usbcore: registered new device driver usb
ROMFS MTD (C) 2007 Red Hat, Inc.
io scheduler noop registered
io scheduler deadline registered
io scheduler cfq registered (default)
start plist test
end plist test
s3c-fb s3c-fb: window 0: fb
Serial: 8250/16550 driver, 4 ports, IRQ sharing disabled
s3c6400-uart.0: ttySAC0 at MMIO 0x7f005000 (irq = 69) is a S3C6400/10
console [ttySAC0] enabled
s3c6400-uart.1: ttySAC1 at MMIO 0x7f005400 (irq = 70) is a S3C6400/10
s3c6400-uart.2: ttySAC2 at MMIO 0x7f005800 (irq = 71) is a S3C6400/10
s3c6400-uart.3: ttySAC3 at MMIO 0x7f005c00 (irq = 72) is a S3C6400/10
brd: module loaded
loop: module loaded
S3C NAND Driver, (c) 2008 Samsung Electronics
NandFlash is busying.........
forlinx nandflash dev_id=d5
forlinx****Nandflash:ChipType= MLC ChipName=samsung-K9GAG08U0D************
S3C NAND Driver is using hardware ECC.
NAND device: Manufacturer ID: 0xec, Chip ID: 0xd5 (Samsung NAND 2GiB 3,3V 8-bit), page size: 4096, OOB size: 218
Driver must set ecc.strength when using hardware ECC
Creating 4 MTD partitions on "NAND 2GiB 3,3V 8-bit":
0x000000000000-0x000000200000 : "Bootloader"
0x000000200000-0x000000700000 : "Kernel"
0x000000700000-0x00000cf00000 : "File System"
0x00000cf00000-0x000080000000 : "User"
ohci_hcd: USB 1.1 'Open' Host Controller (OHCI) Driver
s3c2410-ohci s3c2410-ohci: S3C24XX OHCI
s3c2410-ohci s3c2410-ohci: new USB bus registered, assigned bus number 1
s3c2410-ohci s3c2410-ohci: irq 79, io mem 0x74300000
s3c2410-ohci s3c2410-ohci: init err (00000000 0000)
s3c2410-ohci s3c2410-ohci: can't start s3c24xx
s3c2410-ohci s3c2410-ohci: startup error -75
s3c2410-ohci s3c2410-ohci: USB bus 1 deregistered
s3c2410-ohci: probe of s3c2410-ohci failed with error -75
mousedev: PS/2 mouse device common for all mice
i2c /dev entries driver
sdhci: Secure Digital Host Controller Interface driver
sdhci: Copyright(c) Pierre Ossman
s3c-sdhci s3c-sdhci.0: clock source 0: mmc_busclk.0 (133250000 Hz)
s3c-sdhci s3c-sdhci.0: clock source 2: mmc_busclk.2 (24000000 Hz)
mmc0: SDHCI controller on samsung-hsmmc [s3c-sdhci.0] using ADMA
s3c-sdhci s3c-sdhci.1: clock source 0: mmc_busclk.0 (133250000 Hz)
s3c-sdhci s3c-sdhci.1: clock source 2: mmc_busclk.2 (24000000 Hz)
mmc0: mmc_rescan_try_freq: trying to init card at 400000 Hz
mmc0: mmc_rescan_try_freq: trying to init card at 300000 Hz
mmc1: SDHCI controller on samsung-hsmmc [s3c-sdhci.1] using ADMA
mmc0: mmc_rescan_try_freq: trying to init card at 200000 Hz
usbcore: registered new interface driver usbhid
usbhid: USB HID core driver
VFP support v0.3: implementor 41 architecture 1 part 20 variant b rev 5
drivers/rtc/hctosys.c: unable to open rtc device (rtc0)
VFS: Cannot open root device "mtdblock2" or unknown-block(0,0): error -19
Please append a correct "root=" boot option; here are the available partitions:
Kernel panic - not syncing: VFS: Unable to mount root fs on unknown-block(0,0)
[] (unwind_backtrace+0x0/0xf0) from [] (panic+0x8c/0x1dc)
[] (panic+0x8c/0x1dc) from [] (mount_block_root+0x1dc/0x2a0)
[] (mount_block_root+0x1dc/0x2a0) from [] (prepare_namespace+0x160/0x1b8)
[] (prepare_namespace+0x160/0x1b8) from [] (kernel_init+0x168/0x1b0)
[] (kernel_init+0x168/0x1b0) from [] (kernel_thread_exit+0x0/0x8)

可以看到红色部分表示NAND 驱动已经改好了。内核没有运行起来说明后面还缺少文件系统。

 s3c_nand.c.zip

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