MAKEFILE 示例

本人做的一个SD MODEL 的MAKFILE ，编译PLI的MAKEFILE

SYS_PLATFORM = unix
OSNAME = lnx86
CHIP = x86

SYS_ARCH_CC  = gcc
CC           = gcc
SYS_ARCH_LD_OPT=
SYS_ARCH_OPT =

SYS_ARCH_CC_LD_DYNAMIC = -shared
SYS_ARCH_LD_DYNAMIC    = -shared
NC_INST_DIR            =  /usr/tools/cadence/ldv

ARCH_RELOCATE_OPT = -fPIC
ARCH_DYNAMIC_LD = -shared
ARCH_SHARED_SUFFIX = so
ARCH_DEGUG_FLAG =

SYS_ARCH_OPT =
D_OPT = $(SYS_ARCH_OPT) $(D_GOPT) $(D_OSOPT)

SYS_ARCH_LD_STATIC = -Bstatic

SYS_ARCHDYNAMIC_LIBS =
SYS_ARCHSTATIC_LIBS =
SYS_ARCHLIBS= $(SYS_ARCHSTATIC_LIBS) $(SYS_ARCHDYNAMIC_LIBS)

SYS_ARCH_LDFLAGS =

SHELL = /bin/sh
MKDIR = mkdir
RM = rm -rf
DIFF = diff

VLOGCOMPILER = ncvlog
ELABORATOR = ncelab
SIMULATOR = ncsim

DEFAULT_LIBPATH = $(NC_INST_DIR)/tools/inca/lib:$(NC_INST_DIR)/tools/lib
 
EXPORT_LIB_PATH = LD_LIBRARY_PATH="../src:$(DEFAULT_LIBPATH)"; export LD_LIBRARY_PATH

SYS_ARCH_AR = ar cr
DYNAMIC_LIB_RULE = -o $(DYNAMIC_LIB)
OBJ_SUFFIX = o

####################################################################################
LIB = .
ROOT_INCL = $(NC_INST_DIR)/tools/include

SRC = .
OBJ = .
LIB = .
INCL = .
SP = -I$(INCL) -I$(ROOT_INCL)

IFLAGS = $(I_BASE)
CFLAGS = $(OPT) $(D_OPT)

STATIC_LIB =  $(LIB)/sd_pli.a
DYNAMIC_LIB = $(LIB)/sd_pli.$(ARCH_SHARED_SUFFIX)

TESTS_SRC = \
           $(SRC)/base.c\
           $(SRC)/CMD.c\
           $(SRC)/commandparam.c\
           $(SRC)/Sdmodel.c

TESTS_OBJ = \
           $(OBJ)/base.o \
           $(OBJ)/CMD.o  \
           $(OBJ)/commandparam.o  \
           $(OBJ)/Sdmodel.o  \

PUB_INC = \
          $(ROOT_INCL)/vpi_user_cds.h \
          $(ROOT_INCL)/vpi_user.h

### MAIN TARGETS
auto:realclean    build

build: $(DYNAMIC_LIB) $(STATIC_LIB)
 touch build

clean:
 \rm -f $(STATIC_LIB)
 \rm -f $(DYNAMIC_LIB)

realclean: clean
 \rm -f *~
 \rm -f $(TESTS_OBJ)
 \rm -f build

$(OBJ)/base.o: $(SRC)/base.c $(TESTS_INC) $(PUB_INC)
 $(CC) -c $(ARCH_RELOCATE_OPT) $(SRC)/base.c -o $(OBJ)/base.o $(CFLAGS) $(SP)
$(OBJ)/CMD.o: $(SRC)/CMD.c $(TESTS_INC) $(PUB_INC)
 $(CC) -c $(ARCH_RELOCATE_OPT) $(SRC)/CMD.c -o $(OBJ)/CMD.o $(CFLAGS) $(SP)
$(OBJ)/commandparam.o: $(SRC)/commandparam.c $(TESTS_INC) $(PUB_INC)
 $(CC) -c $(ARCH_RELOCATE_OPT) $(SRC)/commandparam.c -o $(OBJ)/commandparam.o $(CFLAGS) $(SP)
$(OBJ)/Sdmodel.o: $(SRC)/Sdmodel.c $(TESTS_INC) $(PUB_INC)
 $(CC) -c $(ARCH_RELOCATE_OPT) $(SRC)/Sdmodel.c -o $(OBJ)/Sdmodel.o $(CFLAGS) $(SP)

### OTHER TARGETS

$(STATIC_LIB): $(TESTS_OBJ)
 @\rm -f $(STATIC_LIB)
 $(SYS_ARCH_AR) $(STATIC_LIB) $(TESTS_OBJ)

$(DYNAMIC_LIB): $(TESTS_OBJ)
 @\rm -f $(DYNAMIC_LIB)
 $(LD) $(ARCH_DYNAMIC_LD) -o $(DYNAMIC_LIB) $(TESTS_OBJ)

 

 

NC仿真的MAKEFILE

###################################################
#
# These setting are project specific files and should
# not be altered unless necessary.
#
##################################################
.INGORE:

WORKDIR  = ../..
INC_DIR1  = ../../mdl/usb11
INC_DIR2  = ../../inc
INC_DIR3  = ../../mdl/flash/SF-M25P80_VG_10_50MHZ/

# RTL Source Code
MCUFILE  = $(WORKDIR)/hdl/v8051/v8051.files
USBFILE   = $(WORKDIR)/hdl/usb/usb.files
SCAFILE   = $(WORKDIR)/hdl/scalar/scalar.files
JPGFILE   = $(WORKDIR)/hdl/jpeg/jpeg.files
SPIFILE   = $(WORKDIR)/hdl/spi/spi.files
REGFILE   = $(WORKDIR)/hdl/reg/reg.files
FPGFILE   = $(WORKDIR)/hdl/top/top.files
MEMFILE   = $(WORKDIR)/hdl/mem_ctrl/mem.files
MMCFILE   = $(WORKDIR)/hdl/sd/sd.files
SLCFILE   = $(WORKDIR)/hdl/slcd/slcd.files
SCLFILE   = $(WORKDIR)/hdl/scalar/scalar.files
RTCFILE   = $(WORKDIR)/hdl/rtc/rtc.files
IRFILE    = $(WORKDIR)/hdl/ir/ir.files
LCDFILE   = $(WORKDIR)/hdl/lcd/lcd.files

# ANALOG MACROS
# All analog macros and library files will be described
# in $(WORKDIR)/lib/lib.files.

# External Behaviorals
USBHOSTFILE  = $(WORKDIR)/mdl/usb11/usb_host.files
USBPHYFILE   = $(WORKDIR)/lib/phy/xver.v
SPIFLASHFILE = $(WORKDIR)/mdl/flash/storage.files
# Test benches
TBFILE   = ./test.files
LOCALFILES = 

CORE_RTL_FILE =  -f $(MCUFILE) -f $(USBFILE) -f $(JPGFILE) -f $(REGFILE) -f $(SPIFILE) -f $(SCLFILE) -f $(SLCFILE)\
                  -f $(RTCFILE) -f $(IRFILE)  -f $(LCDFILE)
   
//SIMFILES =  ./test_bench.v ./sdmodel.v  $(CORE_RTL_FILE) -f $(USBHOSTFILE) -f $(USBPHYFILE) -f $(FPGFILE) -f $(SPIFLASHFILE) -f $(MEMFILE)\
//  -f $(MMCFILE)

SIMFILES =  ./test_bench.v ./sdmodel.v  $(CORE_RTL_FILE)  -f $(FPGFILE) -f $(SPIFLASHFILE) -f $(MEMFILE)\
  -f $(MMCFILE)

FINALFILES      =       ./test.h $(WORKDIR)/gate/final/cm3206.vpr \
   $(WORKDIR)/sim/common/sdf.v \
   -f $(EXTFILE) -f $(USBHOSTFILE) -f $(UARTFILE) \
   -f $(TBFILE)
FULLGATEFILES   =       ./test.h $(WORKDIR)/gate/fullgate/cm3206.vg \
   $(WORKDIR)/sim/common/sdf.v \
   -f $(EXTFILE) -f $(USBHOSTFILE) -f $(UARTFILE) \
   -f $(TBFILE)

# define the library source
LIBSRC1         =       $(WORKDIR)/lib/lib.files
LIBSRC2         =       $(WORKDIR)/lib/altera/lpm/altera_lpm_beh.v
LIBSRC3  = $(WORKDIR)/lib/altera/verilog/altera_mf_beh.v
//LIBSRC  = -f $(LIBSRC1) -v $(LIBSRC2) -v $(LIBSRC3) +libext+.v+
LIBSRC      = -f $(LIBSRC1) +libext+.v+

# DUMP_START defines the time verilog simulator starts to dump waveform
# DUMP_LENGTH defines the duration verilog simulator will dump waveform
#    if DUMP_LENGTH=0, simulator will dump until simulation completes
# DUMP_LEVEL is the number of levels simulator is going to dump
DUMPOPT  = +debug +define+DEBUSSY_DUMP +ncelabargs+"-access +r"

DUMPOPTLOCAL = +define+DUMP_START="0000000" \
   +define+DUMP_LENGTH="000000" \
   +define+DUMP_LEVEL="0" \

# comment the first line and uncomment the second line will have simualtor
# stop dump waveform file
DUMPON  = +define+DUMP_ON
#DUMPON    =  

# If you still have anything to be defined, list them here.
# If you want to define something before the RTL code, define them
#   in the file test.h.
LOCALDEFS = +"Speed-Up-Sim" +"PLL-No-Jitter" +define+SD +incdir+$(INC_DIR1) +incdir+$(INC_DIR2) +incdir+$(INC_DIR3)\
            +define+BOOT_FROM_32K

RTLDEFS  = +notimingchecks +bus_conflict_off +define+notovi +update +define+BULK_OUT +define+USB_SIM +define+NOSPI +define+SPIFLASH
GATEDEFS = +neg_tchk +define+notovi +bus_conflict_off +no_notifier +update

 

NC_INST_DIR_        =/usr/tools/cadence/ldv
DEFAULT_LIBPATH = $(NC_INST_DIR_)/tools/inca/lib:$(NC_INST_DIR_)/tools/lib
EXPORT_LIB_PATH = LD_LIBRARY_PATH="./pli:$(DEFAULT_LIBPATH)";export LD_LIBRARY_PATH

LOADPLI        =  +loadpli1=./pli/sd_pli.so:my_bootstrap

TEST_TARGETS    = compile elaborate simulate verify

SHELL = /bin/sh
MKDIR = mkdir
RM = rm -rf
DIFF = diff
WORK_LIB        = ncvlog_lib
VLOGCOMPILER    = ncvlog
ELABORATOR      = ncelab
SIMULATOR       = ncsim
DESIGN_TOPS     = $(WORK_LIB).test_bench

SNAPSHOT_NAME   = $(WORK_LIB).ncvlog_lib:ncvlog_lib
COMP_OPTIONS    = -MESSAGES -REDUCE_MESSAGES -NOCOPYRIGHT -LOGFILE ncvlog.log
ELAB_OPTIONS    = -MESSAGES -REDUCE_MESSAGES -NOCOPYRIGHT -ACCWARN -LIBNAME ncvlog_lib -LOGFILE ncelab.log
SIM_OPTIONS     = -MESSAGES -REDUCE_MESSAGES -NOCOPYRIGHT -ACCWARN -RUN -LOGFILE ncsim.log

VLOG_FILES      =  $(SIMFILES)  -f $(LIBSRC1)
auto: realclean setup compile elaborate simulate

deb:
 debussy $(SIMFILES) $(RTLDEFS) $(LOCALDEFS) $(LIBSRC)     \
 $(DUMPOPT) $(DUMPOPTLOCAL) $(DUMPON) -2001

 

setup:
 -$(MKDIR) $(WORK_LIB)

compile:
 -$(VLOGCOMPILER) $(COMP_OPTIONS) $(VLOG_FILES) -DEFINE  SD    -INCDIR $(INC_DIR1)\
 -INCDIR $(INC_DIR2) -INCDIR $(INC_DIR3) -DEFINE SPIFLASH -DEFINE BOOT_FROM_32K

elaborate:
 -$(EXPORT_LIB_PATH); $(ELABORATOR) $(ELAB_OPTIONS) $(DESIGN_TOPS) -SNAPSHOT $(SNAPSHOT_NAME)

simulate:
 -$(EXPORT_LIB_PATH); $(SIMULATOR) $(SIM_OPTIONS) $(SNAPSHOT_NAME)

realclean: clean
clean:
 -$(RM) $(WORK_LIB) *.df *.log *~

ncxl:
 ncxlmode $(SIMFILES)  \
 +define+NCXL $(LOADPLI)\
 $(LIBSRC) $(RTLDEFS) $(LOCALDEFS)   \
 $(DUMPOPT) $(DUMPOPTLOCAL) $(DUMPON)  \
 -l ncxlmode.log