#include "at91sam9261reg.h"
.global CloseWatchDog
.global InitPMC
.global Led
.global InitDbug
.global PutChar
.global InitSdram
.global InitNandFlash
.global LdNand
.global PutByteHex
CloseWatchDog:
@disable WatchDog
ldr r0,=AT91SAM926X_PA_WDTC
mov r1,#(1 << 15)
str r1,[r0,#WDTC_WDMR]
mov pc,lr
InitPMC:
@PCK & MCK
ldr r0,=AT91SAM926X_PA_PMC
ldr r1,=0x701
str r1,[r0,#PMC_MOR]
0:
ldr r1,[r0,#PMC_SR]
tst r1,#1
beq 0b
ldr r1,=((1 << 29) | (64 << 16) | (2 << 14) | (0x3f << 8) |6)
str r1,[r0,#PMC_PLLAR]
0:
ldr r1,[r0,#PMC_SR]
tst r1,#2
beq 0b
ldr r1,=0x102
str r1,[r0,#PMC_MCKR]
0:
ldr r1,[r0,#PMC_SR]
tst r1,#8
beq 0b
mov pc,lr
Led:
@Test Led
str r1,[r0,#PIO_PER]
str r1,[r0,#PIO_OER]
str r1,[r0,#PIO_CODR]
mov pc,lr
InitDbug:
@Debug Unit (UART)
@EnablePIO
ldr r0,=AT91SAM926X_PA_PIOA
mov r1,#(3 << 9)
str r1,[r0,#PIO_PDR]
str r1,[r0,#PIO_ASR]
@Debug
ldr r0,=AT91SAM926X_PA_DBGU
mov r1,#(5 << 4)
str r1,[r0,#US_CR]
mov r1,#(1 << 11)
str r1,[r0,#US_MR]
mov r1,#54 @MCK/16/115200
str r1,[r0,#US_BRGR]
mov pc,lr
InitSdram:
ldr r2,=SDRAM_BASE
@Bus Matrix & chip select
ldr r0,=AT91SAM926X_PA_MATRIX
ldr r1,[r0,#MATRIX_EBICSA]
orr r1,r1,#(1 << 1)
str r1,[r0,#MATRIX_EBICSA]
@Enable PIO
ldr r0,=AT91SAM926X_PA_PIOC
ldr r1,=0xffff0000
str r1,[r0,#PIO_PDR]
str r1,[r0,#PIO_ASR]
@Init config SDRAM Register
ldr r0,=AT91SAM926X_PA_SDRAMC
ldr r1,=0x85227279
str r1,[r0,#SDRAMC_CR]
mov r1,#0
str r1,[r0,#SDRAMC_MDR]
mov r1,#0x4f00
0:
subs r1,r1,#1
bne 0b
mov r1,#1
str r1,[r0,#SDRAMC_MR]
str r1,[r2]
mov r1,#2
str r1,[r0,#SDRAMC_MR]
str r1,[r2]
mov r1,#4
str r1,[r0,#SDRAMC_MR]
0:
str r1,[r2]
add r1,r1,#1
cmp r1,#12
bne 0b
mov r1,#3
str r1,[r0,#SDRAMC_MR]
str r1,[r2]
mov r1,#0
str r1,[r0,#SDRAMC_MR]
str r1,[r2]
ldr r1,=1562
str r1,[r0,#SDRAMC_TR]
mov pc,lr
InitNandFlash:
@matrtx ebi_cix & chip select
ldr r0,=AT91SAM926X_PA_MATRIX
ldr r1,[r0,#MATRIX_EBICSA]
orr r1,r1,#(1 << 3)
str r1,[r0,#MATRIX_EBICSA]
@InitSMC
ldr r0, =AT91SAM926X_PA_SMC
mov r1, #0
str r1, [r0, #SMC_SETUP(3)]
ldr r1, =(4 | (6 << 8) | (3 << 16) | (5 << 24))
str r1, [r0, #SMC_PULSE(3)]
ldr r1, =(6 | (5 << 16))
str r1, [r0, #SMC_CYCLE(3)]
ldr r1, =(1 | (1 << 1) | (1 << 16))
str r1, [r0, #SMC_MODE(3)]
@Enable PIOC_PMC
ldr r0, =AT91SAM926X_PA_PMC
mov r1, #(1 << 4)
str r1, [r0, #PMC_PCER]
@InitPIO
ldr r0,=AT91SAM926X_PA_PIOC
mov r1,#3
str r1,[r0,#PIO_PDR]
str r1,[r0,#PIO_ASR]
mov r1,#(1 << 15)
str r1,[r0,#PIO_PER]
str r1,[r0,#PIO_ODR]
str r1,[r0,#PIO_PUER]
mov r1,#(1 << 14)
str r1,[r0,#PIO_PER]
str r1,[r0,#PIO_OER]
str r1,[r0,#PIO_CODR]
mov pc,lr
LdNand:
mov r0,#AT91SAM926X_PA_NAND
mov r1,#SDRAM_BH_BASE
mov r2,#0x00
loop0:
add r3,r0,#NAND_CMMD
mov r4,#0x00
strb r4,[r3]
add r3,r0,#NAND_ADDR
mov r4,#0x00
strb r4,[r3]
mov r4,r2
strb r4,[r3]
mov r4,r2,lsr #8
strb r4,[r3]
mov r4,r2,lsr #16
strb r4,[r3]
0:
ldr r3,=(AT91SAM926X_PA_PIOC + PIO_PDSR)
ldr r4,[r3]
tst r4,#(1 << 15)
beq 0b
mov r3,#512
0:
ldrb r4,[r0,#NAND_DATA]
strb r4,[r1],#1
sub r3,r3,#1
cmp r3,#0
bne 0b
add r2,r2,#1
cmp r2,#200
bcc loop0
ldr pc,=SDRAM_BH_BASE
PutChar:
stmfd sp!,{r1,r2,lr}
ldr r1,=AT91SAM926X_PA_DBGU
0:
ldr r2,[r1,#US_CSR]
tst r2,#2
beq 0b
strb r0,[r1,#US_THR]
ldmfd sp!,{r1,r2,pc}
PutByteHex:
stmfd sp!,{r4,lr}
mov r4,r0
and r0,r0,#0xff
mov r0,r0,lsr #4
cmp r0,#10
addcc r0,r0,#48
addcs r0,r0,#87
bl PutChar
mov r0,r4
and r0,r0,#0xf
cmp r0,#10
addcc r0,r0,#48
addcs r0,r0,#87
bl PutChar
ldmfd sp!,{r4,pc}
