ks8695的启动代码

############################################################
# MODULE: Makefile
#
# PURPOSE:
# This file is used to compiler the basic initialization.
#
# COPYRIGHT (C) 2000-2001, CoreTek Systems Inc.
# ALL RIGHTS RESERVED
############################################################
# AUTHOR(S): Kernel_Group
#
# DATE CREATED: 2001/03/29
#
# MODIFICATIONS:
# Date userName Description
#
############################################################

CC=dcore-gcc
AS=dcore-as
LD=dcore-ld
CFLAGS=-c -Wall -I. -Wa,-EL
ASFLAGS=-I. -EL
LDFLAGS=-oformat elf32-littlearm -format elf32-littlearm -r

all:crt0.o
rm -rf crt1.o vectors.o

crt0.o:crt1.o vectors.o
${LD} ${LDFLAGS} -o crt0.o crt1.o vectors.o

crt1.o: crt0.S
${AS} ${ASFLAGS} -o crt1.o crt0.S

vectors.o: vectors.S
${AS} ${ASFLAGS} -o vectors.o vectors.S



clean:
rm -rf *.o

crt0.s

@ Some standard definitions...

.equ Mode_USR, 0x10
.equ Mode_FIQ, 0x11
.equ Mode_IRQ, 0x12
.equ Mode_SVC, 0x13
.equ Mode_ABT, 0x17
.equ Mode_ABORT, 0x17
.equ Mode_UNDEF, 0x1B
.equ Mode_SYS, 0x1F @ only available on ARM Arch. v4

.equ I_Bit, 0x80
.equ F_Bit, 0x40


.extern _bss_start,_bss_end /*It's defined at IDE development evenment*/
.extern _lmain
.globl _start
/*
* EntryPoint code
*/
_start:
/*
* set the cpu to SVC32 mode
*/
mrs r0,cpsr
bic r0,r0,#0x1f
orr r0,r0,#0xd3
msr cpsr,r0

bl cpu_init_crit /*跳到初始化CPU及重映射内存部份*/
/*
*我认为，重定位代码已经不必要了，在映射内存之时应该搞定
*至此，假设内存映射已经按照表中设置
*/
/* 设置系统堆栈及用户栈 */
@ initialize IRQ, FIQ interrupt stack

mov r0, #Mode_IRQ | I_Bit | F_Bit @ No interrupts
msr cpsr, r0
ldr sp, = _irq_stack_top

mov r0, #Mode_FIQ | I_Bit | F_Bit @ No interrupts
msr cpsr, r0
ldr sp, = _fiq_stack_top

@ build the stack
mov r0, #Mode_SYS | I_Bit | F_Bit @ No interrupts
msr cpsr, r0
ldr sp,=_stack_top

mov r0, #0x6000
mov r1, #0x6000
mov r2, #0x6000
stmdb sp!, {r0, r1, r2}
bl lmain /*Jump into lmain loader.*/

/*
*DELAY_FOR 宏定义，定义总线周期延迟操作宏
*/
.macro DELAY_FOR cycles, reg0
ldr \reg0, =\cycles
subs \reg0, \reg0, #1
subne pc, pc, #0xc
.endm


/*CPU init　执行板级初始化代码，关掉MMU清指令及数据CACHE，并在重定位之前应该执行内存地址及FLASH地址的重映射
*根据UBOOT本身的代码进行融合，将lowlevelinit.s及start.s整合到一个文件之中
*/
cpu_init_crit:
/*
* flush v4 I/D caches
*/
mov r0, #0
mcr p15, 0, r0, c7, c7, 0 /* flush v3/v4 cache */
mcr p15, 0, r0, c8, c7, 0 /* flush v4 TLB */

/*
* disable MMU stuff and caches
*/
mrc p15, 0, r0, c1, c0, 0
bic r0, r0, #0x00002300 @ clear bits 13, 9:8 (--V- --RS)
bic r0, r0, #0x00000087 @ clear bits 7, 2:0 (B--- -CAM)
orr r0, r0, #0x00000002 @ set bit 2 (A) Align
orr r0, r0, #0x00001000 @ set bit 12 (I) I-Cache
mcr p15, 0, r0, c1, c0, 0

/*
* before relocating, we have to setup RAM timing
* because memory timing is board-dependend, you will
* find a lowlevel_init.S in your board directory.
*/
mov ip, lr
bl lowlevel_init /*跳到板级初始化代码部份*/
mov lr, ip
mov pc, lr


lowlevel_init:
ldr r1,=(0x03FF0000+0xE01C)
ldr r2,=(0x28B)
str r2,[r1]
ldr r1,=(0x03FF0000+0xE00C)
mov r2,#0x03
str r2,[r1]
ldr r1, =(0x03FF0000+0xE004)
mov r2, #0x41
str r2, [r1] /* write 'A' */
/*
* 我想利用指令预取功能，重映射后仍然在这里执行
* ram from address 0, and flash at 32MB.
* Flash bank 0: start address 0x01000000 end address 0x011FFFFF 2M flash size
*/
ldr r1, =(0x03FF0000+0x4010)
ldr r2, =0x43d0007c /*0x43d0007c--1M flash 0x41d0007c--512K flash*/
ldr r3,=(highflash+0x01000000)
str r2, [r1] /* large flash map */
mov pc,r3
highflash:

/*
*我们的系统只有一块flash，不需要重映射其它寄存器
*/

/*
* before relocating, we have to setup RAM timing
* SDRAM bank 0 address: startaddress-0x00000000 endaddress-0x0x0080000
*/
ldr r1, =(0x03FF0000+0x4030)
ldr r2, =0x1fc0000c /* 8MB 32bit 0x1fc0000e 16bit 0x1fc0000c
2MB 16bit 0x07c0000c */
str r2, [r1] /* configure sdram bank0 setup */

ldr r1, =(0x03FF0000+0x4034)
mov r2, #0
str r2, [r1] /* configure sdram bank1 setup */

ldr r1, =(0x03FF0000+0x4038)
ldr r2, =0x0000000a /* 0x00000005 (RAS-CAS 2 CAS-DATA 2)*/
str r2, [r1] /* set RAS/CAS timing */

ldr r1, =(0x03FF0000+0x403c)
ldr r2, =0x00030000
str r2, [r1] /* send NOP command */
DELAY_FOR 0x200, r0
ldr r2, =0x00010000
str r2, [r1] /* send PRECHARGE-ALL */
DELAY_FOR 0x200, r0

ldr r1, =(0x03FF0000+0x4040)
ldr r2, =0x00000020
str r2, [r1] /* set for fast refresh */
DELAY_FOR 0x100, r0
ldr r2, =360
str r2, [r1] /* set normal refresh timing */

ldr r1, =(0x03FF0000+0x403c)
ldr r2, =0x00020037
str r2, [r1] /* send mode command */
DELAY_FOR 0x100, r0
ldr r2, =0x01f00000 /*For Test two sdram bank . 0x1b00000 , it should be 0x1f00000*/
str r2, [r1] /* enable sdram fifos */

/*
* set pll to top speed
*/
ldr r1, =(0x03FF0000+0x0004)
mov r2, #0
str r2, [r1] /* set pll clock to 166 sysclk=100MMHz */

ldr r1, =(0x03FF0000+0xE800)
ldr r2, [r1] /* Get switch ctrl0 register */
and r2, r2, #0x0fc00000 /* Mask out LED control bits */
orr r2, r2, #0x01800000 /* Set Link/activity/speed actions */
str r2, [r1]


/*重定位代码后拷贝内存到原始映射的FLASH地址,然后仍然跳回去运行*/
ldr r0, =(0x1000000)
ldr r1, =(0x0000000)
ldr r2, =(0x1001000)
copy_loop:
ldmia r0!, {r3-r10} /* copy from source address [r0] */
stmia r1!, {r3-r10} /* copy to target address [r1] */
cmp r0, r2 /* until source end addreee [r2] */
ble copy_loop

mov pc, lr

@############################################################
@# MODULE: vectors.S
@#
@# PURPOSE:
@# This file contains the vector table of snds100
@#
@# COPYRIGHT (C) 2000-2001, CoreTek Systems Inc.
@# ALL RIGHTS RESERVED
@############################################################
@# AUTHOR(S): Kernel_Group
@#
@# DATE CREATED: 2001/03/29
@#
@# MODIFICATIONS:
@# Date userName Description
@#
@############################################################

.equ I_Bit, 0x80
.equ F_Bit, 0x40
.equ Mode_SVC, 0x13

@ standard exception vectors table Must be located at address 0

.section ".vectors","ax"
Vector_Init_Block:
LDR PC, Reset_Addr
LDR PC, Undefined_Addr
LDR PC, SWI_Addr
LDR PC, Prefetch_Addr
LDR PC, Abort_Addr
NOP
LDR PC, IRQ_Addr
LDR PC, FIQ_Addr
.balign 0x100
.globl Reset_Addr
Reset_Addr: .long _start
Undefined_Addr: .long Undefined_Handler
SWI_Addr: .long SWI_Handler
Prefetch_Addr: .long Prefetch_Handler
Abort_Addr: .long Abort_Handler
Unknown_Addr: .long Unknow_handler
IRQ_Addr: .long IRQ_Handler
FIQ_Addr: .long FIQ_Handler
IRQ_shared_Addr:.long IRQ_Handler_shared
FIQ_shared_Addr:.long FIQ_Handler_shared

.text

@ The following handlers do not do anything useful

.globl Undefined_Handler
Undefined_Handler:
b Undefined_Handler
.globl SWI_Handler
SWI_Handler:
b SWI_Handler
.globl Prefetch_Handler
Prefetch_Handler:
b Prefetch_Handler
.globl Abort_Handler
Abort_Handler:
b Abort_Handler
.globl Unknow_handler
Unknow_handler:
b Unknow_handler
.globl IRQ_Handler
IRQ_Handler:
b IRQ_Handler
.globl FIQ_Handler
FIQ_Handler:
b FIQ_Handler
.globl IRQ_Handler_shared
IRQ_Handler_shared:
b IRQ_Handler_shared
.globl FIQ_Handler_shared
FIQ_Handler_shared:
b FIQ_Handler_shared

.end