Chinaunix首页 | 论坛 | 博客
  • 博客访问: 1165910
  • 博文数量: 173
  • 博客积分: 4048
  • 博客等级:
  • 技术积分: 2679
  • 用 户 组: 普通用户
  • 注册时间: 2010-09-12 18:53
文章分类

全部博文(173)

文章存档

2018年(1)

2016年(1)

2013年(1)

2012年(118)

2011年(52)

分类: 嵌入式

2012-02-29 14:52:59

Altera recommends the following method of building and updating the descriptor
list:

1. Build the descriptor list and terminate the list with a non-hardware owned
descriptor (OWNED_BY_HW = 0). The list can be arbitrarily long.

2. Set the interrupt IE_CHAIN_COMPLETED.

3. Write the address of the first descriptor in the first list to the
next_descriptor_pointer register and set the RUN bit to 1 to initiate transfers.

4. While the core is processing the first list, build a second list of descriptors.

5. When the SD-DMA controller core finishes processing the first list, an interrupt is
generated. Update the next_descriptor_pointer register with the address of
the first descriptor in the second list. Clear the RUN bit and the status register. Set
the RUN bit back to 1 to resume transfers.

6. If there are new descriptors to add, always add them to the list which the core is
not processing. For example, if the core is processing the first list, add new
descriptors to the second list and so forth.

This method ensures that the descriptors are not updated when the core is processing
them. Because the method requires a response to the interrupt, a high-latency
interrupt may cause a problem in systems where stalling data movement is not
possible.

阅读(2070) | 评论(0) | 转发(0) |
给主人留下些什么吧!~~