oprofile: available events for CPU type "AMD64 family10"
DISPATCHED_FPU_OPS: (counter: all)
Dispatched FPU ops (min count: 500)
Unit masks (default 0x3f)
----------
0x01: Add pipe ops excluding load ops and SSE move ops
0x02: Multiply pipe ops excluding load ops and SSE move ops
0x04: Store pipe ops excluding load ops and SSE move ops
0x08: Add pipe load ops and SSE move ops
0x10: Multiply pipe load ops and SSE move ops
0x20: Store pipe load ops and SSE move ops
0x3f: All ops
CYCLES_FPU_EMPTY: (counter: all)
The number of cycles in which the PFU is empty (min count: 500)
DISPATCHED_FPU_OPS_FAST_FLAG: (counter: all)
The number of FPU operations that use the fast flag interface (min count: 500)
RETIRED_SSE_OPS: (counter: all)
The number of SSE ops or uops retired (min count: 500)
Unit masks (default 0x7f)
----------
0x01: Single Precision add/subtract ops
0x02: Single precision multiply ops
0x04: Single precision divide/square root ops
0x08: Double precision add/subtract ops
0x10: Double precision multiply ops
0x20: Double precision divide/square root ops
0x40: OP type: 0=uops 1=FLOPS
RETIRED_MOVE_OPS: (counter: all)
The number of move uops retired (min count: 500)
Unit masks (default 0xf)
----------
0x01: Merging low quadword move uops
0x02: Merging high quadword move uops
0x04: All other merging move uops
0x08: All other move uops
RETIRED_SERIALIZING_OPS: (counter: all)
The number of serializing uops retired. (min count: 500)
Unit masks (default 0xf)
----------
0x01: SSE bottom-executing uops retired
0x02: SSE bottom-serializing uops retired
0x04: x87 bottom-executing uops retired
0x08: x87 bottom-serializing uops retired
SERIAL_UOPS_IN_FP_SCHED: (counter: all)
Number of cycles a serializing uop is in the FP scheduler (min count: 500)
Unit masks (default 0x3)
----------
0x01: Number of cycles a bottom-execute uops in FP scheduler
0x02: Number of cycles a bottom-serializing uops in FP scheduler
SEGMENT_REGISTER_LOADS: (counter: all)
Segment register loads (min count: 500)
Unit masks (default 0x7f)
----------
0x01: ES register
0x02: CS register
0x04: SS register
0x08: DS register
0x10: FS register
0x20: GS register
0x40: HS register
PIPELINE_RESTART_DUE_TO_SELF_MODIFYING_CODE: (counter: all)
Micro-architectural re-sync caused by self modifying code (min count: 500)
PIPELINE_RESTART_DUE_TO_PROBE_HIT: (counter: all)
Micro-architectural re-sync caused by snoop (min count: 500)
LS_BUFFER_2_FULL_CYCLES: (counter: all)
Cycles LS Buffer 2 Full (min count: 500)
LOCKED_OPS: (counter: all)
Locked operations (min count: 500)
Unit masks (default 0xf)
----------
0x01: Number of locked instructions executed
0x02: Cycles in speculative phase
0x04: Cycles in non-speculative phase (including cache miss penalty)
0x08: Cache miss penalty in cycles
RETIRED_CLFLUSH_INSTRUCTIONS: (counter: all)
Retired CLFLUSH instructions (min count: 500)
RETIRED_CPUID_INSTRUCTIONS: (counter: all)
Retired CPUID instructions (min count: 500)
CANCELLED_STORE_TO_LOAD: (counter: all)
Counts the number of cancelled store to load forward operations (min count: 500)
Unit masks (default 0x7)
----------
0x01: Address mismatches (starting byte not the same)
0x02: Store is smaller than load
0x04: Misaligned
SMIS_RECEIVED: (counter: all)
Counts the number of SMIs received by the processor (min count: 500)
DATA_CACHE_ACCESSES: (counter: all)
Data cache accesses (min count: 500)
DATA_CACHE_MISSES: (counter: all)
Data cache misses (min count: 500)
DATA_CACHE_REFILLS_FROM_L2_OR_NORTHBRIDGE: (counter: all)
Data cache refills from L2 or Northbridge (min count: 500)
Unit masks (default 0x1e)
----------
0x01: Refill from northbridge
0x02: Shared-state line from L2
0x04: Exclusive-state line from L2
0x08: Owner-state line from L2
0x10: Modified-state line from L2
0x1e: All cache states except refill from northbridge
DATA_CACHE_REFILLS_FROM_NORTHBRIDGE: (counter: all)
Data cache refills from Northbridge (min count: 500)
Unit masks (default 0x1f)
----------
0x01: (I)nvalid cache state
0x02: (S)hared cache state
0x04: (E)xclusive cache state
0x08: (O)wner cache state
0x10: (M)odified cache state
0x1f: All cache states
DATA_CACHE_LINES_EVICTED: (counter: all)
Data cache lines evicted (min count: 500)
Unit masks (default 0x1f)
----------
0x01: (I)nvalid cache state
0x02: (S)hared cache state
0x04: (E)xclusive cache state
0x08: (O)wner cache state
0x10: (M)odified cache state
0x20: Cache line evicted brought into the cache by PrefetchNTA
0x40: Cache line evicted not brought into the cache by PrefetchNTA
L1_DTLB_MISS_AND_L2_DTLB_HIT: (counter: all)
L1 DTLB miss and L2 DTLB hit (min count: 500)
Unit masks (default 0x3)
----------
0x01: L2 4K TLB hit
0x02: L2 2M TLB hit
L1_DTLB_AND_L2_DTLB_MISS: (counter: all)
L1 DTLB and L2 DTLB miss (min count: 500)
Unit masks (default 0x7)
----------
0x01: 4K TLB reload
0x02: 2M TLB reload
0x04: 1G TLB reload
MISALIGNED_ACCESSES: (counter: all)
Misaligned Accesses (min count: 500)
MICRO_ARCH_LATE_CANCEL_ACCESS: (counter: all)
Microarchitectural late cancel of an access (min count: 500)
MICRO_ARCH_EARLY_CANCEL_ACCESS: (counter: all)
Microarchitectural early cancel of an access (min count: 500)
1_BIT_ECC_ERRORS: (counter: all)
Single-bit ECC errors recorded by scrubber (min count: 500)
Unit masks (default 0xf)
----------
0x01: Scrubber error
0x02: Piggyback scrubber errors
0x04: Load pipe error
0x08: Store write pip error
PREFETCH_INSTRUCTIONS_DISPATCHED: (counter: all)
The number of prefetch instructions dispatched by the decoder (min count: 500)
Unit masks (default 0x7)
----------
0x01: Load (Prefetch, PrefetchT0/T1/T2)
0x02: Store (PrefetchW)
0x04: NTA (PrefetchNTA)
LOCKED_INSTRUCTIONS_DCACHE_MISSES: (counter: all)
The number of dta cache misses by locked instructions. (min count: 500)
Unit masks (default 0x2)
----------
0x02: Data cache misses by locked instructions
L1_DTLB_HIT: (counter: all)
L1 DTLB hit (min count: 500)
Unit masks (default 0x7)
----------
0x01: L1 4K TLB hit
0x02: L1 2M TLB hit
0x04: L1 1G TLB hit
INEFFECTIVE_SW_PREFETCHES: (counter: all)
Number of software prefetches that did not fetch data outside of processor core (min count: 500)
Unit masks (default 0x9)
----------
0x01: Software prefetch hit in L1
0x08: Software prefetch hit in L2
GLOBAL_TLB_FLUSHES: (counter: all)
The number of global TLB flushes (min count: 500)
MEMORY_REQUESTS: (counter: all)
Memory requests by type (min count: 500)
Unit masks (default 0x83)
----------
0x01: Requests to non-cacheable (UC) memory
0x02: Requests to write-combining (WC) memory or WC buffer flushes to WB memory
0x80: Streaming store (SS) requests
DATA_PREFETCHES: (counter: all)
Data prefetcher (min count: 500)
Unit masks (default 0x3)
----------
0x01: Cancelled prefetches
0x02: Prefetch attempts
NORTHBRIDGE_READ_RESPONSES: (counter: all)
Northbridge read responses by coherency state (min count: 500)
Unit masks (default 0x17)
----------
0x01: Exclusive
0x02: Modified
0x04: Shared
0x10: Data Error
OCTWORD_WRITE_TRANSFERS: (counter: all)
Octwords written to system (min count: 500)
Unit masks (default 0x1)
----------
0x01: Octword write transfer
CPU_CLK_UNHALTED: (counter: all)
Cycles outside of halt state (min count: 3000)
REQUESTS_TO_L2: (counter: all)
Requests to L2 Cache (min count: 500)
Unit masks (default 0x3f)
----------
0x01: IC fill
0x02: DC fill
0x04: TLB fill (page table walks)
0x08: Tag snoop request
0x10: Canceled request
0x20: Hardware prefetch from data cache
L2_CACHE_MISS: (counter: all)
L2 cache misses (min count: 500)
Unit masks (default 0xf)
----------
0x01: IC fill
0x02: DC fill (includes possible replays)
0x04: TLB page table walk
0x08: Hardware prefetch from data cache
L2_CACHE_FILL_WRITEBACK: (counter: all)
L2 fill/writeback (min count: 500)
Unit masks (default 0x3)
----------
0x01: L2 fills (victims from L1 caches, TLB page table walks and data prefetches)
0x02: L2 writebacks to system
INSTRUCTION_CACHE_FETCHES: (counter: all)
Instruction cache fetches (RevE) (min count: 500)
INSTRUCTION_CACHE_MISSES: (counter: all)
Instruction cache misses (min count: 500)
INSTRUCTION_CACHE_REFILLS_FROM_L2: (counter: all)
Instruction cache refills from L2 (min count: 500)
INSTRUCTION_CACHE_REFILLS_FROM_SYSTEM: (counter: all)
Instruction cache refills from system (min count: 500)
L1_ITLB_MISS_AND_L2_ITLB_HIT: (counter: all)
L1 ITLB miss and L2 ITLB hit (min count: 500)
L1_ITLB_MISS_AND_L2_ITLB_MISS: (counter: all)
L1 ITLB miss and L2 ITLB miss (min count: 500)
Unit masks (default 0x3)
----------
0x01: Instruction fetches to a 4K page
0x02: Instruction fetches to a 2M page
PIPELINE_RESTART_DUE_TO_INSTRUCTION_STREAM_PROBE: (counter: all)
Pipeline restart due to instruction stream probe (min count: 500)
INSTRUCTION_FETCH_STALL: (counter: all)
Instruction fetch stall (min count: 500)
RETURN_STACK_HITS: (counter: all)
Return stack hit (min count: 500)
RETURN_STACK_OVERFLOWS: (counter: all)
Return stack overflow (min count: 500)
INSTRUCTION_CACHE_VICTIMS: (counter: all)
Number of instruction cache lines evicticed to the L2 cache (min count: 500)
INSTRUCTION_CACHE_INVALIDATED: (counter: all)
Instruction cache lines invalidated (min count: 500)
Unit masks (default 0xf)
----------
0x01: Invalidating probe that did not hit any in-flight instructions
0x02: Invalidating probe that hit one or more in-flight instructions
0x04: SMC that did not hit any in-flight instructions
0x08: SMC that hit one or more in-flight instructions
ITLB_RELOADS: (counter: all)
The number of ITLB reloads requests (min count: 500)
ITLB_RELOADS_ABORTED: (counter: all)
The number of ITLB reloads aborted (min count: 500)
RETIRED_INSTRUCTIONS: (counter: all)
Retired instructions (includes exceptions, interrupts, re-syncs) (min count: 3000)
RETIRED_UOPS: (counter: all)
Retired micro-ops (min count: 500)
RETIRED_BRANCH_INSTRUCTIONS: (counter: all)
Retired branches (conditional, unconditional, exceptions, interrupts) (min count: 500)
RETIRED_MISPREDICTED_BRANCH_INSTRUCTIONS: (counter: all)
Retired mispredicted branch instructions (min count: 500)
RETIRED_TAKEN_BRANCH_INSTRUCTIONS: (counter: all)
Retired taken branch instructions (min count: 500)
RETIRED_TAKEN_BRANCH_INSTRUCTIONS_MISPREDICTED: (counter: all)
Retired taken branches mispredicted (min count: 500)
RETIRED_FAR_CONTROL_TRANSFERS: (counter: all)
Retired far control transfers (min count: 500)
RETIRED_BRANCH_RESYNCS: (counter: all)
Retired branches resyncs (only non-control transfer branches) (min count: 500)
RETIRED_NEAR_RETURNS: (counter: all)
Retired near returns (min count: 500)
RETIRED_NEAR_RETURNS_MISPREDICTED: (counter: all)
Retired near returns mispredicted (min count: 500)
RETIRED_INDIRECT_BRANCHES_MISPREDICTED: (counter: all)
Retired indirect branches mispredicted (min count: 500)
RETIRED_MMX_FP_INSTRUCTIONS: (counter: all)
Retired MMX/FP instructions (min count: 500)
Unit masks (default 0x7)
----------
0x01: x87 instructions
0x02: MMX & 3DNow instructions
0x04: SSE & SSE2 instructions
RETIRED_FASTPATH_DOUBLE_OP_INSTRUCTIONS: (counter: all)
Retired FastPath double-op instructions (min count: 500)
Unit masks (default 0x7)
----------
0x01: With low op in position 0
0x02: With low op in position 1
0x04: With low op in position 2
INTERRUPTS_MASKED_CYCLES: (counter: all)
Cycles with interrupts masked (IF=0) (min count: 500)
INTERRUPTS_MASKED_CYCLES_WITH_INTERRUPT_PENDING: (counter: all)
Cycles with interrupts masked while interrupt pending (min count: 500)
INTERRUPTS_TAKEN: (counter: all)
Number of taken hardware interrupts (min count: 10)
DECODER_EMPTY: (counter: all)
Nothing to dispatch (decoder empty) (min count: 500)
DISPATCH_STALLS: (counter: all)
Dispatch stalls (min count: 500)
DISPATCH_STALL_FOR_BRANCH_ABORT: (counter: all)
Dispatch stall from branch abort to retire (min count: 500)
DISPATCH_STALL_FOR_SERIALIZATION: (counter: all)
Dispatch stall for serialization (min count: 500)
DISPATCH_STALL_FOR_SEGMENT_LOAD: (counter: all)
Dispatch stall for segment load (min count: 500)
DISPATCH_STALL_FOR_REORDER_BUFFER_FULL: (counter: all)
Dispatch stall for reorder buffer full (min count: 500)
DISPATCH_STALL_FOR_RESERVATION_STATION_FULL: (counter: all)
Dispatch stall when reservation stations are full (min count: 500)
DISPATCH_STALL_FOR_FPU_FULL: (counter: all)
Dispatch stall when FPU is full (min count: 500)
DISPATCH_STALL_FOR_LS_FULL: (counter: all)
Dispatch stall when LS is full (min count: 500)
DISPATCH_STALL_WAITING_FOR_ALL_QUIET: (counter: all)
Dispatch stall when waiting for all to be quiet (min count: 500)
DISPATCH_STALL_FOR_FAR_TRANSFER_OR_RESYNC: (counter: all)
Dispatch Stall for Far Transfer or Resync to Retire (min count: 500)
FPU_EXCEPTIONS: (counter: all)
FPU exceptions (min count: 1)
Unit masks (default 0xf)
----------
0x01: x87 reclass microfaults
0x02: SSE retype microfaults
0x04: SSE reclass microfaults
0x08: SSE and x87 microtraps
DR0_BREAKPOINTS: (counter: all)
The number of matches on the address in breakpoint register DR0 (min count: 1)
DR1_BREAKPOINTS: (counter: all)
The number of matches on the address in breakpoint register DR1 (min count: 1)
DR2_BREAKPOINTS: (counter: all)
The number of matches on the address in breakpoint register DR2 (min count: 1)
DR3_BREAKPOINTS: (counter: all)
The number of matches on the address in breakpoint register DR3 (min count: 1)
DRAM_ACCESSES: (counter: all)
DRAM accesses (min count: 500)
Unit masks (default 0xff)
----------
0x01: DCT0 Page hit
0x02: DCT0 Page miss
0x04: DCT0 Page conflict
0x08: DCT1 Page hit
0x10: DCT1 Page miss
0x20: DCT1 Page Conflict
0x40: Write request
0x80: Read request
MEMORY_CONTROLLER_PAGE_TABLE_OVERFLOWS: (counter: all)
Memory controller page table overflows (min count: 500)
Unit masks (default 0x3)
----------
0x01: DCT0 Page Table Overflow
0x02: DCT1 Page Table Overflow
MEMORY_CONTROLLER_SLOT_MISSED: (counter: all)
Memory controller DRAM command slots missed (min count: 500)
Unit masks (default 0x3)
----------
0x01: DCT0 Command slots missed
0x02: DCT2 Command slots missed
MEMORY_CONTROLLER_TURNAROUNDS: (counter: all)
Memory controller turnarounds (min count: 500)
Unit masks (default 0x3f)
----------
0x01: DCT0 DIMM (chip select) turnaround
0x02: DCT0 Read to write turnaround
0x04: DCT0 Write to read turnaround
0x08: DCT1 DIMM (chip select) turnaround
0x10: DCT1 Read to write turnaround
0x20: DCT1 Write to read turnaround
MEMORY_CONTROLLER_BYPASS_COUNTER_SATURATION: (counter: all)
Memory controller bypass saturation (min count: 500)
Unit masks (default 0xf)
----------
0x01: Memory controller high priority bypass
0x02: Memory controller medium priority bypass
0x04: DCT0 DCQ bypass
0x08: DCT1 DCQ bypass
THERMAL_STATUS: (counter: all)
Thermal status (min count: 500)
Unit masks (default 0x7c)
----------
0x04: Number of times the HTC trip point is crossed
0x08: Number of clocks when STC trip point active
0x10: Number of times the STC trip point is crossed
0x20: Number of clocks HTC P-state is inactive
0x40: Number of clocks HTC P-state is active
CPU_IO_REQUESTS_TO_MEMORY_IO: (counter: all)
CPU/IO Requests to Memory/IO (min count: 500)
Unit masks (default 0xa2)
----------
0xa1: Requests Local I/O to Local I/O
0xa2: Requests Local I/O to Local Memory
0xa3: Requests Local I/O to Local (I/O or Mem)
0xa4: Requests Local CPU to Local I/O
0xa5: Requests Local (CPU or I/O) to Local I/O
0xa8: Requests Local CPU to Local Memory
0xaa: Requests Local (CPU or I/O) to Local Memory
0xac: Requests Local CPU to Local (I/O or Mem)
0xaf: Requests Local (CPU or I/O) to Local (I/O or Mem)
0x91: Requests Local I/O to Remote I/O
0x92: Requests Local I/O to Remote Memory
0x93: Requests Local I/O to Remote (I/O or Mem)
0x94: Requests Local CPU to Remote I/O
0x95: Requests Local (CPU or I/O) to Remote I/O
0x98: Requests Local CPU to Remote Memory
0x9a: Requests Local (CPU or I/O) to Remote Memory
0x9c: Requests Local CPU to Remote (I/O or Mem)
0x9f: Requests Local (CPU or I/O) to Remote (I/O or Mem)
0xb1: Requests Local I/O to Any I/O
0xb2: Requests Local I/O to Any Memory
0xb3: Requests Local I/O to Any (I/O or Mem)
0xb4: Requests Local CPU to Any I/O
0xb5: Requests Local (CPU or I/O) to Any I/O
0xb8: Requests Local CPU to Any Memory
0xba: Requests Local (CPU or I/O) to Any Memory
0xbc: Requests Local CPU to Any (I/O or Mem)
0xbf: Requests Local (CPU or I/O) to Any (I/O or Mem)
0x61: Requests Remote I/O to Local I/O
0x64: Requests Remote CPU to Local I/O
0x65: Requests Remote (CPU or I/O) to Local I/O
CACHE_BLOCK_COMMANDS: (counter: all)
Cache block commands (min count: 500)
Unit masks (default 0x3d)
----------
0x01: Victim Block (Writeback)
0x04: Read Block (Dcache load miss refill)
0x08: Read Block Shared (Icache refill)
0x10: Read Block Modified (Dcache store miss refill)
0x20: Change to Dirty (first store to clean block already in cache)
SIZED_COMMANDS: (counter: all)
Sized commands (min count: 500)
Unit masks (default 0x3f)
----------
0x01: Non-posted write byte (1-32 bytes)
0x02: Non-posted write DWORD (1-16 DWORDs)
0x04: Posted write byte (1-32 bytes)
0x08: Posted write DWORD (1-16 DWORDs)
0x10: Read byte (4 bytes)
0x20: Read DWORD (1-16 DWORDs)
PROBE_RESPONSES_AND_UPSTREAM_REQUESTS: (counter: all)
Probe responses and upstream requests (min count: 500)
Unit masks (default 0xff)
----------
0x01: Probe miss
0x02: Probe hit clean
0x04: Probe hit dirty without memory cancel
0x08: Probe hit dirty with memory cancel
0x10: Upstream display refresh/ISOC reads
0x20: Upstream non-display refresh reads
0x40: Upstream ISOC writes
0x80: Upstream non-ISOC writes
GART_EVENTS: (counter: all)
GART events (min count: 500)
Unit masks (default 0xff)
----------
0x01: GART aperture hit on access from CPU
0x02: GART aperture hit on access from I/O
0x04: GART miss
0x08: GART/DEV request hit table walk in progress
0x10: DEV hit
0x20: DEV miss
0x40: DEV error
0x80: GART/DEV multiple table walk in progress
MEMORY_CONTROLLER_REQUESTS: (counter: all)
Sized read/write activity. (min count: 500)
Unit masks (default 0x78)
----------
0x01: Write requests
0x02: Read Requests including Prefetch
0x04: Prefetch Request
0x08: 32 Bytes Sized Writes
0x10: 64 Bytes Sized Writes
0x20: 32 Bytes Sized Reads
0x40: 64 Byte Sized Reads
0x80: Read requests sent to the DCT while write requests are pending in the DCQ
CPU_DRAM_REQUEST_TO_NODE: (counter: all)
CPU to DRAM requests to target node (min count: 500)
Unit masks (default 0xff)
----------
0x01: From local node to node 0
0x02: From local node to node 1
0x04: From local node to node 2
0x08: From local node to node 3
0x10: From local node to node 4
0x20: From local node to node 5
0x40: From local node to node 6
0x80: From local node to node 7
IO_DRAM_REQUEST_TO_NODE: (counter: all)
IO to DRAM requests to target node (min count: 500)
Unit masks (default 0xff)
----------
0x01: From local node to node 0
0x02: From local node to node 1
0x04: From local node to node 2
0x08: From local node to node 3
0x10: From local node to node 4
0x20: From local node to node 5
0x40: From local node to node 6
0x80: From local node to node 7
CPU_READ_COMMAND_LATENCY_NODE_0_3: (counter: all)
Latency between the local node and remote node (min count: 500)
Unit masks (default 0xff)
----------
0x01: Read block
0x02: Read block shared
0x04: Read block modified
0x08: Change to Dirty
0x10: From local node to node 0
0x20: From local node to node 1
0x40: From local node to node 2
0x80: From local node to node 3
CPU_READ_COMMAND_REQUEST_NODE_0_3: (counter: all)
Number of requests that a latency measurement is made for Event 0x1E2 (min count: 500)
Unit masks (default 0xff)
----------
0x01: Read block
0x02: Read block shared
0x04: Read block modified
0x08: Change to Dirty
0x10: From local node to node 0
0x20: From local node to node 1
0x40: From local node to node 2
0x80: From local node to node 3
CPU_READ_COMMAND_LATENCY_NODE_4_7: (counter: all)
Latency between the local node and remote node (min count: 500)
Unit masks (default 0xff)
----------
0x01: Read block
0x02: Read block shared
0x04: Read block modified
0x08: Change to Dirty
0x10: From local node to node 4
0x20: From local node to node 5
0x40: From local node to node 6
0x80: From local node to node 7
CPU_READ_COMMAND_REQUEST_NODE_4_7: (counter: all)
Number of requests that a latency measurement is made for Event 0x1E2 (min count: 500)
Unit masks (default 0xff)
----------
0x01: Read block
0x02: Read block shared
0x04: Read block modified
0x08: Change to Dirty
0x10: From local node to node 4
0x20: From local node to node 5
0x40: From local node to node 6
0x80: From local node to node 7
CPU_COMMAND_LATENCY_TARGET: (counter: all)
Determine latency between the local node and a remote node. (min count: 500)
Unit masks (default 0xf7)
----------
0x01: Read sized
0x02: Write sized
0x04: Victim block
0x08: Node group select: 0=Nodes 0-3, 1=Nodes 4-7
0x10: From local node to node 0/4
0x20: From local node to node 1/5
0x40: From local node to node 2/6
0x80: From local node to node 3/7
CPU_REQUEST_TARGET: (counter: all)
Number of requests that a latency measurement is made for Event 0x1E6 (min count: 500)
Unit masks (default 0xf7)
----------
0x01: Read sized
0x02: Write sized
0x04: Victim block
0x08: Node group select: 0=Nodes 0-3, 1=Nodes 4-7
0x10: From local node to node 0/4
0x20: From local node to node 1/5
0x40: From local node to node 2/6
0x80: From local node to node 3/7
HYPERTRANSPORT_LINK0_TRANSMIT_BANDWIDTH: (counter: all)
HyperTransport(tm) link 0 transmit bandwidth (min count: 500)
Unit masks (default 0xbf)
----------
0x01: Command DWORD sent
0x02: Data DWORD sent
0x04: Buffer release DWORD sent
0x08: Nop DW sent (idle)
0x10: Address extension DWORD sent
0x20: Per packet CRC sent
0x80: SubLink Mask
HYPERTRANSPORT_LINK1_TRANSMIT_BANDWIDTH: (counter: all)
HyperTransport(tm) link 1 transmit bandwidth (min count: 500)
Unit masks (default 0xbf)
----------
0x01: Command DWORD sent
0x02: Data DWORD sent
0x04: Buffer release DWORD sent
0x08: Nop DW sent (idle)
0x10: Address extension DWORD sent
0x20: Per packet CRC sent
0x80: SubLink Mask
HYPERTRANSPORT_LINK2_TRANSMIT_BANDWIDTH: (counter: all)
HyperTransport(tm) link 2 transmit bandwidth (min count: 500)
Unit masks (default 0xbf)
----------
0x01: Command DWORD sent
0x02: Data DWORD sent
0x04: Buffer release DWORD sent
0x08: Nop DW sent (idle)
0x10: Address extension DWORD sent
0x20: Per packet CRC sent
0x80: SubLink Mask
HYPERTRANSPORT_LINK3_TRANSMIT_BANDWIDTH: (counter: all)
HyperTransport(tm) link 3 transmit bandwidth (min count: 500)
Unit masks (default 0xbf)
----------
0x01: Command DWORD sent
0x02: Data DWORD sent
0x04: Buffer release DWORD sent
0x08: Nop DW sent (idle)
0x10: Address extension DWORD sent
0x20: Per packet CRC sent
0x80: SubLink Mask
READ_REQUEST_L3_CACHE: (counter: all)
Number of read requests from each core to L3 cache (min count: 500)
Unit masks (default 0xf7)
----------
0x01: Read block Exclusive (Data cache read)
0x02: Read block Shared (Instruciton cache read)
0x04: Read block Modify
0x10: Core 0 select
0x20: Core 1 select
0x40: Core 2 select
0x80: Core 3 select
L3_CACHE_MISSES: (counter: all)
Number of L3 cache misses from each core (min count: 500)
Unit masks (default 0xf7)
----------
0x01: Read block Exclusive (Data cache read)
0x02: Read block Shared (Instruciton cache read)
0x04: Read block Modify
0x10: Core 0 select
0x20: Core 1 select
0x40: Core 2 select
0x80: Core 3 select
L3_FILLS_CAUSED_BY_L2_EVICTIONS: (counter: all)
Number of L3 fills caused by L2 evictions per core (min count: 500)
Unit masks (default 0xff)
----------
0x01: Shared
0x02: Exclusive
0x04: Owned
0x08: Modified
0x10: Core 0 select
0x20: Core 1 select
0x40: Core 2 select
0x80: Core 3 select
L3_EVICTIONS: (counter: all)
Number of L3 cache line evictions by cache state (min count: 500)
Unit masks (default 0xf)
----------
0x01: Shared
0x02: Exclusive
0x04: Owned
0x08: Modified
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