分类： LINUX
2011-01-03 03:32:05
1. Initialize the receive descriptor and status array to receive frames from the Ethernet connection.
2. Enable the receive datapath in the MAC1 register and the control register.
3. When the RxEnable bit in the command register is set, the Rx DMA Manager reads the descriptors from memory at the address determined by RxDescriptor and RxProduceIndex.
4. After reading the descriptor, the receive DMA engine waits for the MAC to return receive data from the (R)MII interface that passes the receive buffer. Once a frame passes the receive buffer, the data is written in the fragment buffer associated with the descriptor.
5. After receiving a fragment, the Rx DMA Manager writes status information back to StausInfo and StatusHashCRC word of the status array.
- If the descriptor is for the last fragment of a frame (or for the whole frame is there are no fragments), then depending on the success or failure of the frame reception, error flags(Error, No Descriptor, Overrun, Alignment Error, RangeError, LengthError, SymbolError, or CRCError) are set in StatusInfo.
- The hash CRCs of the destination and source address of a packet are calculated once for all the fragments belonging to the same packet and then stored in every StatusHashCRC word of the statuses associated with the corresponding fragment.
The Ethernet block writes the size in bytes of a descriptor’s fragment buffer in the RxSize field of the status word.
6. Update the RxProduceIndex after the fragment data and the fragment status information has been committed to memory.
7. The device driver can read the descriptors that have been handed over to it by the hardware.
8. The device driver inspects the status words in the status array to check for multi-fragment receptions and receive errors.
9. The device driver can forward receive data and status to upper software layers.
10. After processing of data and status, the descriptors, statuses and data buffers may be recycled and handed back to hardware by incrementing the xConsumeIndex.
