分类: 嵌入式
2009-12-19 10:15:32
ADD r0, r1, r2 ―― r0 := r1 + r2 SUB r0, r1, r2 ―― r0 := r1 - r2 |
ADD r3, r3, #1 ―― r3 := r3 + 1 |
ADD r3, r2, r1, LSL #3 ―― r3 := r2 + 8.r1 |
AND r0, r1, r2 ―― r0 := r1 and r2 ORR r0, r1, r2 ―― r0 := r1 or r2 EOR r0, r1, r2 ―― r0 := r1 xor r2 BIC r0, r1, r2 ―― r0 := r1 and not r2 |
MOV r0, r2 ―― r0 := r2 MVN r0, r2 ―― r0 := not r2 |
CMP r1, r2 ―― set cc on r1 - r2 CMN r1, r2 ―― set cc on r1 + r2 TST r1, r2 ―― set cc on r1 and r2 TEQ r1, r2 ―― set cc on r1 or r2 |
LDR r0, [r1] ―― r0 := mem [r1] STR r0, [r1] ―― mem [r1] := r0 LDR r0, [r1, #4] ―― r0 := mem [r1+4] LDR r0, [r1, #4] ! ―― r0 := mem [r1+4] r1 := r1 + 4 LDR r0, [r1], #4 ―― r0 := mem [r1] r1 := r1 +4 LDRB r0 , [r1] ―― r0 := mem8 [r1] LDMIA r1, {r0, r2, r5} ―― r0 := mem [r1] r2 := mem [r1+4] r5 := mem [r1+8] |
MOV r0, #0 ; initialize counter LOOP: ADD r0, r0, #1 ; increment counter CMP r0, #10 ; compare with limit BNE LOOP ; repeat if not equal |
CMP r0, #5 ADDNE r1, r1, r0 SUBNE r1, r1, r2 ―― if (r0 != 5) { r1 := r1 + r0 - r2 } |
@ 0x00: Reset b Reset @ 0x04: Undefined instruction exception UndefEntryPoint: b HandleUndef @ 0x08: Software interrupt exception SWIEntryPoint: b HandleSWI @ 0x0c: Prefetch Abort (Instruction Fetch Memory Abort) PrefetchAbortEnteryPoint: b HandlePrefetchAbort @ 0x10: Data Access Memory Abort DataAbortEntryPoint: b HandleDataAbort @ 0x14: Not used NotUsedEntryPoint: b HandleNotUsed @ 0x18: IRQ(Interrupt Request) exception IRQEntryPoint: b HandleIRQ @ 0x1c: FIQ(Fast Interrupt Request) exception FIQEntryPoint: b HandleFIQ |
Reset: @ disable watch dog timer mov r1, #0x53000000 mov r2, #0x0 str r2, [r1] @ disable all interrupts mov r1, #INT_CTL_BASE mov r2, #0xffffffff str r2, [r1, #oINTMSK] ldr r2, =0x7ff str r2, [r1, #oINTSUBMSK] |
@init clk @ 1:2:4 mov r1, #CLK_CTL_BASE mov r2, #0x3 str r2, [r1, #oCLKDIVN] mrc p15, 0, r1, c1, c0, 0 @ read ctrl register orr r1, r1, #0xc0000000 @ Asynchronous mcr p15, 0, r1, c1, c0, 0 @ write ctrl register @ now, CPU clock is 200 Mhz mov r1, #CLK_CTL_BASE ldr r2, mpll_200mhz str r2, [r1, #oMPLLCON] |
@ All LED on mov r1, #GPIO_CTL_BASE add r1, r1, #oGPIO_F ldr r2,=0x55aa str r2, [r1, #oGPIO_CON] mov r2, #0xff str r2, [r1, #oGPIO_UP] mov r2, #0x00 str r2, [r1, #oGPIO_DAT] |
ENTRY(memsetup) @ initialise the static memory @ set memory control registers mov r1, #MEM_CTL_BASE adrl r2, mem_cfg_val add r3, r1, #52 1: ldr r4, [r2], #4 str r4, [r1], #4 cmp r1, r3 bne 1b mov pc, lr |
@ set GPIO for UART mov r1, #GPIO_CTL_BASE add r1, r1, #oGPIO_H ldr r2, gpio_con_uart str r2, [r1, #oGPIO_CON] ldr r2, gpio_up_uart str r2, [r1, #oGPIO_UP] bl InitUART @ Initialize UART @ @ r0 = number of UART port InitUART: ldr r1, SerBase mov r2, #0x0 str r2, [r1, #oUFCON] str r2, [r1, #oUMCON] mov r2, #0x3 str r2, [r1, #oULCON] ldr r2, =0x245 str r2, [r1, #oUCON] #define UART_BRD ((50000000 / (UART_BAUD_RATE * 16)) - 1) mov r2, #UART_BRD str r2, [r1, #oUBRDIV] mov r3, #100 mov r2, #0x0 1: sub r3, r3, #0x1 tst r2, r3 bne 1b #if 0 mov r2, #'U' str r2, [r1, #oUTXHL] 1: ldr r3, [r1, #oUTRSTAT] and r3, r3, #UTRSTAT_TX_EMPTY tst r3, #UTRSTAT_TX_EMPTY bne 1b mov r2, #'0' str r2, [r1, #oUTXHL] 1: ldr r3, [r1, #oUTRSTAT] and r3, r3, #UTRSTAT_TX_EMPTY tst r3, #UTRSTAT_TX_EMPTY bne 1b #endif mov pc, lr |
@ PrintChar : prints the character in R0 @ r0 contains the character @ r1 contains base of serial port @ writes ro with XXX, modifies r0,r1,r2 @ TODO : write ro with XXX reg to error handling PrintChar: TXBusy: ldr r2, [r1, #oUTRSTAT] and r2, r2, #UTRSTAT_TX_EMPTY tst r2, #UTRSTAT_TX_EMPTY beq TXBusy str r0, [r1, #oUTXHL] mov pc, lr @ PrintWord : prints the 4 characters in R0 @ r0 contains the binary word @ r1 contains the base of the serial port @ writes ro with XXX, modifies r0,r1,r2 @ TODO : write ro with XXX reg to error handling PrintWord: mov r3, r0 mov r4, lr bl PrintChar mov r0, r3, LSR #8 /* shift word right 8 bits */ bl PrintChar mov r0, r3, LSR #16 /* shift word right 16 bits */ bl PrintChar mov r0, r3, LSR #24 /* shift word right 24 bits */ bl PrintChar mov r0, #'\r' bl PrintChar mov r0, #'\n' bl PrintChar mov pc, r4 @ PrintHexWord : prints the 4 bytes in R0 as 8 hex ascii characters @ followed by a newline @ r0 contains the binary word @ r1 contains the base of the serial port @ writes ro with XXX, modifies r0,r1,r2 @ TODO : write ro with XXX reg to error handling PrintHexWord: mov r4, lr mov r3, r0 mov r0, r3, LSR #28 bl PrintHexNibble mov r0, r3, LSR #24 bl PrintHexNibble mov r0, r3, LSR #20 bl PrintHexNibble mov r0, r3, LSR #16 bl PrintHexNibble mov r0, r3, LSR #12 bl PrintHexNibble mov r0, r3, LSR #8 bl PrintHexNibble mov r0, r3, LSR #4 bl PrintHexNibble mov r0, r3 bl PrintHexNibble mov r0, #'\r' bl PrintChar mov r0, #'\n' bl PrintChar mov pc, r4 |
#ifdef CONFIG_S3C2410_NAND_BOOT bl copy_myself @ jump to ram ldr r1, =on_the_ram add pc, r1, #0 nop nop 1: b 1b @ infinite loop #ifdef CONFIG_S3C2410_NAND_BOOT @ @ copy_myself: copy vivi to ram @ copy_myself: mov r10, lr @ reset NAND mov r1, #NAND_CTL_BASE ldr r2, =0xf830 @ initial value str r2, [r1, #oNFCONF] ldr r2, [r1, #oNFCONF] bic r2, r2, #0x800 @ enable chip str r2, [r1, #oNFCONF] mov r2, #0xff @ RESET command strb r2, [r1, #oNFCMD] mov r3, #0 @ wait 1: add r3, r3, #0x1 cmp r3, #0xa blt 1b 2: ldr r2, [r1, #oNFSTAT] @ wait ready tst r2, #0x1 beq 2b ldr r2, [r1, #oNFCONF] orr r2, r2, #0x800 @ disable chip str r2, [r1, #oNFCONF] @ get read to call C functions (for nand_read()) ldr sp, DW_STACK_START @ setup stack pointer mov fp, #0 @ no previous frame, so fp=0 @ copy vivi to RAM ldr r0, =VIVI_RAM_BASE mov r1, #0x0 mov r2, #0x20000 bl nand_read_ll tst r0, #0x0 beq ok_nand_read #ifdef CONFIG_DEBUG_LL bad_nand_read: ldr r0, STR_FAIL ldr r1, SerBase bl PrintWord 1: b 1b @ infinite loop #endif ok_nand_read: #ifdef CONFIG_DEBUG_LL ldr r0, STR_OK ldr r1, SerBase bl PrintWord #endif @ verify mov r0, #0 ldr r1, =0x33f00000 mov r2, #0x400 @ 4 bytes * 1024 = 4K-bytes go_next: ldr r3, [r0], #4 ldr r4, [r1], #4 teq r3, r4 bne notmatch subs r2, r2, #4 beq done_nand_read bne go_next notmatch: #ifdef CONFIG_DEBUG_LL sub r0, r0, #4 ldr r1, SerBase bl PrintHexWord ldr r0, STR_FAIL ldr r1, SerBase bl PrintWord #endif 1: b 1b done_nand_read: #ifdef CONFIG_DEBUG_LL ldr r0, STR_OK ldr r1, SerBase bl PrintWord #endif mov pc, r10 @ clear memory @ r0: start address @ r1: length mem_clear: mov r2, #0 mov r3, r2 mov r4, r2 mov r5, r2 mov r6, r2 mov r7, r2 mov r8, r2 mov r9, r2 clear_loop: stmia r0!, {r2-r9} subs r1, r1, #(8 * 4) bne clear_loop mov pc, lr #endif @ CONFIG_S3C2410_NAND_BOOT |
@ get read to call C functions ldr sp, DW_STACK_START @ setup stack pointer mov fp, #0 @ no previous frame, so fp=0 mov a2, #0 @ set argv to NULL bl main @ call main mov pc, #FLASH_BASE @ otherwise, reboot |
int main(int argc, char *argv[]) { int ret; /* * Step 1: */ putstr("\r\n"); putstr(vivi_banner); reset_handler(); /* * Step 2: */ ret = board_init(); if (ret) { putstr("Failed a board_init() procedure\r\n"); error(); } /* * Step 3: */ mem_map_init(); mmu_init(); putstr("Succeed memory mapping.\r\n"); /* * Now, vivi is running on the ram. MMU is enabled. */ /* * Step 4: */ /* initialize the heap area*/ ret = heap_init(); if (ret) { putstr("Failed initailizing heap region\r\n"); error(); } /* Step 5: */ ret = mtd_dev_init(); /* Step 6: */ init_priv_data(); /* Step 7: */ misc(); init_builtin_cmds(); /* Step 8: */ boot_or_vivi(); return 0; } |
const char *vivi_banner = "VIVI version " VIVI_RELEASE " (" VIVI_COMPILE_BY "@" VIVI_COMPILE_HOST ") (" VIVI_COMPILER ") " UTS_VERSION "\r\n"; |
void reset_handler(void) { int pressed; pressed = is_pressed_pw_btn(); if (pressed == PWBT_PRESS_LEVEL) { DPRINTK("HARD RESET\r\n"); hard_reset_handle(); } else { DPRINTK("SOFT RESET\r\n"); soft_reset_handle(); } } |
static void hard_reset_handle(void) { clear_mem((unsigned long)USER_RAM_BASE, (unsigned long)USER_RAM_SIZE); } |
int board_init(void) { init_time(); set_gpios(); return 0; } |
void mem_map_init(void) { #ifdef CONFIG_S3C2410_NAND_BOOT mem_map_nand_boot(); #else mem_map_nor(); #endif cache_clean_invalidate(); tlb_invalidate(); } |
static inline void arm920_setup(void) { unsigned long ttb = MMU_TABLE_BASE; __asm__( /* Invalidate caches */ "mov r0, #0\n" "mcr p15, 0, r0, c7, c7, 0\n" /* invalidate I,D caches on v4 */ "mcr p15, 0, r0, c7, c10, 4\n" /* drain write buffer on v4 */ "mcr p15, 0, r0, c8, c7, 0\n" /* invalidate I,D TLBs on v4 */ /* Load page table pointer */ "mov r4, %0\n" "mcr p15, 0, r4, c2, c0, 0\n" /* load page table pointer */ /* Write domain id (cp15_r3) */ "mvn r0, #0\n" /* Domains 0, 1 = client */ "mcr p15, 0, r0, c3, c0, 0\n" /* load domain access register */ /* Set control register v4 */ "mrc p15, 0, r0, c1, c0, 0\n" /* get control register v4 */ /* Clear out 'unwanted' bits (then put them in if we need them) */ /* .RVI ..RS B... .CAM */ "bic r0, r0, #0x3000\n" /* ..11 .... .... .... */ "bic r0, r0, #0x0300\n" /* .... ..11 .... .... */ "bic r0, r0, #0x0087\n" /* .... .... 1... .111 */ /* Turn on what we want */ /* Fault checking enabled */ "orr r0, r0, #0x0002\n" /* .... .... .... ..1. */ #ifdef CONFIG_CPU_D_CACHE_ON "orr r0, r0, #0x0004\n" /* .... .... .... .1.. */ #endif #ifdef CONFIG_CPU_I_CACHE_ON "orr r0, r0, #0x1000\n" /* ...1 .... .... .... */ #endif /* MMU enabled */ "orr r0, r0, #0x0001\n" /* .... .... .... ...1 */ "mcr p15, 0, r0, c1, c0, 0\n" /* write control register */ : /* no outputs */ : "r" (ttb) ); } |
#define DEFAULT_BOOT_DELAY 0x30000000 void boot_or_vivi(void) { char c; int ret; ulong boot_delay; boot_delay = get_param_value("boot_delay", &ret); if (ret) boot_delay = DEFAULT_BOOT_DELAY; /* If a value of boot_delay is zero, * unconditionally call vivi shell */ if (boot_delay == 0) vivi_shell(); /* * wait for a keystroke (or a button press if you want.) */ printk("Press Return to start the LINUX now, any other key for vivi\n"); c = awaitkey(boot_delay, NULL); if (((c != '\r') && (c != '\n') && (c != '\0'))) { printk("type \"help\" for help.\n"); vivi_shell(); } run_autoboot(); return; } |
void vivi_shell(void) { #ifdef CONFIG_SERIAL_TERM serial_term(); #else #error there is no terminal. #endif } void serial_term(void) { char cmd_buf[MAX_CMDBUF_SIZE]; for (;;) { printk("%s> ", prompt); getcmd(cmd_buf, MAX_CMDBUF_SIZE); /* execute a user command */ if (cmd_buf[0]) exec_string(cmd_buf); } } |
SECTIONS { . = 0x40000000; .text : { *(.text) } Image_RO_Limit = .; Image_RW_Base = .; .data : { *(.data) } .rodata : { *(.rodata) } Image_ZI_Base = .; .bss : { *(.bss) } Image_ZI_Limit = .; __bss_start__ = .; __bss_end__ = .; __EH_FRAME_BEGIN__ = .; __EH_FRAME_END__ = .; PROVIDE (__stack = .); end = .; _end = .; .debug_info 0 : { *(.debug_info) } .debug_line 0 : { *(.debug_line) } .debug_abbrev 0 : { *(.debug_abbrev)} .debug_frame 0 : { *(.debug_frame) } } |