.globl _start
_start: b start_code
ldr pc, _undefined_instruction
ldr pc, _software_interrupt
ldr pc, _prefetch_abort
ldr pc, _data_abort
ldr pc, _not_used
ldr pc, _irq
ldr pc, _fiq
_undefined_instruction: .word undefined_instruction
_software_interrupt: .word software_interrupt
_prefetch_abort: .word prefetch_abort
_data_abort: .word data_abort
_not_used: .word not_used
_irq: .word irq
_fiq: .word fiq
.balignl 16,0xdeadbeef
_TEXT_BASE:
.word TEXT_BASE
.globl _armboot_start
_armboot_start:
.word _start
/*
* These are defined in the board-specific linker script.
*/
.globl _bss_start
_bss_start:
.word __bss_start
.globl _bss_end
_bss_end:
.word _end
#ifdef CONFIG_USE_IRQ
/* IRQ stack memory (calculated at run-time) */
.globl IRQ_STACK_START
IRQ_STACK_START:
.word 0x0badc0de
/* IRQ stack memory (calculated at run-time) */
.globl FIQ_STACK_START
FIQ_STACK_START:
.word 0x0badc0de
#endif
/*
* the actual start code
*/
start_code:
/*
* set the cpu to SVC32 mode
*/
mrs r0, cpsr
bic r0, r0, #0x1f
orr r0, r0, #0xd3
msr cpsr, r0
@ bl coloured_LED_init /*1,---------modify------------*/
@ bl red_LED_on /*2,---------modify------------*/
#if defined(CONFIG_AT91RM9200DK) || defined(CONFIG_AT91RM9200EK)
/*
* relocate exception table
*/
ldr r0, =_start
ldr r1, =0x0
mov r2, #16
copyex:
subs r2, r2, #1
ldr r3, [r0], #4
str r3, [r1], #4
bne copyex
#endif
#if defined(CONFIG_S3C2400) || defined(CONFIG_S3C2440) /*3,CONFIG_S3C2410 --> CONFIG_S3C2440*/
/* turn off the watchdog */
# if defined(CONFIG_S3C2400)
# define pWTCON 0x15300000
# define INTMSK 0x14400008 /* Interupt-Controller base addresses */
# define CLKDIVN 0x14800014 /* clock divisor register */
#else
# define pWTCON 0x53000000
# define INTMSK 0x4A000008 /* Interupt-Controller base addresses */
# define INTSUBMSK 0x4A00001C
# define CLKDIVN 0x4C000014 /* clock divisor register */
# endif
ldr r0, =pWTCON
mov r1, #0x0
str r1, [r0]
/*
* mask all IRQs by setting all bits in the INTMR - default
*/
mov r1, #0xffffffff
ldr r0, =INTMSK
str r1, [r0]
# if defined(CONFIG_S3C2440)/*4,CONFIG_S3C2410 -->CONFIG_S3C2440 */
ldr r1, =0x7fff /*5, 0x3ff --> 0x7fff */
ldr r0, =INTSUBMSK
str r1, [r0]
# endif
/* FCLK:HCLK:PCLK = 1:2:4 */
/* default FCLK is 120 MHz ! */
ldr r0, =CLKDIVN
mov r1, #5 /*5.1, 3 -->5 */
str r1, [r0]
#endif /* CONFIG_S3C2400 || CONFIG_S3C2440 */
/*
* we do sys-critical inits only at reboot,
* not when booting from ram!
*/
#ifndef CONFIG_SKIP_LOWLEVEL_INIT
bl cpu_init_crit
#endif
#ifndef CONFIG_SKIP_RELOCATE_UBOOT
#if defined(CONFIG_NOR_BOOT) /*6, add a this line ,at the same time, add in smdk2440.h*/
relocate: /* relocate U-Boot to RAM */
adr r0, _start /* r0 <- current position of code */
ldr r1, _TEXT_BASE /* test if we run from flash or RAM */
cmp r0, r1 /* don't reloc during debug */
beq stack_setup
ldr r2, _armboot_start
ldr r3, _bss_start
sub r2, r3, r2 /* r2 <- size of armboot */
add r2, r0, r2 /* r2 <- source end address */
copy_loop:
ldmia {r3-r10} /* copy from source address [r0] */
stmia {r3-r10} /* copy to target address [r1] */
cmp r0, r2 /* until source end addreee [r2] */
ble copy_loop
#endif /*7, CONFIG_NOR_BOOT, add this line */
#endif /* CONFIG_SKIP_RELOCATE_UBOOT */
#if defined(CONFIG_NAND_BOOT) /*8, add this line,and added in smdk2440.h*/
/*************************vivi start*****************************/
#define NAND_CTL_BASE 0x4e000000
#define oNFCONF 0x00
#define oNFCONT 0x04
#define oNFCMD 0x08
#define oNFSTAT 0x20
copy_myself:
@mov r10, lr
/*----------------------Init Nandflash controller---------------*/
@ reset NAND
ldr r1, =NAND_CTL_BASE
ldr r2, =0x1400 @ initial value
str r2, [r1, #oNFCONF]
/*@ldr r2, [r1, #oNFCONF]
@bic r2, r2, #0x800 @ enable chip
@str r2, [r1, #oNFCONF]*/
@ldr r2, [r1, #oNFCONT]
@orr r2, r2, #0x1
@bic r2, r2, #0x2
@str r2, [r1, #oNFCONT]
ldr r2, =0x73
str r2, [r1, #oNFCONT]
ldr r2, =0x0
str r2, [r1, #oNFSTAT]
/*-----------------Init Nandflash controller end ---------------*/
/*--------------------Reset Nandflash controller ---------------*/
bic r2, r2, #0x2
str r2, [r1, #oNFCONT]
ldr r2, [r1, #oNFSTAT]
orr r2, r2, #0x2
str r2, [r1, #oNFSTAT]
mov r2, #0xff @ RESET command
strb r2, [r1, #oNFCMD]
mov r3, #0 @ wait
1: add r3, r3, #0x1
cmp r3, #0xa
blt 1b
2: ldr r2, [r1, #oNFSTAT] @ wait ready
tst r2, #0x1
beq 2b
ldr r2, [r1, #oNFCONT]
orr r2, r2, #0x2 @ disable chip
str r2, [r1, #oNFCONT]
/*---------------Reset Nandflash controller end---------------*/
@ get read to call C functions (for nand_read())
@ldr sp, DW_STACK_START @ setup stack pointer
ldr r0, _TEXT_BASE /* upper 128 KiB: relocated uboot */
sub r0, r0, #CONFIG_SYS_MALLOC_LEN /* malloc area */
sub r0, r0, #CONFIG_SYS_GBL_DATA_SIZE /* bdinfo */
sub sp, r0, #12 /* leave 3 words for abort-stack */
mov fp, #0 @ no previous frame, so fp=0
@ copy vivi to RAM
@ldr r0, =VIVI_RAM_BASE
@mov r1, #0x0
@mov r2, #0x20000
ldr r0, _TEXT_BASE /* test if we run from flash or RAM */
adr r1, _start /* r1 <- current position of code */
cmp r0, r1 /* dondon't reloc duringdebug */
beq stack_setup
ldr r2, _armboot_start
ldr r3, _bss_start
sub r2, r3, r2 /* r2 <- size of armboot */
ldr r3, =0x1ff
bic r2, r2, r3 /*7.1, ensure the size is (n * 512) B */
ldr r3, =0x200
add r2, r2, r3 /*7.2, size + 512 B */
/*[r0 --- buf], [r1 --- start_addr] , [r2 --- size]*/
mov r1, #0x0
ldr r2, =0x20000
bl nand_read_ll
/*the return value of nand_read_ll is 0,means OK.*/
cmp r0, #0x1
beq ok_nand_read
bne bad_nand_read
ok_nand_read:
bad_nand_read:
/***********************end vivi************************************/
#endif /*CONFIG_NAND_BOOT*/
/* Set up the stack */
stack_setup:
ldr r0, _TEXT_BASE /* upper 128 KiB: relocated uboot */
sub r0, r0, #CONFIG_SYS_MALLOC_LEN /* malloc area */
sub r0, r0, #CONFIG_SYS_GBL_DATA_SIZE /* bdinfo */
#ifdef CONFIG_USE_IRQ
sub r0, r0, #(CONFIG_STACKSIZE_IRQ+CONFIG_STACKSIZE_FIQ)
#endif
sub sp, r0, #12 /* leave 3 words for abort-stack */
clear_bss:
ldr r0, _bss_start /* find start of bss segment */
ldr r1, _bss_end /* stop here */
mov r2, #0x00000000 /* clear */
clbss_l:str r2, [r0] /* clear loop... */
add r0, r0, #4
cmp r0, r1
ble clbss_l
ldr pc, _start_armboot
@ldr pc, =0x33f80604
_start_armboot: .word start_armboot
/**********************后面代码不变（略）***************************/
