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分类: 嵌入式

2009-10-04 08:22:51

苹果手机(IPHONE)开发培训班
    质量保障
        1、培训过程中,如有部分内容理解不透或消化不好,可免费在以后培训班中重听;
        2、培训结束后免费提供一个月的技术支持,充分保证培训后出效果;
        3、培训合格学员可享受免费推荐就业机会。
 
    教学时间,教学地点
            上课地点:华东师范大学/银城大厦(上海市,地铁3号线或4号线金沙江路站旁)
            最近开班有周末班/连续班/晚班
    学时
  课时: 共9天,每天8学时,总计72学时
        ◆外地学员:代理安排食宿(需提前预定)
        ☆合格学员免费颁发相关资格证书,提升您的职业资质
        作为最早专注于嵌入式培训的专业机构,曙海嵌入式学院提供的证书得到本行业的广泛认
        可,学员的能力得到大家的认同。
        ☆合格学员免费推荐工作 
    课程进度安排
课程大纲
第一阶段
 
1 高速PCB设计中的理论基础
    传输线理论、信号完整性(反射、串扰、过冲、地弹、振铃等)、电磁兼容性和时序匹配等等。
2 SPECCTRAQuest设计流程
    2.1 Pre-Placement
    2.2 Board Setup Requirements for Extracting and Applying Topologies
    2.3 Database Setup Advisor
        —Cross-Section
        —DC Nets
        —DC Voltages
        —Device Setup . ??—SI Models
        —SI Audit
 
3 拓扑结构的抽取与仿真 Extracting and Simulating Topologies
    3.1 Pre-Route Extraction Setup—Default Model Selection.
    3.2 Pre-Route Extraction Setup—Unrouted Interconnect
    3.3 Pre-Route Template Extraction
    3.4 SQ Signal Explorer Expert
    3.5 Analysis Preferences
    3.6 SigWave
    3.7 Delay Measurements
 
第二阶段
 
4 确定和施加约束 Determining and Adding ConstraintsSolution
    4.1 Solution SpaceAnalysis: Step 1 to 6
    4.2 Parametric Sweeps.
    4.3 Constraints :
        Topology Template Constraints
        Switch/Settle Constraints
        Assigning the Prop Delay Constraints
        Impedance Constraint
        Relative Propagation Delay Constraint
        Diff Pair Constraints
        Max Parallel Constraint
        Wiring Constraint
        User-Defined Constraint
        Signal Integrity Constraints
    4.4 Usage of Constraints Defined in Topology Template
 
5 模板应用和基于约束的布局
    Template Applications and Constraint-Driven Placement
    5.1 Creating a Topology
    5.2 Wiring the Topology
    5.3 TLines and Trace Models
    5.4 Coupled Traces
    5.5 RLGC Matrix of Coupled Trace Models
    5.6 Crosstalk Simulation in SQ Signal Explorer Expert
    5.7 Simulating with Coupled-Trace Models
    5.8 Sweep Simulation Results with Coupled-Trace Models
    5.9 Extracting a Topology Using the Constraint Manager
    5.10 Electrical Constraint Set
    5.11 Applying Electrical CSet
    5.12 Worksheet Analysis
    5.13 Spacing and Physical Rule Sets
    5.14 Electrical Rule Set
 
第三阶段
 
6 基于约束的布线 Constraint-Driven Routing
    6.1 Manual Routing
    6.2 Routing with the SPECCTRA Smart Route
    6.3 Driving Constraints in Routing
7 布线后的DRC检查和分析 Post-Route DRC and Analysis
    7.1 Post-Route Analysis
    7.2 SigNoise
    7.3 Reflection Simulation
    7.4 Reflection Waveform Analysis
    7.5 Comprehensive Simulation
    7.6 Crosstalk Simulation
    7.7 Crosstalk Analysis
    7.8 Simultaneous Switching Noise Simulation
    7.9 SSN Waveform Analysis
    7.10 System-Level Analysis
    7.11 A Complete Design Link
    7.12 Initialize Design Link
 
8 差分信号设计 Differential Pair Design Exploration
    8.1 Types of Differential Pairs in SPECCTRAQuest
    8.2 Create Differential Pair Using SPECCTRAQuest
    8.3 Create Differential Pair Using Constraint Manager
    8.4 Assigning Differential Pair Signal Models
    8.5 Preference to Extract Unrouted Differential Pair Topology
    8.6 Extracting Unrouted Differential Pair Topology
    8.7 Custom Stimulus to Analyze Differential Pair Topology
    8.8 Differential Pair Topology Analysis
    8.9 Coupled Trace Model and Differential Pair Topology
    8.10 Layout Cross-section Editor
    8.11 Differential Pair Constraints
    8.12 Differential Pair Constraints in the Constraint Manager
    8.13 Differential Pair Analysis in the Constraint Manager
    8.14 Post Route Extraction
 
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