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分类: LINUX

2009-10-24 23:38:23

一,准备工作

1 进入U-Boot目录,修改Makefile
smdk2410_config : unconfig
 @$(MKCONFIG) $(@:_config=) arm arm920t smdk2410 NULL s3c24x0

新建

qq2440_config : unconfig
 @$(MKCONFIG) $(@:_config=) arm arm920t qq2440 NULL s3c24x0

2.在board文件夹下创建开发板qq2440目录

$cp -arf smdk2410/*   qq2440/
$cd qq2440
$mv smdk2410.c qq2440.c

修改makefile

3. 在include/configs/中建立配置头文件

$cp include/configs/smdk2410.h include/configs/qq2440.h

二,修改文件内容,适应QQ2440开发板

根据代码执行顺序

1 修改/cpu/arm920t/start.S

  (1)修改中断禁止部分

#if defined(CONFIG_S3C2400) || defined(CONFIG_S3C2410) || defined(CONFIG_S3C2440)
    ldr     r0, =pWTCON
    mov     r1, #0x0
    str     r1, [r0]

    /*
     * mask all IRQs by setting all bits in the INTMR - default
     */
    mov    r1, #0xffffffff
    ldr    r0, =INTMSK
    str    r1, [r0]

//添加或者直接替换s3c2410的
# if  defined(CONFIG_S3C2440)
    ldr    r1, =0x7fff  
//根据2440芯片手册,INTSUBMSK有15位可用
    ldr    r0, =INTSUBMSK
    str    r1, [r0]
# endif

(2)时钟设置

# if defined(CONFIG_S3C2400)
#  define pWTCON  0x15300000
#  define INTMSK  0x14400008 /* Interupt-Controller base addresses */
#  define CLKDIVN 0x14800014 /* clock divisor register */
#elif defined(CONFIG_S3C2410) || defined(CONFIG_S3C2440)
#  define pWTCON  0x53000000
#  define INTMSK  0x4A000008 /* Interupt-Controller base addresses */
#  define INTSUBMSK 0x4A00001C
#  define CLKDIVN 0x4C000014 /* clock divisor register */
/* 配置主频405M */
#define CLK_CTL_BASE        0x4C000000  /* clock */
#if defined(CONFIG_S3C2440)
#define MDIV_405       0x7f << 12   /* 405M */
#define PSDIV_405       0x21       /*  */
#endif

# endif


/*FCLK:HCLK:PCLK = 1:4:8 */
 ldr r0, =CLKDIVN
 mov r1, #5
 str r1, [r0]
 
 mrc p15, 0, r1, c1, c0, 0  @ read ctrl register
 orr r1, r1, #0xc0000000  @ Asynchronous 
 mcr p15, 0, r1, c1, c0, 0  @ write ctrl register
 
#if defined(CONFIG_S3C2440)
    /*now, CPU clock is 405.00 Mhz   */
    mov    r1, #CLK_CTL_BASE
    mov    r2, #MDIV_405
    add    r2, r2, #PSDIV_405
    str    r2, [r1, #0x04]
#endif

#endif /* CONFIG_S3C2400 || CONFIG_S3C2410 || CONFIG_S3C2440*/
(3)将从Flash启动改成从NAND Flash启动

将以下UBoot的重定向语句段:
#ifndef CONFIG_SKIP_RELOCATE_UBOOT
relocate:                /* relocate U-Boot to RAM        */
    adr    r0, _start        /* r0 <- current position of code   */
    ldr    r1, _TEXT_BASE        /* test if we run from flash or RAM */
    cmp     r0, r1                /* don't reloc during debug         */
    beq     stack_setup

    ldr    r2, _armboot_start
    ldr    r3, _bss_start
    sub    r2, r3, r2        /* r2 <- size of armboot            */
    add    r2, r0, r2        /* r2 <- source end address         */

copy_loop:
    ldmia    r0!, {r3-r10}        /* copy from source address [r0]    */
    stmia    r1!, {r3-r10}        /* copy to   target address [r1]    */
    cmp    r0, r2            /* until source end addreee [r2]    */
    ble    copy_loop
#endif    /* CONFIG_SKIP_RELOCATE_UBOOT */
替换成:

#ifdef CONFIG_S3C2440_NAND_BOOT   @tekkaman@@@@@@@@@@@@@@@@SSSSSSSSSSSSS
    @ reset NAND
    mov    r1, #NAND_CTL_BASE
    ldr    r2, =( (7<<12)|(7<<8)|(7<<4)|(0<<0) )
    str    r2, [r1, #oNFCONF]
    ldr    r2, [r1, #oNFCONF]

    ldr    r2, =( (1<<4)|(0<<1)|(1<<0) ) @ Active low CE Control
    str    r2, [r1, #oNFCONT]
    ldr    r2, [r1, #oNFCONT]

    ldr    r2, =(0x6)        @ RnB Clear
    str    r2, [r1, #oNFSTAT]
    ldr    r2, [r1, #oNFSTAT]
   
    mov    r2, #0xff        @ RESET command
    strb    r2, [r1, #oNFCMD]

  mov r3, #0                   @ wait
nand1:
  add  r3, r3, #0x1
  cmp r3, #0xa
  blt   nand1

nand2:
  ldr   r2, [r1, #oNFSTAT]      @ wait ready
  tst    r2, #0x4
  beq  nand2


    ldr    r2, [r1, #oNFCONT]
    orr    r2, r2, #0x2        @ Flash Memory Chip Disable
    str    r2, [r1, #oNFCONT]

@ get read to call C functions (for nand_read())
  ldr   sp, DW_STACK_START       @ setup stack pointer
  mov fp, #0                    @ no previous frame, so fp=0

@ copy U-Boot to RAM
  ldr   r0, =TEXT_BASE
  mov     r1, #0x0
  mov r2, #0x20000
  bl    nand_read_ll
  tst    r0, #0x0
  beq  ok_nand_read

bad_nand_read:
loop2:    b     loop2          @ infinite loop


ok_nand_read:
@ verify
  mov r0, #0
  ldr   r1, =TEXT_BASE
  mov r2, #0x400     @ 4 bytes * 1024 = 4K-bytes
go_next:
  ldr   r3, [r0], #4
  ldr   r4, [r1], #4
  teq   r3, r4
  bne  notmatch
  subs r2, r2, #4
  beq  stack_setup
  bne  go_next

notmatch:
loop3:     b     loop3         @ infinite loop

#endif @ CONFIG_S3C2440_NAND_BOOT  @tekkaman@@@@@@@@@@@@@@@@@@EEEEEEEEE


在 “  _start_armboot:    .word start_armboot  ” 后加入:
   .align     2
DW_STACK_START:  .word  STACK_BASE+STACK_SIZE-4

2.在board/qq2440/添加nand_read.c文件

在启动时,将uboot从nandflash拷贝到RAM执行的读取函数

#include

#define __REGb(x)    (*(volatile unsigned char *)(x))
#define __REGi(x)    (*(volatile unsigned int *)(x))
#define NF_BASE        0x4e000000

#define NFCONF        __REGi(NF_BASE + 0x0)
#define NFCONT        __REGi(NF_BASE + 0x4)
#define NFCMD        __REGb(NF_BASE + 0x8)
#define NFADDR        __REGb(NF_BASE + 0xC)
#define NFDATA        __REGb(NF_BASE + 0x10)
#define NFSTAT        __REGb(NF_BASE + 0x20)

//#define GPDAT        __REGi(GPIO_CTL_BASE+oGPIO_F+oGPIO_DAT)

#define NAND_CHIP_ENABLE  (NFCONT &= ~(1<<1))
#define NAND_CHIP_DISABLE (NFCONT |=  (1<<1))
#define NAND_CLEAR_RB      (NFSTAT |=  (1<<2))
#define NAND_DETECT_RB      { while(! (NFSTAT&(1<<2)) );}

#define BUSY 4
inline void wait_idle(void) {
    while(!(NFSTAT & BUSY));
    NFSTAT |= BUSY;
}

#define NAND_SECTOR_SIZE    512
#define NAND_BLOCK_MASK        (NAND_SECTOR_SIZE - 1)

/* low level nand read function */
int
nand_read_ll(unsigned char *buf, unsigned long start_addr, int size)
{
    int i, j;

    if ((start_addr & NAND_BLOCK_MASK) || (size & NAND_BLOCK_MASK)) {
        return -1;    /* invalid alignment */
    }

    NAND_CHIP_ENABLE;

    for(i=start_addr; i < (start_addr + size);) {
        /* READ0 */
        NAND_CLEAR_RB;       
        NFCMD = 0;

        /* Write Address */
        NFADDR = i & 0xff;
        NFADDR = (i >> 9) & 0xff;
        NFADDR = (i >> 17) & 0xff;
        NFADDR = (i >> 25) & 0xff;

        NAND_DETECT_RB;

        for(j=0; j < NAND_SECTOR_SIZE; j++, i++) {
            *buf = (NFDATA & 0xff);
            buf++;
        }
    }
    NAND_CHIP_DISABLE;
    return 0;
}

修改相关makefile

3.修改include/configs/qq2440.h

/*
 * Nandflash Boot
 */
#define CONFIG_S3C2440_NAND_BOOT 1
#define STACK_BASE    0x33f00000
#define STACK_SIZE    0x8000
//#define UBOOT_RAM_BASE    0x33f80000
/* NAND Flash Controller */
#define NAND_CTL_BASE        0x4E000000
#define bINT_CTL(Nb)        __REG(INT_CTL_BASE + (Nb))
/* Offset */
#define oNFCONF            0x00
#define oNFCONT            0x04
#define oNFCMD            0x08
#define oNFADDR            0x0c
#define oNFDATA            0x10
#define oNFSTAT            0x20
#define oNFECC            0x2c

4. 修改board/tekkaman/tekkaman2440/lowlevel_init.S文件
   
依照开发板的内存区的配置情况, 修改board/qq2440/lowlevel_init.S文件,一般仿smdk2440的配置

......
/* REFRESH parameter */
#define REFEN             0x1    /* Refresh enable */
#define TREFMD             0x0    /* CBR(CAS before RAS)/Auto refresh */
#define Trp             0x2    /* 4clk */
#define Trc             0x3    /* 7clk */
#define Tchr             0x2    /* 3clk */
#define REFCNT             1012   

修改/board/qq2440/qq2440.c
......

#elif FCLK_SPEED==1        /* Fout = 405MHz */
//#define M_MDIV    0x5c
//#define M_PDIV    0x4
//#define M_SDIV    0x0
#define M_MDIV    0x7f
#define M_PDIV    0x2
#define M_SDIV    0x1
......
#elif USB_CLOCK==1
//#define U_M_MDIV    0x48
//#define U_M_PDIV    0x3
#define U_M_MDIV    0x38
#define U_M_PDIV    0x2
#define U_M_SDIV    0x2

......

/* set up the I/O ports */
gpio->GPACON = 0x007FFFFF;
//gpio->GPBCON = 0x00044556;
gpio->GPBCON = 0x00055556;//gpb5,6,7,8为4个led输出

......
    /* arch number of S3C2440 -Board */
    gd->bd->bi_arch_number = MACH_TYPE_S3C2440 ;

/* adress of boot parameters */

gd->bd->bi_boot_params = 0x30000100;

icache_enable();

dcache_enable();

return 0;

}

NAND Flash的读写需要的配置
/* * NAND flash settings* */
#if CONFIG_CMD_NAND // (CONFIG_COMMANDS & CFG_CMD_NAND)
#define CFG_NAND_BASE 0x4E000000 /* NandFlash控制器在SFR区起始寄存器地址 */
#define CFG_MAX_NAND_DEVICE 1 /* 支持的最在Nand Flash数据 */
#define SECTORSIZE 512 /* 1页的大小 */
#define NAND_SECTOR_SIZE SECTORSIZE
#define NAND_BLOCK_MASK 511/* 页掩码 */
#define ADDR_COLUMN 1 /* 一个字节的Column地址 */
#define ADDR_PAGE 3 /* 3字节的页块地址!!!!!*/
#define ADDR_COLUMN_PAGE 4 /* 总共4字节的页块地址!!!!! */
#define NAND_ChipID_UNKNOWN 0x00 /* 未知芯片的ID号 */
#define NAND_MAX_FLOORS 1
#define NAND_MAX_CHIPS 1
/* Nand Flash命令层底层接口函数 */
#define WRITE_NAND_COMMAND(d, adr) {rNFCMD = d;}
#define WRITE_NAND_ADDRESS(d, adr) {rNFADDR = d;}
#define WRITE_NAND(d, adr) {rNFDATA = d;}
#define READ_NAND(adr) (rNFDATA)
#define NAND_WAIT_READY(nand) {while(!(rNFSTAT&(1<<0)));}
#define NAND_DISABLE_CE(nand) {rNFCONT |= (1<<1);}
#define NAND_ENABLE_CE(nand) {rNFCONT &= ~(1<<1);}
#define WRITE_NAND_COMMANDW(d, adr) NF_CmdW(d)
/* the following functions are NOP's because S3C24X0 handles this in hardware */
#define NAND_CTL_CLRALE(nandptr)
#define NAND_CTL_SETALE(nandptr)
#define NAND_CTL_CLRCLE(nandptr)
#define NAND_CTL_SETCLE(nandptr)
/* 允许Nand Flash写校验 */
#define CONFIG_MTD_NAND_VERIFY_WRITE 1
#define rNFCONF (*(volatile unsigned int *)0x4e000000)
#define rNFCONT (*(volatile unsigned int *)0x4e000004)
#define rNFCMD (*(volatile unsigned char *)0x4e000008)
#define rNFADDR (*(volatile unsigned char *)0x4e00000c)
#define rNFDATA (*(volatile unsigned char *)0x4e000010)
#define rNFSTAT (*(volatile unsigned int *)0x4e000020)
#define rNFECC (*(volatile unsigned int *)0x4e00002c)
#endif    /* __CONFIG_H */
7、在多个文件中添加“CONFIG_S3C2440”,使得原来s3c2410的代码可以编译进来。

1/include/common.h

2/include/s3c24x0.h

3/cpu/arm920t/s3c24x0/interrupts.c

在get_tbclk (void)添加 defined(CONFIG_VCMA9) || defined(CONFIG_S3C2440)
4/cpu/arm920t/s3c24x0/serial.c;由于主频变化,这里波特率设置需要重新计算

5/cpu/arm920t/s3c24x0/speed.c;根据原来2410的代码,修改匹配2440

1/cpu/arm920t/s3c24x0/interrupts.c

8、 include/linux/mtd/nand_ids.h的结构体nand_flash_ids加入

static struct nand_flash_dev nand_flash_ids[] = {

......
   
{"Samsung K9F1208U0B",  NAND_MFR_SAMSUNG, 0x76, 26, 0, 3, 0x4000, 0},
......

};

 

9. board.c添加
#include

 

10 在/include/s3c24x0.h中加入2440 的NAND FLASH 寄存器定义和CAMDIVN定义:

......

typedef struct {

         S3C24X0_REG32   LOCKTIME;

         S3C24X0_REG32   MPLLCON;

         S3C24X0_REG32   UPLLCON;

         S3C24X0_REG32   CLKCON;

         S3C24X0_REG32   CLKSLOW;

         S3C24X0_REG32   CLKDIVN;

         S3C24X0_REG32   CAMDIVN;

} /*__attribute__((__packed__))*/ S3C24X0_CLOCK_POWER;

......

#if defined(CONFIG_S3C2410)

/* NAND FLASH (see S3C2410 manual chapter 6) */

typedef struct {

         S3C24X0_REG32   NFCONF;

         S3C24X0_REG32   NFCMD;

         S3C24X0_REG32   NFADDR;

         S3C24X0_REG32   NFDATA;

         S3C24X0_REG32   NFSTAT;

         S3C24X0_REG32   NFECC;

} /*__attribute__((__packed__))*/ S3C2410_NAND;

#endif

#if defined (CONFIG_S3C2440)

/* NAND FLASH (see S3C2440 manual chapter 6) */

typedef struct {

         S3C24X0_REG32   NFCONF;

         S3C24X0_REG32   NFCONT;

         S3C24X0_REG32   NFCMD;

         S3C24X0_REG32   NFADDR;

         S3C24X0_REG32   NFDATA;

         S3C24X0_REG32   NFMECC0;

         S3C24X0_REG32   NFMECC1;

         S3C24X0_REG32   NFSECC;

         S3C24X0_REG32   NFSTAT;

         S3C24X0_REG32   NFESTAT0;

         S3C24X0_REG32   NFESTAT1;

         S3C24X0_REG32   NFECC;

} /*__attribute__((__packed__))*/ S3C2410_NAND;

#endif

 

三、交叉编译UBoot
UBoot的根目录下生成uboot.bin下载到开发板

运行,出现如下结果,uboot移植基本成功;在打印nand:64MiB时有点慢。

在qq2440.h文件没有定义CFG_NAND_LEGACY,系统调用的drivers/mtd/nand/nand.c中的nand_init()


U-Boot 1.3.2 (Aug 31 2008 - 18:36:25)

U-Boot code: 33f80000 -> 33f9f328; BSS: -> 33fa4608
DRAM:  64 MB
Flash:  1 MB
NAND:  64 MiB
*** Warning - bad CRC or NAND, using default environment

In:    serial
Out:   serial
Err:   serial

QQ2440 >

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