FSM(三段式)（存在一定故障）

module FSM(clk,rst,led);
input clk,rst;
output [3:0] led;
reg [3:0] led;
reg [1:0] pstate,nstate;
reg clk_1;
parameter red=2'b00,blue=2'b01,yellow=2'b10,green=2'b11;
reg [25:0] count;
always @(posedge clk)
 begin
  if(count==26'd2500_0000)
   begin
   count=26'd0;
   clk_1=~clk_1;
   end
  else
   count=count+1;
 end
reg [7:0] num;
always @(posedge clk_1)
 begin
  if(num==8'd5)
   num=8'd0;
  else
   begin
   num=num+1'd1;
   end
 end

always @(posedge clk)
begin
 if(rst==1)
  pstate=red;
 else
  pstate=nstate;
end
reg flag;

always @(pstate)
 begin
  case(pstate)
   red:    begin   if(num==5) nstate=blue;   end
   blue:   begin   if(num==5) nstate=yellow;  end
   yellow: begin   if(num==5) nstate=green;  end
   green:  begin   if(num==5) nstate=red;   end
  default
     led=4'b0000;
  endcase
 end
 
always @(posedge clk or negedge rst)
begin
 case(nstate)
 red:   led=4'b0001;
 blue:   led=4'b0010;
 green:   led=4'b0100;
 yellow:   led=4'b1000;
 endcase 
end

endmodule