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分类: 嵌入式

2009-08-03 23:23:48

/****************************************************************
 NAME: u2440mon.c
 DESC: u2440mon entry point,menu,download
 HISTORY:
 Mar.25.2002:purnnamu: S3C2400X profile.c is ported for S3C2410X.
 Mar.27.2002:purnnamu: DMA is enabled.
 Apr.01.2002:purnnamu: isDownloadReady flag is added.
 Apr.10.2002:purnnamu: - Selecting menu is available in the waiting loop.
                         So, isDownloadReady flag gets not needed
                       - UART ch.1 can be selected for the console.
 Aug.20.2002:purnnamu: revision number change 0.2 -> R1.1      
 Sep.03.2002:purnnamu: To remove the power noise in the USB signal, the unused CLKOUT0,1 is disabled.
 ****************************************************************/
#define GLOBAL_CLK  1
#include "spi.h"
#include
#include
#include "def.h"
#include "option.h"
#include "2440addr.h"
#include "2440lib.h"
#include "2440slib.h"
#include "mmu.h"
#include "profile.h"
#include "memtest.h"

extern char Image$$RO$$Limit[];
extern char Image$$RO$$Base[];
extern char Image$$RW$$Limit[];
extern char Image$$RW$$Base[];
extern char Image$$ZI$$Limit[];
extern char Image$$ZI$$Base[];
 

void Isr_Init(void);
void HaltUndef(void);
void HaltSwi(void);
void HaltPabort(void);
void HaltDabort(void);
void ClearMemory(void);
void Clk0_Enable(int clock_sel); 
void Clk1_Enable(int clock_sel);
void Clk0_Disable(void);
void Clk1_Disable(void);
 

volatile U32 downloadAddress;
void (*restart)(void)=(void (*)(void))0x0;
volatile unsigned char *downPt;
volatile U32 downloadFileSize;
volatile U16 checkSum;
volatile unsigned int err=0;
volatile U32 totalDmaCount;
volatile int isUsbdSetConfiguration;
int download_run=0;
U32 tempDownloadAddress;
int menuUsed=0;
extern char Image$$RW$$Limit[];
U32 *pMagicNum=(U32 *)Image$$RW$$Limit;
int consoleNum;
static U32 cpu_freq;
static U32 UPLL;
static void cal_cpu_bus_clk(void)
{
 U32 val;
 U8 m, p, s;
 
 val = rMPLLCON;
 m = (val>>12)&0xff;
 p = (val>>4)&0x3f;
 s = val&3;
 //(m+8)*FIN*2 不要超出32位数!
 FCLK = ((m+8)*(FIN/100)*2)/((p+2)*(1< 
 val = rCLKDIVN;
 m = (val>>1)&3;
 p = val&1; 
 val = rCAMDIVN;
 s = val>>8;
 
 switch (m) {
 case 0:
  HCLK = FCLK;
  break;
 case 1:
  HCLK = FCLK>>1;
  break;
 case 2:
  if(s&2)
   HCLK = FCLK>>3;
  else
   HCLK = FCLK>>2;
  break;
 case 3:
  if(s&1)
   HCLK = FCLK/6;
  else
   HCLK = FCLK/3;
  break;
 }
 
 if(p)
  PCLK = HCLK>>1;
 else
  PCLK = HCLK;
 
 if(s&0x10)
  cpu_freq = HCLK;
 else
  cpu_freq = FCLK;
  
 val = rUPLLCON;
 m = (val>>12)&0xff;
 p = (val>>4)&0x3f;
 s = val&3;
 UPLL = ((m+8)*FIN)/((p+2)*(1< UCLK = (rCLKDIVN&8)?(UPLL>>1):UPLL;
}
 
 
 
 
unsigned char spi_write(unsigned char data)
{
 // set data to send into SPI data register
 rSPTDAT1 = data;
 // Wait for transmission complete
 while(!(rSPSTA1 & 0x1));
 // return data read from SPI
 return rSPTDAT1;
}
 
unsigned char spi_read(void)
{   
    rSPTDAT1 = 0xff;
    while(!(rSPSTA1 & 0x1));
   
 return rSPRDAT1;
}
 

void spi_7init(void){
 rGPGCON=((rGPGCON&0xffffffcf)|0x10); // Master(GPIO_Output)
 rGPGDAT|=0x4; // Activate nSS
 
 
    rSPPRE1=0x4; //if PCLK=50Mhz,SPICLK=25Mhz
    rSPCON1=(0<<5)|(1<<4)|(1<<3)|(1<<2)|(1<<1)|(0<<0);//Polling,en-SCK,master,low,B,normal
    rSPPIN1=(0<<2)|(1<<1)|(0<<0);//dis-ENMUL,SBO,release
spi_write(0xff);
spi_write(0xff);
spi_write(0xff);
spi_write(0xff);
 
 
 
void Main(void)
{
 char *mode;
 int *ad;
 int i,i2;
 U8 key;
 U32 mpll_val = 0 ;
 
 int data_7799[3]={0,0,0};
 //U32 divn_upll = 0 ;
   
 #if ADS10  
// __rt_lib_init(); //for ADS 1.0
 #endif
 Port_Init();
 
 Isr_Init();
 
 i = 2 ; //don't use 100M!
  //boot_params.cpu_clk.val = 3;
 switch ( i ) {
 case 0: //200
  key = 12;
  mpll_val = (92<<12)|(4<<4)|(1);
  break;
 case 1: //300
  key = 13;
  mpll_val = (67<<12)|(1<<4)|(1);
  break;
 case 2: //400
  key = 14;
  mpll_val = (92<<12)|(1<<4)|(1);
  break;
 case 3: //440!!!
  key = 14;
  mpll_val = (102<<12)|(1<<4)|(1);
  break;
 default:
  key = 14;
  mpll_val = (92<<12)|(1<<4)|(1);
  break;
 }
 
 
 
 
 
  //init FCLK=400M, so change MPLL first
 ChangeMPllValue((mpll_val>>12)&0xff, (mpll_val>>4)&0x3f, mpll_val&3);
 ChangeClockDivider(key, 12);
 cal_cpu_bus_clk();
 
 consoleNum = 0; // Uart 1 select for debug.
 Uart_Init( 0,115200 );
 Uart_Select( consoleNum );
 Beep(2000, 100);
 
 
 
 
 
 
 
 
 
 
     /*
    rGPGCON=0xffffffff;
 rSPPRE1=0x4; //if PCLK=50Mhz,SPICLK=25Mhz
 rSPCON1 =0x00;
    rSPCON1=(0<<5)|(1<<4)|(1<<3)|(1<<2)|(1<<1)|(0<<0);//Polling,en-SCK,master,low,A,normal
    rSPPIN1=(0<<2)|(1<<1)|(0<<0);//dis-ENMUL,SBO,release
 //rGPGCON=0xff9555ba;
  */
 spi_7init();
 Uart_SendByte('\n');
 Uart_Printf("<***********************************************>\n");
 Uart_Printf("                ");
 Uart_Printf("      Build time is: %s  %s\n", __DATE__ , __TIME__  );
    Uart_Printf( "          Image$$RO$$Base  = 0x%x\n", Image$$RO$$Base );
 Uart_Printf( "          Image$$RO$$Limit = 0x%x\n", Image$$RO$$Limit );
 Uart_Printf( "          Image$$RW$$Base  = 0x%x\n", Image$$RW$$Base );
 Uart_Printf( "          Image$$RW$$Limit = 0x%x\n", Image$$RW$$Limit );
    Uart_Printf( "          Image$$ZI$$Base  = 0x%x\n", Image$$ZI$$Base );
    Uart_Printf( "          Image$$ZI$$Limit = 0x%x\n", Image$$ZI$$Limit );
    Uart_Printf( "          PCLK = 0x%d\n", PCLK );
    Uart_Printf( "          rCLKCON = 0x%x\n", rCLKCON );
    Uart_Printf( "          rGPGCON = 0x%x\n", rGPGCON );
   
    Uart_Printf( "          rSPCON1 = 0x%x\n", rSPCON1 );
    Uart_Printf( "          rSPPRE1 = 0x%x\n", rSPPRE1 );
    Uart_Printf( "          rSPPIN1 = 0x%x\n", rSPPIN1 );
    Uart_Printf( "          rGPECON = 0x%x\n", rGPECON );
    Uart_Printf( "          rGPGUP  = 0x%x\n", rGPGUP );
    Uart_Printf( "          rGPEUP  = 0x%x\n", rGPEUP );
    Uart_Printf( "          rGPEDAT = 0x%x\n", rGPEDAT  );
    Uart_Printf( "          rGPGDAT = 0x%x\n", rGPGDAT );
 Uart_Printf("<***********************************************>\n");
    Uart_Printf("           2440 7799SPI Test Program VER1.0      \n");
  Uart_Printf("<***********************************************>\n");
 
 
while(1)
{

Uart_Printf("<***********************************************>\n");
 spi_write(0x40);
 Uart_Printf( "         sta-0x80 = 0x%x\n", spi_read() );
 
 spi_write(0x50);
 Uart_Printf( "         cfg-0x0701 = |%x|%x|\n", spi_read(),spi_read() );
 
 spi_write(0x48);
 Uart_Printf( "         mod-0x000a = |%x|%x|\n", spi_read(),spi_read() );
 
 
 
 spi_write(0x70);
 Uart_Printf( "         off-0x800000 = |%x|%x|%x|\n", spi_read(),spi_read(),spi_read() );
 
 
 
spi_write(0x10);
spi_write(0x37);
spi_write(0x31);
for(i=254;i>0;i--)
for(i2=254;i2>0;i2--);
for(i=254;i>0;i--)
for(i2=254;i2>0;i2--);

spi_write(0x08);
spi_write(0x80);
spi_write(0x01);
for(i=254;i>0;i--)
for(i2=254;i2>0;i2--);
for(i=254;i>0;i--)
for(i2=254;i2>0;i2--);

spi_write(0x08);
spi_write(0xa0);
spi_write(0x01);
for(i=254;i>0;i--)
for(i2=254;i2>0;i2--);
for(i=254;i>0;i--)
for(i2=254;i2>0;i2--);
 

 
spi_write(0x08);
spi_write(0x00);
spi_write(0x01);

for(i=254;i>0;i--)
for(i2=254;i2>0;i2--);
for(i=254;i>0;i--)
for(i2=254;i2>0;i2--);
 
 /*
*/
 
 

 while(1)
{
 spi_write(0x58);

  Uart_Printf( " spi_read(0) = %x|%x|%x\n", spi_read(),spi_read(),spi_read() );
 
}
 

}
 
 }
 
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