Memory Addressing （十一）

Regular Paging

Starting with the 80386, the paging unit of Intel processors handles 4 KB pages.

从80386开始，Intel处理的分页部件处理4KB（2^12）大小的页。

The 32 bits of a linear address are divided into three fields:

32位的线性地址被划分成3部分：

Directory The most significant 10 bits

页目录 最高的10bit

Table     The intermediate 10 bits

页表  中间的10bit

Offset    The least significant 12 bits

页内偏移 最后12bit

The translation of linear addresses is accomplished in two steps, each based on a type of translation table. The first translation table is called the Page Directory, and the second is called the Page Table.^[*]

线性地址的转换分两步走，每一步都基于一个转换表。第一步转换的表称为页目录，第二步的表称为页表。

^[*] In the discussion that follows, the lowercase "page table" term denotes any page storing the mapping between linear and physical addresses, while the capitalized "Page Table" term denotes a page in the last level of page tables.

在下面的讨论过程中，小写的术语＂page table＂指的是存储线性地址和物理地址映射关系的任意页，而大写的术语＂Page Table＂指的是在页表中最底层的页。

The aim of this two-level scheme is to reduce the amount of RAM required for per-process Page Tables. If a simple one-level Page Table was used, then it would require up to 2^20 entries (i.e., at 4 bytes per entry, 4 MB of RAM) to represent the Page Table for each process (if the process used a full 4 GB linear address space), even though a process does not use all addresses in that range. The two-level scheme reduces the memory by requiring Page Tables only for those virtual memory regions actually used by a process.

这样的两层结构可以有效地减少进程所需的页表占用的RAM数量。如果简单地使用一级页表，那么可能需要2^20（也就是4M空间，每个记录占4byte的话）记录，来表示每个进程的页表（如果进程使用整个4GB线性地址空间），即使进程并不使用这么大范围的所有地址。两层结构能减少页表所需的内存。

Each active process must have a Page Directory assigned to it. However, there is no need to allocate RAM for all Page Tables of a process at once; it is more efficient to allocate RAM for a Page Table only when the process effectively needs it.

每个活动的进程必须有一个分配给它的页目录。然而，不需要一次就给进程所有的页表分配RAM，当进程确实需要时再分配页表更加有效率。

The physical address of the Page Directory in use is stored in a control register named cr3. The Directory field within the linear address determines the entry in the Page Directory that points to the proper Page Table. The address's Table field, in turn, determines the entry in the Page Table that contains the physical address of the page frame containing the page. The Offset field determines the relative position within the page frame (see Figure 2-7). Because it is 12 bits long, each page consists of 4096 bytes of data.

使用的页目录的物理地址存储在控制寄存器CR3里。线形地址的目录字段（页目录的下标）决定了页目录中的元素，指明了对应的页表。地址的页表字段（页表的下标），决定了对应页表中的元素，指向了包含该页的页帧的物理地址。偏移字段决定了页帧内的相对位置。因为偏移长12bit，所以每页有4096byte数据。

Figure 2-7. Paging by 80 x 86 processors

Both the Directory and the Table fields are 10 bits long, so Page Directories and Page Tables can include up to 1,024 entries. It follows that a Page Directory can address up to 1024 x 1024 x 4096=2³² memory cells, as you'd expect in 32-bit addresses.

目录字段和页表字段都是10bit长，所以页目录和页表最多有1024个元素。因此一个页目录可以寻址1024x1924x4096=4GB内存单元，正是期望的32bit地址空间。也就是说4G空间只需要1个页目录就够了。

The entries of Page Directories and Page Tables have the same structure. Each entry includes the following fields:

页目录和页表的元素有相同的结构，每个元素包含下列字段：

Present flag

If it is set, the referred-to page (or Page Table) is contained in main memory; if the flag is 0, the page is not contained in main memory and the remaining entry bits may be used by the operating system for its own purposes. If the entry of a Page Table or Page Directory needed to perform an address translation has the Present flag cleared, the paging unit stores the linear address in a control register named cr2 and generates exception 14: the Page Fault exception. (We will see in Chapter 17 how Linux uses this field.)

存在标志

如果设置了该标志（=1），所指向的页或页表在内存中；如果为0，则该页没有在内存中，该条目剩余bit被OS挪作他用。当该标志为0，某个线性地址需要该条目做地址转换用时，分页部件会将这个线性地址存放在控制寄存器CR2中，并生成一个缺页异常。

Field containing the 20 most significant bits of a page frame physical address

Because each page frame has a 4-KB capacity, its physical address must be a multiple of 4096, so the 12 least significant bits of the physical address are always equal to 0. If the field refers to a Page Directory, the page frame contains a Page Table; if it refers to a Page Table, the page frame contains a page of data.

存放一个页帧物理地址最高20bit的字段

因为每个页帧有4KB的容量，它的物理地址必须是4096的整数倍，所以物理地址的最后12bit总是0.如果该字段在页目录内，页帧内存放一个页表；如果它在页表内，页帧内存放一页的数据。

Accessed flag

Set each time the paging unit addresses the corresponding page frame. This flag may be used by the operating system when selecting pages to be swapped out. The paging unit never resets this flag; this must be done by the operating system.

已访问标志

每次分页部件在寻址对应页帧时设置。OS在选择将某些页面交换出去的时候使用这个标志。分页部件不会重置这个标志，重置只能由OS执行。

Dirty flag

Applies only to the Page Table entries. It is set each time a write operation is performed on the page frame. As with the Accessed flag, Dirty may be used by the operating system when selecting pages to be swapped out. The paging unit never resets this flag; this must be done by the operating system.

改写标志

仅用在页表项中。在每次页帧执行了写操作后设置。与＂Accessed Flag＂一样，这个标志也在OS选择交换出某页时使用。分页部件绝不重置该标志，重置只能由OS执行。

Read/Write flag

Contains the access right (Read/Write or Read) of the page or of the Page Table (see the section "Hardware Protection Scheme" later in this chapter).

读写标志

对应页或页表的访问权限（R/W 或者RO）。

User/Supervisor flag

Contains the privilege level required to access the page or Page Table (see the later section "Hardware Protection Scheme").

用户/管理员标志

访问对应页或页表需要的权限级别。

PCD and PWT flags

Controls the way the page or Page Table is handled by the hardware cache (see the section "Hardware Cache" later in this chapter).

PCD PWT标志

硬件cache处理对应页或页表的方式。

Page Size flag

Applies only to Page Directory entries. If it is set, the entry refers to a 2 MB- or 4 MB-long page frame (see the following sections).

页大小标志

仅用在页目录项。如果设置了，该项指向一个2MB或者4MB的页帧。

Global flag

Applies only to Page Table entries. This flag was introduced in the Pentium Pro to prevent frequently used pages from being flushed from the TLB cache (see the section "Translation Lookaside Buffers (TLB)" later in this chapter). It works only if the Page Global Enable (PGE) flag of register cr4 is set.

全局标志     

仅用在页表项。这个标志是Pentium Pro引进的，目的是保护频繁使用的页不会从TLBcache中换出。仅在寄存器CR4中的PGE标志设置时有效。