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清谈先生

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如何测试ARM上程序的开销

分类： 嵌入式

2013-05-11 09:37:00

ARMv6和ARMv7处理器均提供了 performance monitoring unit(PMU)，可以用于测试程序运行时消耗的Cycle数，最终可以得到程序运行时的MCPS（百万周期数每秒）。
下面的代码是从网上抄来的，可以用来测试ARMv7上面程序运行的开销mcps。当然，也可以自己写，那就需要参考ARM的官方手册，根据寄存器说明重新写一份，例如，可以参考文档：DDI0344K里面的3.2.42小节，里面对PMU的寄存器有详细的说明。不过网上既然有现成了，本着不重复造轮子的原则，就直接使用现成的代码好了。代码如下：


1.pmu_v7.h
该文件提供了经过封装的，对外函数接口声明

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  1. // ------------------------------------------------------------
  2. // PMU for Cortex-A/R (v7-A/R)
  3. // ------------------------------------------------------------

  5. #ifndef _V7_PMU_H
  6. #define _V7_PMU_H

  8. // Returns the number of progammable counters
  9. unsigned int getPMN(void);

  11. // Sets the event for a programmable counter to record
  12. // counter = r0 = Which counter to program (e.g. 0 for PMN0, 1 for PMN1)
  13. // event = r1 = The event code (from appropiate TRM or ARM Architecture Reference Manual)
  14. void pmn_config(unsigned int counter, unsigned int event);

  16. // Enables/disables the divider (1/64) on CCNT
  17. // divider = r0 = If 0 disable divider, else enable dvider
  18. void ccnt_divider(int divider);

  20. //
  21. // Enables and disables
  22. //

  24. // Global PMU enable
  25. // On ARM11 this enables the PMU, and the counters start immediately
  26. // On Cortex this enables the PMU, there are individual enables for the counters
  27. void enable_pmu(void);

  29. // Global PMU disable
  30. // On Cortex, this overrides the enable state of the individual counters
  31. void disable_pmu(void);

  33. // Enable the CCNT
  34. void enable_ccnt(void);

  36. // Disable the CCNT
  37. void disable_ccnt(void);

  39. // Enable PMN{n}
  40. // counter = The counter to enable (e.g. 0 for PMN0, 1 for PMN1)
  41. void enable_pmn(unsigned int counter);

  43. // Enable PMN{n}
  44. // counter = The counter to enable (e.g. 0 for PMN0, 1 for PMN1)
  45. void disable_pmn(unsigned int counter);

  47. //
  48. // Read counter values
  49. //

  51. // Returns the value of CCNT
  52. unsigned int read_ccnt(void);

  54. // Returns the value of PMN{n}
  55. // counter = The counter to read (e.g. 0 for PMN0, 1 for PMN1)
  56. unsigned int read_pmn(unsigned int counter);

  58. //
  59. // Overflow and interrupts
  60. //

  62. // Returns the value of the overflow flags
  63. unsigned int read_flags(void);

  65. // Writes the overflow flags
  66. void write_flags(unsigned int flags);

  68. // Enables interrupt generation on overflow of the CCNT
  69. void enable_ccnt_irq(void);

  71. // Disables interrupt generation on overflow of the CCNT
  72. void disable_ccnt_irq(void);

  74. // Enables interrupt generation on overflow of PMN{x}
  75. // counter = The counter to enable the interrupt for (e.g. 0 for PMN0, 1 for PMN1)
  76. void enable_pmn_irq(unsigned int counter);

  78. // Disables interrupt generation on overflow of PMN{x}
  79. // counter = r0 = The counter to disable the interrupt for (e.g. 0 for PMN0, 1 for PMN1)
  80. void disable_pmn_irq(unsigned int counter);

  82. //
  83. // Counter reset functions
  84. //

  86. // Resets the programmable counters
  87. void reset_pmn(void);

  89. // Resets the CCNT
  90. void reset_ccnt(void);

  92. //
  93. // Software Increment

  95. // Writes to software increment register
  96. // counter = The counter to increment (e.g. 0 for PMN0, 1 for PMN1)
  97. void pmu_software_increment(unsigned int counter);

  99. //
  100. // User mode access
  101. //

  103. // Enables User mode access to the PMU (must be called in a priviledged mode)
  104. void enable_pmu_user_access(void);

  106. // Disables User mode access to the PMU (must be called in a priviledged mode)
  107. void disable_pmu_user_access(void);

  109. #endif
  110. // ------------------------------------------------------------
  111. // End of v7_pmu.h
  112. // ------------------------------------------------------------
2.pmu_v7.s
该文件里面是相关功能的实现：

点击(此处)折叠或打开

  1. /*------------------------------------------------------------
  2. Performance Monitor Block
  3. ------------------------------------------------------------*/
  4.     .arm @ Make sure we are in ARM mode.
  5.     .text
  6.     .align 2
  7.     .global getPMN @ export this function for the linker

  9. /* Returns the number of progammable counters uint32_t getPMN(void) */

  11. getPMN:
  12.   MRC p15, 0, r0, c9, c12, 0 /* Read PMNC Register */
  13.   MOV r0, r0, LSR #11 /* Shift N field down to bit 0 */
  14.   AND r0, r0, #0x1F /* Mask to leave just the 5 N bits */
  15.   BX lr

  17.   

  19.     .global pmn_config @ export this function for the linker
  20.   /* Sets the event for a programmable counter to record */
  21.   /* void pmn_config(unsigned counter, uint32_t event) */
  22.   /* counter = r0 = Which counter to program (e.g. 0 for PMN0, 1 for PMN1) */
  23.   /* event = r1 = The event code */
  24. pmn_config:
  25.   AND r0, r0, #0x1F /* Mask to leave only bits 4:0 */
  26.   MCR p15, 0, r0, c9, c12, 5 /* Write PMNXSEL Register */
  27.   MCR p15, 0, r1, c9, c13, 1 /* Write EVTSELx Register */
  28.   BX lr

  30.   

  32.     .global ccnt_divider @ export this function for the linker
  33.   /* Enables/disables the divider (1/64) on CCNT */
  34.   /* void ccnt_divider(int divider) */
  35.   /* divider = r0 = If 0 disable divider, else enable dvider */
  36. ccnt_divider:
  37.   MRC p15, 0, r1, c9, c12, 0 /* Read PMNC */

  39.   CMP r0, #0x0 /* IF (r0 == 0) */
  40.   BICEQ r1, r1, #0x08 /* THEN: Clear the D bit (disables the divisor) */
  41.   ORRNE r1, r1, #0x08 /* ELSE: Set the D bit (enables the divisor) */

  43.   MCR p15, 0, r1, c9, c12, 0 /* Write PMNC */
  44.   BX lr
  45.  

  47.   /* --------------------------------------------------------------- */
  48.   /* Enable/Disable */
  49.   /* --------------------------------------------------------------- */

  51.     .global enable_pmu @ export this function for the linker
  52.   /* Global PMU enable */
  53.   /* void enable_pmu(void) */
  54. enable_pmu:
  55.   MRC p15, 0, r0, c9, c12, 0 /* Read PMNC */
  56.   ORR r0, r0, #0x01 /* Set E bit */
  57.   MCR p15, 0, r0, c9, c12, 0 /* Write PMNC */
  58.   BX lr
  59.  


  62.     .global disable_pmu @ export this function for the linker
  63.   /* Global PMU disable */
  64.   /* void disable_pmu(void) */
  65. disable_pmu:
  66.   MRC p15, 0, r0, c9, c12, 0 /* Read PMNC */
  67.   BIC r0, r0, #0x01 /* Clear E bit */
  68.   MCR p15, 0, r0, c9, c12, 0 /* Write PMNC */
  69.   BX lr
  70.  
  71.   

  73.     .global enable_ccnt @ export this function for the linker
  74.   /* Enable the CCNT */
  75.   /* void enable_ccnt(void) */
  76. enable_ccnt:
  77.   MOV r0, #0x80000000 /* Set C bit */
  78.   MCR p15, 0, r0, c9, c12, 1 /* Write CNTENS Register */
  79.   BX lr
  80.  
  81.   

  83.     .global disable_ccnt @ export this function for the linker
  84.   /* Disable the CCNT */
  85.   /* void disable_ccnt(void) */
  86. disable_ccnt:
  87.   MOV r0, #0x80000000 /* Clear C bit */
  88.   MCR p15, 0, r0, c9, c12, 2 /* Write CNTENC Register */
  89.   BX lr
  90.  
  91.   

  93.     .global enable_pmn @ export this function for the linker
  94.   /* Enable PMN{n} */
  95.   /* void enable_pmn(uint32_t counter) */
  96.   /* counter = r0 = The counter to enable (e.g. 0 for PMN0, 1 for PMN1) */
  97. enable_pmn:
  98.   MOV r1, #0x1 /* Use arg (r0) to set which counter to disable */
  99.   MOV r1, r1, LSL r0

  101.   MCR p15, 0, r1, c9, c12, 1 /* Write CNTENS Register */
  102.   BX lr

  104.   

  106.     .global disable_pmn @ export this function for the linker
  107.   /* Enable PMN{n} */
  108.   /* void disable_pmn(uint32_t counter) */
  109.   /* counter = r0 = The counter to enable (e.g. 0 for PMN0, 1 for PMN1) */
  110. disable_pmn:
  111.   MOV r1, #0x1 /* Use arg (r0) to set which counter to disable */
  112.   MOV r1, r1, LSL r0

  114.   MCR p15, 0, r1, c9, c12, 1 /* Write CNTENS Register */
  115.   BX lr
  116.  
  117.   
  118.   
  119.     .global enable_pmu_user_access @ export this function for the linker
  120.   /* Enables User mode access to the PMU (must be called in a priviledged mode) */
  121.   /* void enable_pmu_user_access(void) */
  122. enable_pmu_user_access:
  123.   MRC p15, 0, r0, c9, c14, 0 /* Read PMUSERENR Register */
  124.   ORR r0, r0, #0x01 /* Set EN bit (bit 0) */
  125.   MCR p15, 0, r0, c9, c14, 0 /* Write PMUSERENR Register */
  126.   BX lr
  127.   
  128.   
  129.   
  130.     .global disable_pmu_user_access @ export this function for the linker
  131.   /* Disables User mode access to the PMU (must be called in a priviledged mode) */
  132.   /* void disable_pmu_user_access(void) */
  133. disable_pmu_user_access:
  134.   MRC p15, 0, r0, c9, c14, 0 /* Read PMUSERENR Register */
  135.   BIC r0, r0, #0x01 /* Clear EN bit (bit 0) */
  136.   MCR p15, 0, r0, c9, c14, 0 /* Write PMUSERENR Register */
  137.   BX lr


  140.   /* --------------------------------------------------------------- */
  141.   /* Counter read registers */
  142.   /* --------------------------------------------------------------- */

  144.     .global read_ccnt @ export this function for the linker
  145.   /* Returns the value of CCNT */
  146.   /* uint32_t read_ccnt(void) */
  147. read_ccnt:
  148.   MRC p15, 0, r0, c9, c13, 0 /* Read CCNT Register */
  149.   BX lr


  152.     .global read_pmn @ export this function for the linker
  153.   /* Returns the value of PMN{n} */
  154.   /* uint32_t read_pmn(uint32_t counter) */
  155.   /* counter = r0 = The counter to read (e.g. 0 for PMN0, 1 for PMN1) */
  156. read_pmn:
  157.   AND r0, r0, #0x1F /* Mask to leave only bits 4:0 */
  158.   MCR p15, 0, r0, c9, c12, 5 /* Write PMNXSEL Register */
  159.   MRC p15, 0, r0, c9, c13, 2 /* Read current PMNx Register */
  160.   BX lr
  161.   
  162.   
  163.   /* --------------------------------------------------------------- */
  164.   /* Software Increment */
  165.   /* --------------------------------------------------------------- */

  167.     .global pmu_software_increment @ export this function for the linker
  168.         /* Writes to software increment register */
  169.         /* void pmu_software_increment(uint32_t counter) */
  170.         /* counter = r0 = The counter to increment (e.g. 0 for PMN0, 1 for PMN1) */
  171. pmu_software_increment:
  172.   MOV r1, #0x01
  173.   MOV r1, r1, LSL r0
  174.   MCR p15, 0, r1, c9, c12, 4 /* Write SWINCR Register */
  175.   BX lr

  177.   /* --------------------------------------------------------------- */
  178.   /* Overflow & Interrupt Generation */
  179.   /* --------------------------------------------------------------- */

  181.     .global read_flags @ export this function for the linker
  182.   /* Returns the value of the overflow flags */
  183.   /* uint32_t read_flags(void) */
  184. read_flags:
  185.   MRC p15, 0, r0, c9, c12, 3 /* Read FLAG Register */
  186.   BX lr
  187.   

  189.     .global write_flags @ export this function for the linker
  190.   /* Writes the overflow flags */
  191.   /* void write_flags(uint32_t flags) */
  192. write_flags:
  193.   MCR p15, 0, r0, c9, c12, 3 /* Write FLAG Register */
  194.   BX lr
  195.   

  197.     .global enable_ccnt_irq @ export this function for the linker
  198.   /* Enables interrupt generation on overflow of the CCNT */
  199.   /* void enable_ccnt_irq(void) */
  200. enable_ccnt_irq:
  201.   MOV r0, #0x80000000
  202.   MCR p15, 0, r0, c9, c14, 1 /* Write INTENS Register */
  203.   BX lr

  205.     .global disable_ccnt_irq @ export this function for the linker
  206.   /* Disables interrupt generation on overflow of the CCNT */
  207.   /* void disable_ccnt_irq(void) */
  208. disable_ccnt_irq:
  209.   MOV r0, #0x80000000
  210.   MCR p15, 0, r0, c9, c14, 2 /* Write INTENC Register */
  211.   BX lr
  212.   

  214.     .global enable_pmn_irq @ export this function for the linker
  215.   /* Enables interrupt generation on overflow of PMN{x} */
  216.   /* void enable_pmn_irq(uint32_t counter) */
  217.   /* counter = r0 = The counter to enable the interrupt for (e.g. 0 for PMN0, 1 for PMN1) */
  218. enable_pmn_irq:
  219.   MOV r1, #0x1 /* Use arg (r0) to set which counter to disable */
  220.   MOV r0, r1, LSL r0
  221.   MCR p15, 0, r0, c9, c14, 1 /* Write INTENS Register */
  222.   BX lr

  224.     .global disable_pmn_irq @ export this function for the linker
  225.   /* Disables interrupt generation on overflow of PMN{x} */
  226.   /* void disable_pmn_irq(uint32_t counter) */
  227.   /* counter = r0 = The counter to disable the interrupt for (e.g. 0 for PMN0, 1 for PMN1) */
  228. disable_pmn_irq:
  229.   MOV r1, #0x1 /* Use arg (r0) to set which counter to disable */
  230.   MOV r0, r1, LSL r0
  231.   MCR p15, 0, r0, c9, c14, 2 /* Write INTENC Register */
  232.   BX lr

  234.   /* --------------------------------------------------------------- */
  235.   /* Reset Functions */
  236.   /* --------------------------------------------------------------- */

  238.     .global reset_pmn @ export this function for the linker
  239.   /* Resets the programmable counters */
  240.   /* void reset_pmn(void) */
  241. reset_pmn:
  242.   MRC p15, 0, r0, c9, c12, 0 /* Read PMNC */
  243.   ORR r0, r0, #0x02 /* Set P bit (Event Counter Reset) */
  244.   MCR p15, 0, r0, c9, c12, 0 /* Write PMNC */
  245.   BX lr


  248.         .global reset_ccnt @ export this function for the linker
  249.   /* Resets the CCNT */
  250.   /* void reset_ccnt(void) */
  251. reset_ccnt:
  252.   MRC p15, 0, r0, c9, c12, 0 /* Read PMNC */
  253.   ORR r0, r0, #0x04 /* Set C bit (Event Counter Reset) */
  254.   MCR p15, 0, r0, c9, c12, 0 /* Write PMNC */
  255.   BX lr

  257.  
  258.     .end @end of code, this line is optional.
  259. /* ------------------------------------------------------------ */
  260. /* End of v7_pmu.s */
  261. /* ------------------------------------------------------------ */
可以使用下面的代码测试一下，看看是否能够正确测试出开销来。

点击(此处)折叠或打开

  1. #include "v7_pmu.h"
  2. #include <stdio.h>
  3. #include <time.h>
  4. #include <stdlib.h>

  6. int random_range(int max);
  7. void pmu_start(unsigned int event0,unsigned int event1,unsigned int event2,unsigned int event3,unsigned int event4,unsigned int event5);
  8. void pmu_stop(void);

  10. int main ( int argc, char *argv[] ){
  11. int matrix_size;
  12. int i,j,k,z;



  16. // To access CPU time
  17. clock_t start, end;
  18. double cpu_time_used;

  20.   if ( argc != 2 ) {
  21.     fputs ( "usage: $prog n", stderr );
  22.     exit ( EXIT_FAILURE );
  23.         }

  25.     matrix_size = (int)strtol(argv[1],NULL,10);


  28. printf("square matrix size = %dn", matrix_size);


  31. /*Using time function output for seed value*/
  32.         unsigned int seed = (unsigned int)time(NULL);
  33.         srand(seed);

  35. /* Initialize square matrix with command line input value */
  36. int a[matrix_size][matrix_size], b[matrix_size][matrix_size], c[matrix_size][matrix_size];

  38. /* Intialize both A[][] and B[][] with random values between 0-5 and set C[][] to zero*/
  39.         for(i=0;i<matrix_size;i++){
  40.                 for(j=0;j<matrix_size;j++){
  41.                 a[i][j]=random_range(6);
  42.                 b[i][j]=random_range(6);
  43.                 c[i][j]=0;
  44.                 }
  45.         }

  47. /* Multiply A[][] and B[][] and store into C[][]*/
  48.  start = clock();



  52. for(z=0;z<7;z++){
  53.         if(z==0)
  54.         pmu_start(0x01,0x02,0x03,0x04,0x05,0x06);
  55.         if(z==1)
  56.         pmu_start(0x07,0x08,0x09,0x0A,0x0B,0x0C);
  57.         if(z==2)
  58.         pmu_start(0x0D,0x0E,0x0F,0x10,0x11,0x12);
  59.         if(z==3)
  60.         pmu_start(0x50,0x51,0x60,0x61,0x62,0x63);
  61.         if(z==4)
  62.         pmu_start(0x64,0x65,0x66,0x67,0x68,0x6E);
  63.         if(z==5)
  64.         pmu_start(0x70,0x71,0x72,0x73,0x74,0x81);
  65.         if(z==6)
  66.         pmu_start(0x82,0x83,0x84,0x85,0x86,0x8A);

  68.    for(i=0; i<matrix_size; i++)
  69.    {
  70.          for(j=0; j<matrix_size; j++)
  71.          {
  72.             for(k=0; k<matrix_size; k++)
  73.             {
  74.                   /* c[0][0]=a[0][0]*b[0][0]+a[0][1]*b[1][0]+a[0][2]*b[2][0]; */
  75.                   c[i][j] += a[i][k]*b[k][j];
  76.             }
  77.          }
  78.   }

  80.         pmu_stop();

  82. }
  83.     end = clock();
  84.     cpu_time_used = (end - start) / ((double) CLOCKS_PER_SEC);

  86. printf("CPU time used = %.4lfn",cpu_time_used);
  87. printf("square matrix size = %dn", matrix_size);


  90.   return 0;
  91. }

  93. int random_range(int max){
  94.     return ((rand()%(max-1)) +1);
  95. }



  99. void pmu_start(unsigned int event0,unsigned int event1,unsigned int event2,unsigned int event3,unsigned int event4,unsigned int event5){

  101.   enable_pmu(); // Enable the PMU
  102.   reset_ccnt(); // Reset the CCNT (cycle counter)
  103.   reset_pmn(); // Reset the configurable counters
  104.   pmn_config(0, event0); // Configure counter 0 to count event code 0x03
  105.   pmn_config(1, event1); // Configure counter 1 to count event code 0x03
  106.   pmn_config(2, event2); // Configure counter 2 to count event code 0x03
  107.   pmn_config(3, event3); // Configure counter 3 to count event code 0x03
  108.   pmn_config(4, event4); // Configure counter 4 to count event code 0x03
  109.   pmn_config(5, event5); // Configure counter 5 to count event code 0x03

  111.   enable_ccnt(); // Enable CCNT
  112.   enable_pmn(0); // Enable counter
  113.   enable_pmn(1); // Enable counter
  114.   enable_pmn(2); // Enable counter
  115.   enable_pmn(3); // Enable counter
  116.   enable_pmn(4); // Enable counter
  117.   enable_pmn(5); // Enable counter

  119.   printf("CountEvent0=0x%x,CountEvent1=0x%x,CountEvent2=0x%x,CountEvent3=0x%x,CountEvent4=0x%x,CountEvent5=0x%xn", event0,event1,event2,event3,event4,event5);
  120. }

  122. void pmu_stop(void){
  123.   unsigned int cycle_count, overflow, counter0, counter1, counter2, counter3, counter4, counter5;

  125.   disable_ccnt(); // Stop CCNT
  126.   disable_pmn(0); // Stop counter 0
  127.   disable_pmn(1); // Stop counter 1
  128.   disable_pmn(2); // Stop counter 2
  129.   disable_pmn(3); // Stop counter 3
  130.   disable_pmn(4); // Stop counter 4
  131.   disable_pmn(5); // Stop counter 5

  133.   counter0 = read_pmn(0); // Read counter 0
  134.   counter1 = read_pmn(1); // Read counter 1
  135.   counter2 = read_pmn(2); // Read counter 2
  136.   counter3 = read_pmn(3); // Read counter 3
  137.   counter4 = read_pmn(4); // Read counter 4
  138.   counter5 = read_pmn(5); // Read counter 5

  140.   cycle_count = read_ccnt(); // Read CCNT
  141.   overflow=read_flags(); //Check for overflow flag

  143.   printf("Counter0=%d,Counter1=%d,Counter2=%d,Counter3=%d,Counter4=%d,Counter5=%dn", counter0, counter1,counter2,counter3,counter4,counter5);
  144.   printf("Overflow flag: = %d, Cycle Count: = %d nn", overflow,cycle_count);
  145. }



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