-#if defined(CONFIG_MACH_IXDP2351) +#if defined(CONFIG_MACH_ADS270) +static u16 +readword(unsigned long base_addr, int portno) +{ + return __raw_readw(base_addr + portno); +} + +static void +writeword(unsigned long base_addr, int portno, u16 value) +{ + __raw_writew(value, base_addr + portno); +} +#elif defined(CONFIG_MACH_IXDP2351) static u16 readword(unsigned long base_addr, int portno) { @@ -630,7 +659,17 @@ dev->base_addr);
reset_chip(dev); - +#ifdef CONFIG_MACH_ADS270 + lp->force = FORCE_RJ45; + lp->auto_neg_cnf = IMM_BIT; + + dev->dev_addr[0] = 0x12; + dev->dev_addr[1] = 0x34; + dev->dev_addr[2] = 0x56; + dev->dev_addr[3] = 0x78; + dev->dev_addr[4] = 0x9a; + dev->dev_addr[5] = 0x00; +#endif /* Here we read the current configuration of the chip. If there is no Extended EEPROM then the idea is to not disturb the chip configuration, it should have been correctly setup by automatic @@ -1273,7 +1312,7 @@ int i; int ret;
-#if !defined(CONFIG_SH_HICOSH4) && !defined(CONFIG_ARCH_PNX010X) /* uses irq#1, so this won't work */ +#if !defined(CONFIG_MACH_ADS270) && !defined(CONFIG_SH_HICOSH4) && !defined(CONFIG_ARCH_PNX010X) /* uses irq#1, so this won't work */ if (dev->irq < 2) { /* Allow interrupts to be generated by the chip */ /* Cirrus' release had this: */ @@ -1304,7 +1343,7 @@ else #endif { -#if !defined(CONFIG_MACH_IXDP2351) && !defined(CONFIG_ARCH_IXDP2X01) && !defined(CONFIG_ARCH_PNX010X) +#if !defined(CONFIG_MACH_ADS270) && !defined(CONFIG_MACH_IXDP2351) && !defined(CONFIG_ARCH_IXDP2X01) && !defined(CONFIG_ARCH_PNX010X) if (((1 << dev->irq) & lp->irq_map) == 0) { printk(KERN_ERR "%s: IRQ %d is not in our map of allowable IRQs, which is %x\n", dev->name, dev->irq, lp->irq_map); @@ -1319,6 +1358,7 @@ writereg(dev, PP_BusCTL, ENABLE_IRQ | MEMORY_ON); #endif write_irq(dev, lp->chip_type, dev->irq); + set_irq_type(dev->irq, IRQT_RISING); ret = request_irq(dev->irq, &net_interrupt, 0, dev->name, dev); if (ret) { if (net_debug)