S3C2410-UDA1341声卡移植--驱动源码分析(1)

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//#include 3C2410.h>

#define PFX "s3c2410-uda1341-superlp: "

#define MAX_DMA_CHANNELS 0

/* The S3C2410 has four internal DMA channels. */

/*S3C2410芯片上有4通道的DMA*/

#define MAX_S3C2410_DMA_CHANNELS S3C2410_DMA_CHANNELS

 /*DMA的4通道*/

#define DMA_CH0 0

#define DMA_CH1 1

#define DMA_CH2 2

#define DMA_CH3 3

#define DMA_BUF_WR 1

#define DMA_BUF_RD 0

/*写DMA寄存器函数*/

#define dma_wrreg(chan, reg, val) __raw_writel((val), (chan)->regs + (reg))

static struct clk *iis_clock; /*IIS时钟的结构体*/

static void __iomem *iis_base;/*IIS的基址在这里是IIS的虚拟地址*/

static struct s3c2410_dma_client s3c2410iis_dma_out= {

.name = "I2SSDO",

};/*S3C2410的IIS的音频输出对应UDA1341的音频输入*/

 

static struct s3c2410_dma_client s3c2410iis_dma_in = {

.name = "I2SSDI",

};/*S3C2410的IIS的音频输入对应UDA1341的音频输出*/

#ifdef DEBUG

#define DPRINTK printk

#else

#define DPRINTK( x... )

#endif

 

static void init_s3c2410_iis_bus_rx(void);/*IIS总线的接受函数*/

static void init_s3c2410_iis_bus_tx(void);/*IIS总线的发送函数*/

#define DEF_VOLUME 65

 

/* UDA1341 Register bits *//*UDA1341控制寄存器位设置*/

#define UDA1341_ADDR 0x14 

 

#define UDA1341_REG_DATA0 (UDA1341_ADDR + 0)

#define UDA1341_REG_STATUS (UDA1341_ADDR + 2)

 

/* status control *//*UDA1341状态控制寄存器*/

#define STAT0 (0x00)   /*由第8位控制状态的选择,0为状态0,1为状态1*/

#define STAT0_RST (1 << 6)    /*set reset bit*/ 

#define STAT0_SC_MASK (3 << 4)

#define STAT0_SC_512FS (0 << 4) /*set system clock 512fs*/

#define STAT0_SC_384FS (1 << 4) /*set system clock 384fs*/

 

#define STAT0_SC_256FS (2 << 4) /*set system clock 256fs*/

#define STAT0_IF_MASK (7 << 1)

#define STAT0_IF_I2S (0 << 1)  /*set the function of i2s*/

#define STAT0_IF_LSB16 (1 << 1) /*LSB-justified 16 bits*/

#define STAT0_IF_LSB18 (2 << 1) /*LSB-justified 18 bits*/

#define STAT0_IF_LSB20 (3 << 1) /*LSB-justified 20 bits*/

#define STAT0_IF_MSB (4 << 1)   /*MSB-justified*/

/*LSB-justified 16 bits input and MSB-justified output*/

#define STAT0_IF_LSB16MSB (5 << 1)

/*LSB-justified 18 bits input and MSB-justified output*/                               

#define STAT0_IF_LSB18MSB (6 << 1)

/*LSB-justified 20 bits input and MSB-justified output*/

#define STAT0_IF_LSB20MSB (7 << 1)

 

#define STAT0_DC_FILTER (1 << 0)/*有DC滤波*/

#define STAT0_DC_NO_FILTER (0 << 0) /*没有DC滤波*/

 

 

#define STAT1 (0x80)   /*status control set model 1*/

#define STAT1_DAC_GAIN (1 << 6)  /* gain of DAC */

#define STAT1_ADC_GAIN (1 << 5)  /* gain of ADC */

#define STAT1_ADC_POL (1 << 4)  /* polarity of ADC */

#define STAT1_DAC_POL (1 << 3) /* polarity of DAC */

#define STAT1_DBL_SPD (1 << 2) /* double speed playback */

#define STAT1_ADC_ON (1 << 1) /* ADC powered */

#define STAT1_DAC_ON (1 << 0) /* DAC powered */

 

/* data0 direct control */

#define DATA0 (0x00)   /*model 0 volume control*/

#define DATA0_VOLUME_MASK (0x3f)

#define DATA0_VOLUME(x) (x)

 

#define DATA1 (0x40)

#define DATA1_BASS(x) ((x) << 2)

#define DATA1_BASS_MASK (15 << 2)

#define DATA1_TREBLE(x) ((x))

#define DATA1_TREBLE_MASK (3)

 

#define DATA2 (0x80)

#define DATA2_PEAKAFTER (0x1 << 5)

#define DATA2_DEEMP_NONE (0x0 << 3)

#define DATA2_DEEMP_32KHz (0x1 << 3)

#define DATA2_DEEMP_44KHz (0x2 << 3)

#define DATA2_DEEMP_48KHz (0x3 << 3)

#define DATA2_MUTE (0x1 << 2)

#define DATA2_FILTER_FLAT (0x0 << 0)

#define DATA2_FILTER_MIN (0x1 << 0)

#define DATA2_FILTER_MAX (0x3 << 0)

/* data0 extend control */

#define EXTADDR(n) (0xc0 | (n))

#define EXTDATA(d) (0xe0 | (d))

 

#define EXT0 0

#define EXT0_CH1_GAIN(x) (x)

#define EXT1 1

#define EXT1_CH2_GAIN(x) (x)

#define EXT2 2

#define EXT2_MIC_GAIN_MASK (7 << 2)

#define EXT2_MIC_GAIN(x) ((x) << 2)

#define EXT2_MIXMODE_DOUBLEDIFF (0)

#define EXT2_MIXMODE_CH1 (1)

#define EXT2_MIXMODE_CH2 (2)

#define EXT2_MIXMODE_MIX (3)

#define EXT4 4

#define EXT4_AGC_ENABLE (1 << 4)

#define EXT4_INPUT_GAIN_MASK (3)

#define EXT4_INPUT_GAIN(x) ((x) & 3)

#define EXT5 5

#define EXT5_INPUT_GAIN(x) ((x) >> 2)

#define EXT6 6

#define EXT6_AGC_CONSTANT_MASK (7 << 2)

#define EXT6_AGC_CONSTANT(x) ((x) << 2)

#define EXT6_AGC_LEVEL_MASK (3)

#define EXT6_AGC_LEVEL(x) (x)

 

#define AUDIO_NAME "UDA1341"

#define AUDIO_NAME_VERBOSE "UDA1341 audio driver"

 

#define AUDIO_FMT_MASK (AFMT_S16_LE)

#define AUDIO_FMT_DEFAULT (AFMT_S16_LE)

 

#define AUDIO_CHANNELS_DEFAULT 2

#define AUDIO_RATE_DEFAULT 44100

 

#define AUDIO_NBFRAGS_DEFAULT 8

#define AUDIO_FRAGSIZE_DEFAULT 8192

 

#define S_CLOCK_FREQ 384

#define PCM_ABS(a) (a < 0 ? -a : a)

 

typedef struct {

int size; /* buffer size */

char *start; /* point to actual buffer */

dma_addr_t dma_addr; /* physical buffer address */

struct semaphore sem; /* down before touching the buffer */

int master; /* owner for buffer allocation, contain size when true */

} audio_buf_t;

 

typedef struct {

audio_buf_t *buffers; /* pointer to audio buffer structures */

audio_buf_t *buf; /* current buffer used by read/write */

u_int buf_idx; /* index for the pointer above */

u_int fragsize; /* fragment i.e. buffer size */

u_int nbfrags; /* nbr of fragments */

dmach_t dma_ch; /* DMA channel (channel2 for audio) */

u_int dma_ok;

} audio_stream_t;

 

static audio_stream_t output_stream;

static audio_stream_t input_stream; /* input */

 

#define NEXT_BUF(_s_,_b_) { \

(_s_)->_b_##_idx++; \

(_s_)->_b_##_idx %= (_s_)->nbfrags; \

(_s_)->_b_ = (_s_)->buffers + (_s_)->_b_##_idx; }

 

 

static u_int audio_rate;

static int audio_channels;

static int audio_fmt;

static u_int audio_fragsize;

static u_int audio_nbfrags;

 

 

static int audio_rd_refcount;

static int audio_wr_refcount;

#define audio_active (audio_rd_refcount | audio_wr_refcount)

 

static int audio_dev_dsp;

static int audio_dev_mixer;

static int audio_mix_modcnt;

 

static int uda1341_volume;

//static u8 uda_sampling;

static int uda1341_boost;

static int mixer_igain=0x4; /* -6db*/