分类:
2008-09-26 11:34:40
今天做了UART的实验。一开始一直不理解程序开始的
GPHCON |= 0xa0; //GPH2,GPH3 used as TXD0,RXD0
GPHUP = 0x0c; //GPH2,GPH3禁止内部上拉
这两句。
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后来查看S3C2410X的手册
GPH4 [9:8] 00 = Input 01 = Output
10 = TXD1 11 = Reserved
GPH3 [7:6] 00 = Input 01 = Output
10 = RXD0 11 = reserved
GPH2 [5:4] 00 = Input 01 = Output
10 = TXD0 11 = Reserved
GPH1 [3:2] 00 = Input 01 = Output
10 = nRTS0 11 = Reserved
GPH0 [1:0] 00 = Input 01 = Output
10 = nCTS0 11 = Reserved
才知道这么回事。
另外代码
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也可以参看手册一下内容
UTRSTATn | Bit | Description | Initial State |
Transmitter empty | 2 | Set to 1 automatically when the transmit buffer register has no valid data to transmit and the transmit shift register is empty. 0 = Not empty 1 = Transmitter (transmit buffer & shifter register) empty | 1 |
Transmit buffer empty | 1 | Set to 1 automatically when transmit buffer register is empty. 0 =The buffer register is not empty 1 = Empty (In Non-FIFO mode, Interrupt or DMA is requested. In FIFO mode, Interrupt or DMA is requested, when Tx FIFO Trigger Level is set to 00 (Empty)) If the UART uses the FIFO, users should check Tx FIFO Count bits and Tx FIFO Full bit in the UFSTAT register instead of this bit. | 1 |
Receive buffer data ready | 0 | Set to 1 automatically whenever receive buffer register contains valid data, received over the RXDn port. 0 = Empty 1 = The buffer register has a received data (In Non-FIFO mode, Interrupt or DMA is requested) If the UART uses the FIFO, users should check Rx FIFO Count bits and Rx FIFO Full bit in the UFSTAT register instead of this bit. | 0 |