A Vendor Specific Data Block (if any) contains as its first three bytes the vendor's IEEE
24-bit registration number, LSB first. For HDMI, it is always 00-0C-03 for HDMI Licensing, LLC.
It is followed by a two byte source physical address, LSB first. The source physical address
provides the CEC physical address for upstream CEC devices.
The remainder of the Vendor Specific Data Block is the "data payload",which can be anything the
vendor considers worthy of inclusion in this EDID extension block. HDMI 1.3a specifies some
requirements for the data payload. See that spec for detailed info on these bytes:
VSD Byte 1-3 IEEE Registration Identifier (LSB First)
VSD Byte 4-5 Components of Source Physical Address (See section 8.7 of HDMI 1.3a)
VSD Byte 6 (optional) (bits are set if sink supports...):
bit 7: Supports_AI (...a function that needs info from ACP or ISRC packets)
bit 6: DC_48bit (...16-bit-per-channel deep color)
bit 5: DC_36bit (...12-bit-per-channel deep color)
bit 4: DC_30bit (...10-bit-per-channel deep color)
bit 3: DC_Y444 (...4:4:4 in deep color modes)
bit 2: Reserved (0)
bit 1: Reserved (0)
bit 0: DVI_Dual (...DVI Dual Link Operation)
VSD Byte 7 (optional) If non-zero (Max_TMDS_Frequency / 5mhz)
VSD Byte 8 (optional) (latency fields indicators):
bit 7: latency_fields (set if latency fields are present)
bit 6: i_latency_fields (set if interlaced latency fields are present; if set
four latency fields will be present, 0 if bit 7 is 0)
bits 5-0: Reserved (0)
VSD Byte 9 (optional) Video Latency (if indicated, value=1+ms/2 with a max of 251 meaning 500ms)
VSD Byte 10 (optional) Audio Latency (video delay for progressive sources, same units as above)
VSD Byte 11 (optional) Interlaced Video Latency (if indicated, same units as above)
VSD Byte 12 (optional) Interlaced Audio Latency (video delay for interlaced sources, same units as above)
Additional bytes may be present, but the HDMI spec says they shall be zero.
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0x02,0x3A,0x80,0x18,0x71,0x38,0x2D,0x40,0x58,0x2C,0x45,0x00,0xC4,0x8E,0x21,0x00,0x00,0x9E
这组 Detailed Timing Descriptor 被解释为1920*2160i ?????