重新开始，做回自我，爱拼的男人最牛！
分类： LINUX
2010-04-02 20:58:45
1、修改linux-2.6.28目录下的Makefile
将
ARCH ?= $(SUBARCH)
CROSS_COMPILE ?=
改为
ARCH ?= arm
CROSS_COMPILE ?=/opt/arm-linux-4.2.1/bin/arm-linux-
相当于指定CPU的架构（arm）和交*编译工具链的绝对路径，因为本人一直不太喜欢将交*编译工具链所在的路径添加到Linux的环境变量(如修改~/.bash_profile文件)，所有一般采用绝对路径或自己编写切换环境变量Shell脚本来实现。
2、在linux-2.6.28/arch/arm/mach-pxa目录下增加一个xsbase270.c文件（实际上从该目录下的mainstone.c复制而来），然后根据实际平台进行修改。
/*
* linux/arch/arm/mach-pxa/xsbase270.c
*
* Support for Emdoor EELIOD (XSBASE270edr) board
*
* Author: Nicolas Pitre
* Created: Nov 05, 2002
* Copyright: MontaVista Software Inc.
*
* modified from linux/arch/arm/mach-pxa/mainstone.c
* by Adam Ward (adam.ward@intel.com) in 2005
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
#include
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#include "generic.h"
#include "devices.h"
/*
static unsigned long xsbase270_pin_config[] = {
// Chip Select
//GPIO15_nCS_1,
// BTUART
GPIO42_BTUART_RXD,
GPIO43_BTUART_TXD,
// GPIO44_BTUART_CTS,
// GPIO45_BTUART_RTS,
// FFUART
GPIO34_FFUART_RXD,
GPIO39_FFUART_TXD,
// STUART
GPIO46_STUART_RXD,
GPIO47_STUART_TXD,
// LCD - 16bpp Active TFT
GPIO58_LCD_LDD_0,
GPIO59_LCD_LDD_1,
GPIO60_LCD_LDD_2,
GPIO61_LCD_LDD_3,
GPIO62_LCD_LDD_4,
GPIO63_LCD_LDD_5,
GPIO64_LCD_LDD_6,
GPIO65_LCD_LDD_7,
GPIO66_LCD_LDD_8,
GPIO67_LCD_LDD_9,
GPIO68_LCD_LDD_10,
GPIO69_LCD_LDD_11,
GPIO70_LCD_LDD_12,
GPIO71_LCD_LDD_13,
GPIO72_LCD_LDD_14,
GPIO73_LCD_LDD_15,
GPIO74_LCD_FCLK,
GPIO75_LCD_LCLK,
GPIO76_LCD_PCLK,
GPIO77_LCD_BIAS,
GPIO16_PWM0_OUT, // Backlight
// MMC
GPIO32_MMC_CLK,
GPIO112_MMC_CMD,
GPIO92_MMC_DAT_0,
GPIO109_MMC_DAT_1,
GPIO110_MMC_DAT_2,
GPIO111_MMC_DAT_3,
// USB Host Port 1
GPIO88_USBH1_PWR,
GPIO89_USBH1_PEN,
// PC Card
GPIO48_nPOE,
GPIO49_nPWE,
GPIO50_nPIOR,
GPIO51_nPIOW,
GPIO85_nPCE_1,
GPIO54_nPCE_2,
GPIO79_PSKTSEL,
GPIO55_nPREG,
GPIO56_nPWAIT,
GPIO57_nIOIS16,
// AC97
GPIO45_AC97_SYSCLK,
// Keypad
GPIO93_KP_DKIN_0,
GPIO94_KP_DKIN_1,
GPIO95_KP_DKIN_2,
GPIO100_KP_MKIN_0 | WAKEUP_ON_LEVEL_HIGH,
GPIO101_KP_MKIN_1 | WAKEUP_ON_LEVEL_HIGH,
GPIO102_KP_MKIN_2 | WAKEUP_ON_LEVEL_HIGH,
GPIO97_KP_MKIN_3 | WAKEUP_ON_LEVEL_HIGH,
GPIO98_KP_MKIN_4 | WAKEUP_ON_LEVEL_HIGH,
GPIO99_KP_MKIN_5 | WAKEUP_ON_LEVEL_HIGH,
GPIO103_KP_MKOUT_0,
GPIO104_KP_MKOUT_1,
GPIO105_KP_MKOUT_2,
GPIO106_KP_MKOUT_3,
GPIO107_KP_MKOUT_4,
GPIO108_KP_MKOUT_5,
GPIO96_KP_MKOUT_6,
GPIO1_GPIO | WAKEUP_ON_EDGE_BOTH,
};
*/
extern unsigned long xsbase270edr_bcr= 0x000003c0;
static struct resource flash_resources = {
.start = PXA_CS0_PHYS,
.end = PXA_CS0_PHYS + SZ_32M - 1,
.flags = IORESOURCE_MEM,
};
static struct mtd_partition xsbase270flash_partitions[] = {
{
.name = "Bootloader",
.size = 0x00040000,
.offset = 0,
.mask_flags = MTD_WRITEABLE /* force read-only */
},{
.name = "Kernel",
.size = 0x00200000,
.offset = 0x00040000,
},{
.name = "Filesystem",
.size = MTDPART_SIZ_FULL,
.offset = 0x00240000
}
};
static struct flash_platform_data xsbase270_flash_data = {
.map_name = "cfi_probe",
.parts = xsbase270flash_partitions,
.nr_parts = ARRAY_SIZE(xsbase270flash_partitions),
};
static struct platform_device xsbase270_flash_device = {
.name = "pxa2xx-flash",
.id = 0,
.dev = {
.platform_data = &xsbase270_flash_data,
},
.resource = &flash_resources,
.num_resources = 1,
};
static void __init xsbase270_init_irq(void)
{
pxa27x_init_irq();
pxa_gpio_mode(22 | GPIO_IN);
set_irq_type(XSBEDR_CF_IRQ, IRQ_TYPE_EDGE_RISING);
pxa_gpio_mode(10);// | GPIO_IN);
set_irq_type(IRQ_GPIO(10), IRQ_TYPE_EDGE_RISING);
pxa_gpio_mode(13 | GPIO_IN);
set_irq_type(XSBDVK_AC97_IRQ, IRQ_TYPE_EDGE_RISING);
pxa_gpio_mode(12 | GPIO_IN);
set_irq_type(XSBEDR_CF_DETECT_IRQ,IRQ_TYPE_EDGE_BOTH);
}
static int xsbase270_mci_init(struct device *dev, irq_handler_t xsb_detect_int, void *data)
{
unsigned long status;//,flip;
int err;
pxa_gpio_mode(GPIO32_MMCCLK_MD);
pxa_gpio_mode(GPIO112_MMCCMD_MD);
pxa_gpio_mode(GPIO92_MMCDAT0_MD);
pxa_gpio_mode(GPIO109_MMCDAT1_MD);
pxa_gpio_mode(GPIO110_MMCDAT2_MD);
pxa_gpio_mode(GPIO111_MMCDAT3_MD);
status=XSBEDR_STATUS & 0x01fff;
if(status & XSBEDR_STATUS_MMC_DETECT)
{
err = request_irq(XSBEDR_CF_DETECT_IRQ, xsb_detect_int, IRQF_DISABLED,
"MMC card detect", data);
if (err) {
printk(KERN_ERR "xsb_mci_init: MMC/SD: can't request MMC card detect IRQ\n");
return -1;
}
}
return 0;
}
static void xsbase270_mci_setpower(struct device *dev,unsigned int vdd)
{
struct pxamci_platform_data *p_d=dev->platform_data;
if((1<
XSBEDR_MMC_PWR_ON;
}
else {
XSBEDR_MMC_PWR_ON;
}
}
static void xsbase270_mci_exit(struct device *device,void *data)
{
free_irq(XSBEDR_CF_DETECT_IRQ,data);
}
static struct pxamci_platform_data xsbase270_mci_platform_data= {
.ocr_mask = MMC_VDD_32_33|MMC_VDD_33_34,
.init =xsbase270_mci_init,
.detect_delay =1,
.setpower = xsbase270_mci_setpower,
.exit =xsbase270_mci_exit,
};
static struct resource smc91x_resources[] = {
[0] = {
.start = (XSBEDR_ETH_PHYS + 0x300),
.end = (XSBEDR_ETH_PHYS + 0xfffff),
.flags = IORESOURCE_MEM,
},
[1] = {
.start =IRQ_GPIO(10),// XSBDVK_ETH_IRQ,
.end = IRQ_GPIO(10),//XSBDVK_ETH_IRQ,
.flags = IORESOURCE_IRQ,
}
};
static struct smc91x_platdata xsbase270_smc91x_info = {
.flags = SMC91X_USE_16BIT | SMC91X_NOWAIT | SMC91X_USE_DMA,
};
static struct platform_device smc91x_device = {
.name = "smc91x",
.id = 0,
.num_resources = ARRAY_SIZE(smc91x_resources),
.resource = smc91x_resources,
.dev = {
.platform_data = &xsbase270_smc91x_info,
},
};
static int xsbase270_audio_startup(struct snd_pcm_substream *substream, void *priv)
{
if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
{
xsbase270edr_bcr &= ~XSBEDR_BCR_SPKR_OFF;
xsbase270edr_bcr |=XSBEDR_BCR_AUDIO_PWR_ON;
XSBEDR_BCR=xsbase270edr_bcr;
}
return 0;
}
static void xsbase270_audio_shutdown(struct snd_pcm_substream *substream, void *priv)
{
if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
xsbase270edr_bcr |= XSBEDR_BCR_SPKR_OFF;
xsbase270edr_bcr &= ~XSBEDR_BCR_AUDIO_PWR_ON;
XSBEDR_BCR=xsbase270edr_bcr;
}
static long xsbase270_audio_suspend_mask;
static void xsbase270_audio_suspend(void *priv)
{
xsbase270_audio_suspend_mask = XSBEDR_BCR;
xsbase270edr_bcr |= XSBEDR_BCR_SPKR_OFF;
xsbase270edr_bcr &= ~XSBEDR_BCR_AUDIO_PWR_ON;
XSBEDR_BCR=xsbase270edr_bcr;
}
static void xsbase270_audio_resume(void *priv)
{
xsbase270_audio_suspend_mask |= ~XSBEDR_BCR_SPKR_OFF;//~MST_MSCWR2_AC97_SPKROFF;
xsbase270_audio_suspend_mask &= XSBEDR_BCR_AUDIO_PWR_ON;//~MST_MSCWR2_AC97_SPKROFF;
XSBEDR_BCR &=xsbase270_audio_suspend_mask;
}
static pxa2xx_audio_ops_t xsbase270_audio_ops = {
.startup = xsbase270_audio_startup,
.shutdown = xsbase270_audio_shutdown,
.suspend = xsbase270_audio_suspend,
.resume = xsbase270_audio_resume,
};
static struct platform_device xsbase270_audio_device = {
.name = "pxa2xx-ac97",
.id = -1,
.dev = { .platform_data = &xsbase270_audio_ops },
};
static struct platform_device *platform_devices[] __initdata = {
&smc91x_device,
&xsbase270_audio_device,
&xsbase270_flash_device,
};
static int xsbase270_ohci_init(struct device *dev)
{
/* setup Port1 GPIO pin. */
pxa_gpio_mode( 88 | GPIO_ALT_FN_1_IN); /* USBHPWR1 */
pxa_gpio_mode( 89 | GPIO_ALT_FN_2_OUT); /* USBHPEN1 */
/* Set the Power Control Polarity Low and Power Sense
Polarity Low to active low. */
/* UHCHR = (UHCHR | UHCHR_PCPL | UHCHR_PSPL) &
~(UHCHR_SSEP1 | UHCHR_SSEP2 | UHCHR_SSEP3 | UHCHR_SSE);
*/
return 0;
}
static struct pxaohci_platform_data xsbase270_ohci_platform_data = {
.port_mode = PMM_PERPORT_MODE,
.init = xsbase270_ohci_init,
.flags = ENABLE_PORT_ALL | POWER_CONTROL_LOW | POWER_SENSE_LOW,
};
static void xsbase270_backlight_power(int on)
{
if (on) {
XSBEDR_LCD_PWR_ON;
} else {
XSBEDR_LCD_PWR_OFF;
}
}
static struct pxafb_mode_info lb064v02_mode __initdata = {
#ifdef CONFIG_MACH_XSBASE270Liod
.pixclock = 50000,//500000,
#else
.pixclock = 400000,
#endif
.xres = 640,
.xres = 640,
.yres = 480,
.bpp = 16,
.hsync_len = 48,
#ifdef CONFIG_MACH_XSBASE270Liod
.left_margin = 90,
.right_margin = 10,
#else
.left_margin = 56,
.right_margin = 15,
#endif
.vsync_len = 3,
.upper_margin = 33,
.lower_margin = 10,
.sync = FB_SYNC_HOR_HIGH_ACT|FB_SYNC_VERT_HIGH_ACT,
};
static struct pxafb_mach_info xsbase270_pxafb_info = {
.num_modes = 1,
.lccr0 = LCCR0_Act,
.lccr3 = LCCR3_PCP,
.lcd_conn = LCD_COLOR_TFT_16BPP | LCD_PCLK_EDGE_FALL,
.pxafb_backlight_power = xsbase270_backlight_power,
};
static void __init xsbase270_init(void)
{
/*
struct rtc_time wtime;
wtime=get_rtc4513_time();
xtime.tv_sec=mktime(wtime.tm_year,wtime.tm_mon,wtime.tm_mday,wtime.tm_hour,wtime.tm_min,wtime.tm_sec);
*/
ARB_CNTRL = ARB_CORE_PARK | 0x234;
// pxa2xx_mfp_config(ARRAY_AND_SIZE(xsbase270_pin_config));
pxa_gpio_mode(GPIO45_SYSCLK_AC97_MD);
platform_add_devices(platform_devices, ARRAY_SIZE(platform_devices));
xsbase270_pxafb_info.modes=&lb064v02_mode;
set_pxa_fb_info(&xsbase270_pxafb_info);
pxa_set_ohci_info(&xsbase270_ohci_platform_data);
pxa_set_mci_info(&xsbase270_mci_platform_data);
}
static struct map_desc xsbase270_io_desc[] __initdata = {
{
.virtual =XSBEDR_FPGA_VIRT,
.pfn =__phys_to_pfn(XSBEDR_FPGA_PHYS),
.length =0x00100000,
.type =MT_DEVICE
}, /* CPLD */
{
.virtual =0xF7000000,
.pfn =__phys_to_pfn(0x10700000),
.length =0x00100000,
.type =MT_DEVICE
}, /*rtc*/
};
static void __init xsbase270_map_io(void)
{
pxa_map_io();
iotable_init(xsbase270_io_desc, ARRAY_SIZE(xsbase270_io_desc));
}
MACHINE_START(XSBASE270, "EELIOD (XSBASE270EDR) Development Platform")
.phys_io = 0x40000000,
.boot_params = 0xa0000100, /* BLOB boot parameter setting */
.io_pg_offst = (io_p2v(0x40000000) >> 18) & 0xfffc,
.map_io = xsbase270_map_io,
.init_irq = xsbase270_init_irq,
.timer = &pxa_timer,
.init_machine = xsbase270_init,
MACHINE_END
3、在linux-2.6.28\arch\arm\mach-pxa\include\mach目录下增加一个xsbase270.h的头文件，基本上从公司Linux-2.4.x内核中复制过来的，没有修改（严重抄袭，嘿....)。
/*
* linux/include/asm-arm/arch-pxa/XSBEDRase270edr.h
*
* Modified from linux/include/asm-arm/arch-pxa/mainstone.h
* for Sandgate2 board by Adam Ward
*
* Copyright 2005 (c) Intel Corporation
*
* Orignal Author: Nicolas Pitre
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
#ifndef __ASSEMBLY__
extern unsigned long xsbase270edr_bcr;
#endif
#define XSBEDR_FPGA_PHYS (0x0A000000) /* PXA_CS2_PHYS and A25=1*/
#define XSBEDR_FPGA_VIRT (0xf0000000) /* phys 0x08000000 */
#define XSBEDR_ETH_PHYS PXA_CS3_PHYS
#define XSBEDR_P2V(x) ((x) - XSBEDR_FPGA_PHYS + XSBEDR_FPGA_VIRT)
#define XSBEDR_V2P(x) ((x) - XSBEDR_FPGA_VIRT + XSBEDR_FPGA_PHYS)
#ifndef __ASSEMBLY__
# define __XSBEDR_REG(x) (*((volatile unsigned long *)XSBEDR_P2V(x)))
#else
# define __XSBEDR_REG(x) XSBEDR_P2V(x)
#endif
/* XSBEDRASE270EDR BCR (Board Control Register) */
#define XSBEDR_BCR __XSBEDR_REG((XSBEDR_FPGA_PHYS + 0x00000000))
#define XSBEDR_BCR_CF_PWR_ON 0x00000001 // cf power enable
#define XSBEDR_BCR_CF_RESET 0x00000002 // cf/daughter card reset
#define XSBEDR_BCR_IRDA_FSEL 0x00000004 // irda frequency select
#define XSBEDR_BCR_IRDA_MD0 0x00000008 // irda module MD0 0=low, 1=high
#define XSBEDR_BCR_IRDA_MD1 0x00000010 // irda module MD1 0=low, 1=high
#define XSBEDR_BCR_nCF_BUS_ON 0x00000020 // cf bus enable 0=ena, 1=disable
#define XSBEDR_BCR_AUDIO_PWR_ON 0x00000040 // audio power enable 0=off,1=on
#define XSBEDR_BCR_CPLD_IN 0x00000080 // cpld input enable 0=low
#define XSBEDR_BCR_LCD_PWR_ON 0x00000100 // lcd power enable 0=off,1=on
#define XSBEDR_BCR_RS232ON 0x00000200 // rs232 enable 0=dis,1=ena
#define XSBEDR_BCR_PSKTSEL 0x00000400 // PCMCIA socket sel
#define XSBEDR_BCR_EOT 0x00000800 // USB ctrlr EOT, 0=low,1=high
#define XSBEDR_BCR_REDLED 0x00001000 // red LED, 0=on 1=off
#define XSBEDR_BCR_GRNLED 0x00002000 // green LED, 0=on 1=off
#define XSBEDR_BCR_SPKR_OFF 0x00004000 // audio amp enable 0=off,1=on
#define XSBEDR_BCR_MMC_PWR_ON 0x00008000 // mmc power enable 0=off,1=on
#define XSBEDR_BCR_MS_PWR_ON 0x00010000 // mem stick power 0=off,1=on
#define XSBEDR_BCR_MBREQ_EN 0x00020000 // ext board mbreq 0=notuse 1=use
#define XSBEDR_BCR_SRESET 0x00040000 // usb2ctrlr reset 1=assert
#define XSBEDR_BCR_VBUS1_ON 0x00080000 // usb1.1slave pullup 1=on
#define XSBEDR_BCR_EX_0UT0 0x00100000 // ext.board output
#define XSBEDR_BCR_EX_0UT1 0x00200000 // ext.board output
#define XSBEDR_STATUS __XSBEDR_REG((XSBEDR_FPGA_PHYS + 0x00000004))
#define XSBEDR_STATUS_3POS_SW1 0x00000001 //left |
#define XSBEDR_STATUS_3POS_SW2 0x00000002 //right |--3 pos switch value
#define XSBEDR_STATUS_3POS_SW3 0x00000004 //push |
#define XSBEDR_STATUS_SW1 0x00000008 //switch 1 - push: 0
#define XSBEDR_STATUS_SW2 0x00000010 //switch 2 - push: 0
#define XSBEDR_STATUS_SW3 0x00000020 //switch 3 - push: 0
#define XSBEDR_STATUS_DIP_DATA 0x00000040 //DIP switch DIP_DATA bit
#define XSBEDR_STATUS_CF_BVD1 0x00000080 //read CF_BVD1 terminal status
#define XSBEDR_STATUS_CF_BVD2 0x00000100 //read CF_BVD2 terminal status
#define XSBEDR_STATUS_CF_DETECT 0x00000200 //Detect CF card:1
#define XSBEDR_STATUS_MMC_WP 0x00000400 //MMC WP terminal status. low at lock
#define XSBEDR_STATUS_MMC_DETECT 0x00000800 //Detect MMC card:1
#define XSBEDR_STATUS_nSIM_DETECT 0x00001000 //Detect SIM card:0
#define XSBEDR_STATUS_nEXB_PRES 0x00002000 //Connect with extension board:0
#define XSBEDR_STATUS_EX_IN0 0x00004000 //Read input signal from ext. board
#define XSBEDR_STATUS_EX_IN1 0x00008000 //Read input signal from ext. board
//-----------------------------------
// Board Config register opration
//-----------------------------------
#define XSBEDR_BCR_SETBIT(x){\
xsbase270edr_bcr |=x;\
XSBEDR_BCR = xsbase270edr_bcr;\
}
#define XSBEDR_BCR_CLEARBIT(x){\
xsbase270edr_bcr &=~(x);\
XSBEDR_BCR = xsbase270edr_bcr;\
}
#define XSBEDR_RED_LED_ON\
XSBEDR_BCR_SETBIT(XSBEDR_BCR_REDLED)
#define XSBEDR_RED_LED_OFF\
XSBEDR_BCR_CLEARBIT(XSBEDR_BCR_REDLED)
#define XSBEDR_GREEN_LED_ON\
XSBEDR_BCR_SETBIT(XSBEDR_BCR_GRELED)
#define XSBEDR_GREED_LED_OFF\
XSBEDR_BCR_CLEARBIT(XSBEDR_BCR_GRELED)
#define XSBEDR_LCD_PWR_ON \
XSBEDR_BCR_SETBIT(XSBEDR_BCR_LCD_PWR_ON)
#define XSBEDR_LCD_PWR_OFF \
XSBEDR_BCR_CLEARBIT(XSBEDR_BCR_LCD_PWR_ON)
#define XSBEDR_MMC_PWR_ON \
XSBEDR_BCR_SETBIT(XSBEDR_BCR_MMC_PWR_ON)
#define XSBEDR_MMC_PWR_OFF \
XSBEDR_BCR_CLEARBIT(XSBEDR_BCR_MMC_PWR_ON)
//LAN91C1111
#define PXA270XSB_ETH_BASE 0x0c000000
#define PXA270XSB_ETH_GPIO_ETH 10
#define PXA270XSB_IRQ_GPIO_ETH IRQ_GPIO(10)
4、修改linux-2.6.28/arch/arm/mach-pxa/Kconfig文件，增加一个在进行Make menuconfig时平台选择项
config MACH_MAINSTONE
bool "Intel HCDDBBVA0 Development Platform"
select PXA27x
select HAVE_PWM
select PXA_HAVE_BOARD_IRQS
config MACH_XSBASE270
bool "Emdoor EELiod/Liod Development Platform"
select PXA27x
select HAVE_PWM
select PXA_HAVE_BOARD_IRQS
5、修改linux-2.6.28/arch/arm/mach-pxa/Makefile文件，增加编译xsbase270.c的项。
obj-$(CONFIG_ARCH_LUBBOCK) += lubbock.o
obj-$(CONFIG_MACH_LOGICPD_PXA270) += lpd270.o
obj-$(CONFIG_MACH_MAINSTONE) += mainstone.o
obj-$(CONFIG_MACH_XSBASE270) += xsbase270.o
obj-$(CONFIG_MACH_MP900C) += mp900.o
obj-$(CONFIG_ARCH_PXA_IDP) += idp.o
obj-$(CONFIG_MACH_TRIZEPS4) += trizeps4.o
6、linux-2.6.28/drivers/mtd/maps文件夹中增加一个xsbase270-flash.c文件，本人尝试直接利用该目录下的pxa2xx-flash.c进行编译，但没有成功，所以增加了一个这样的文件，该文件是从本人移植的linux-2.6.22.10核上复制过来的，尽修改了头文件的位置和红色部分（还可以的）
/*
* $Id: $
*
* Map driver for the Mainstone developer platform.
*
* Author: Nicolas Pitre
* Copyright: (C) 2001 MontaVista Software Inc.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
#include
#include
#include
#include
#include
#include
#include
#include
#include
#include
#include
#include
#include
#include
#include
#define ROM_ADDR 0x00000000
#define FLASH_ADDR 0x04000000
#define WINDOW_SIZE 32*1024*1024
static void xsbase270_map_inval_cache(struct map_info *map, unsigned long from,
ssize_t len)
{
// consistent_sync((char *)map->cached + from, len, DMA_FROM_DEVICE);
flush_ioremap_region(map->phys,map->cached,from,len);
}
static struct map_info xsbase270_maps = {
.name= "flash0",
.size = WINDOW_SIZE,
.phys = PXA_CS0_PHYS,
.bankwidth= 4,
.inval_cache = xsbase270_map_inval_cache,
};
static struct mtd_partition xsbase270_partitions[] = {
{
.name = "Bootloader",
.size = 0x00040000,
.offset = 0,
.mask_flags = MTD_WRITEABLE /* force read-only */
},{
.name = "Kernel",
.size = 0x00200000,
.offset = 0x00040000,
},{
.name = "Filesystem",
.size = MTDPART_SIZ_FULL,
.offset = 0x00240000
}
};
static struct mtd_info *mymtds;
static struct mtd_partition *parsed_parts;
static int nr_parsed_parts;
static const char *probes[] = { NULL };
static int __init init_xsbase270(void)
{
int ret = 0, i;
//xsbase270_maps.bankwidth = 4;
/* Compensate for SW7 which swaps the flash banks */
//xsbase270_maps.name = "Emdoor flash";
printk(KERN_NOTICE "EEliod configured to boot from %s\n", xsbase270_maps.name);
xsbase270_maps.virt = ioremap(xsbase270_maps.phys, WINDOW_SIZE);
if (!xsbase270_maps.virt) {
printk(KERN_WARNING "Failed to ioremap %s\n", xsbase270_maps.name);
//if (!ret)
//ret = -ENOMEM;
// continue;
}
xsbase270_maps.cached = ioremap_cached(xsbase270_maps.phys, WINDOW_SIZE);
if (!xsbase270_maps.cached)
printk(KERN_WARNING "Failed to ioremap cached %s\n", xsbase270_maps.name);
simple_map_init(&xsbase270_maps);
printk(KERN_NOTICE
"Probing %s at physical address 0x%08lx"
" (%d-bit bankwidth)\n",
xsbase270_maps.name, xsbase270_maps.phys,
xsbase270_maps.bankwidth * 8);
mymtds = do_map_probe("cfi_probe", &xsbase270_maps);
if (!mymtds) {
iounmap((void *)xsbase270_maps.virt);
if (xsbase270_maps.cached)
iounmap(xsbase270_maps.cached);
// if (!ret)
// ret = -EIO;
// continue;
}
/* Unlock the flash device. */
for (i = 0; i < mymtds->numeraseregions; i++) {
int j;
for( j = 0; j < mymtds->eraseregions[i].numblocks; j++) {
mymtds->unlock(mymtds, mymtds->eraseregions[i].offset +
j * mymtds->eraseregions[i].erasesize,
mymtds->eraseregions[i].erasesize);
}
}
mymtds->owner = THIS_MODULE;
ret = parse_mtd_partitions(mymtds, probes, &parsed_parts, 0);
if (ret > 0)
nr_parsed_parts = ret;
if (!mymtds) {
printk(KERN_WARNING "%s is absent. Skipping\n",
xsbase270_maps.name);
return ret;
}
else if (nr_parsed_parts) {
add_mtd_partitions(mymtds, parsed_parts,
nr_parsed_parts);
} else {
printk("Using static partitions on %s\n",
xsbase270_maps.name);
add_mtd_partitions(mymtds, xsbase270_partitions,
ARRAY_SIZE(xsbase270_partitions));
}
return 0;
}
static void __exit cleanup_xsbase270(void)
{
//int i;
//for (i = 0; i < 2; i++) {
// if (!mymtds[i])
// continue;
if (nr_parsed_parts)
del_mtd_partitions(mymtds);
else
del_mtd_device(mymtds);
map_destroy(mymtds);
iounmap((void *)xsbase270_maps.virt);
if (xsbase270_maps.cached)
iounmap(xsbase270_maps.cached);
kfree(parsed_parts);
//}
}
module_init(init_xsbase270);
module_exit(cleanup_xsbase270);
MODULE_LICENSE("GPL");
MODULE_AUTHOR("Nicolas Pitre
MODULE_DESCRIPTION("MTD map driver for Intel Mainstone");
7、修改该目录下的Kconfig和Makefile文件。
Kconfig文件：
config MTD_XSBASE270
tristate "CFI Flash device mapped on Emdoor XSABSE270 eval board"
depends on (PXA25x || PXA27x) && MACH_XSBASE270 && MTD_CFI_INTELEXT
select MTD_PARTITIONS
help
This provides a driver for the on-board flash of the Intel
'Emdoor PXA27x evaluation board.
Makefile：
obj-$(CONFIG_MTD_CK804XROM) += ck804xrom.o
obj-$(CONFIG_MTD_TSUNAMI) += tsunami_flash.o
obj-$(CONFIG_MTD_PXA2XX) += pxa2xx-flash.o
obj-$(CONFIG_MTD_XSBASE270) += xsbase270-flash.o
obj-$(CONFIG_MTD_MBX860) += mbx860.o
obj-$(CONFIG_MTD_CEIVA) += ceiva.o
obj-$(CONFIG_MTD_OCTAGON) += octagon-5066.o
8、修改linux-2.6.28/arch/arm/mach-pxa/include/mach/irqs.h文件，增加EELiod平台的对中断向量的定义。
#define XSBEDR_USBWAKE_IRQ IRQ_GPIO(1)
#define XSBEDR_USB2_IRQ IRQ_GPIO(9)
#define XSBEDR_ETH_IRQ IRQ_GPIO(10)
#define XSBEDR_CF_DETECT_IRQ IRQ_GPIO(12)
#define XSBEDR_AC97_IRQ IRQ_GPIO(13)
#define XSBEDR_CF_IRQ IRQ_GPIO(22)
#define XSBDVK_IRQ(x) (IRQ_BOARD_START + (x))
#define XSBDVK_ETH_IRQ IRQ_GPIO(10)
#define XSBDVK_2700G_IRQ IRQ_GPIO(12)
#define XSBDVK_AC97_IRQ IRQ_GPIO(13)
#define XSBDVK_CF_IRQ IRQ_GPIO(22)
#define XSBDVK_MMC_IN_IRQ XSBDVK_IRQ(0)
#define XSBDVK_MMC_OUT_IRQ XSBDVK_IRQ(1)
#define XSBDVK_SIM_IN_IRQ XSBDVK_IRQ(2)
#define XSBDVK_SIM_OUT_IRQ XSBDVK_IRQ(3)
#define XSBDVK_USB_IN_IRQ XSBDVK_IRQ(4)
#define XSBDVK_USB_OUT_IRQ XSBDVK_IRQ(5)
#define XSBDVK_CF_IN_IRQ XSBDVK_IRQ(6)
#define XSBDVK_CF_OUT_IRQ XSBDVK_IRQ(7)
#define XSBDVK_SW1_IRQ XSBDVK_IRQ(8)
#define XSBDVK_SW2_IRQ XSBDVK_IRQ(9)
#define XSBDVK_SW3_IRQ XSBDVK_IRQ(10)
#define XSBDVK_SW4_1_IRQ XSBDVK_IRQ(11)
#define XSBDVK_SW4_2_IRQ XSBDVK_IRQ(12)
#define XSBDVK_SW4_3_IRQ XSBDVK_IRQ(13)
9、将linux-2.6.28/arch/arm/configs/目录下的mainstone_defconfig复制为xsbase270_defconfig
congmainstone_defconfig文件可以看出，它所编译的内核是基于网络文件系统（NFS），为了让平台直接从flash分区进行启动，便将CONFIG_CMDLINE改为了如下形式（每项的作用不用讲啦）
C
10、运行make xsbase270_defconfig，然后运行Make menuconfig进行内核裁剪，最好运行Make zImage编译内核
11、大家还得修改和重新编译公司提供的bootloader程序，因为您在运行make xsbase270_defconfig命令时linux-2.6.28自动修改的mach-types文件中增加了如下内容（这个不用解释），大家可以找一下Bootloader源码中的command.c文件中kernel（0，###）函数，其中###必须与1141对应才能引导内核。
xsbase270 MACH_XSBASE270 XSBASE270 1141
基本上按照以上11步便可成功移植linux-2.6.28内核啦。
